Lines Matching +full:0 +full:xfffffe00
26 BCM4377 = 0,
31 #define BCM4377_DEVICE_ID 0x5fa0
32 #define BCM4378_DEVICE_ID 0x5f69
33 #define BCM4387_DEVICE_ID 0x5f71
40 * 0xffffffff but is always aligned down to the previous 0x200 byte boundary
41 * which effectively limits the window to [start, start+0xfffffe00].
42 * We just limit the DMA window to [0, 0xfffffe00] to make sure we don't
45 #define BCM4377_DMA_MASK 0xfffffe00
47 #define BCM4377_PCIECFG_BAR0_WINDOW1 0x80
48 #define BCM4377_PCIECFG_BAR0_WINDOW2 0x70
49 #define BCM4377_PCIECFG_BAR0_CORE2_WINDOW1 0x74
50 #define BCM4377_PCIECFG_BAR0_CORE2_WINDOW2 0x78
51 #define BCM4377_PCIECFG_BAR2_WINDOW 0x84
53 #define BCM4377_PCIECFG_BAR0_CORE2_WINDOW1_DEFAULT 0x18011000
54 #define BCM4377_PCIECFG_BAR2_WINDOW_DEFAULT 0x19000000
56 #define BCM4377_PCIECFG_SUBSYSTEM_CTRL 0x88
58 #define BCM4377_BAR0_FW_DOORBELL 0x140
59 #define BCM4377_BAR0_RTI_CONTROL 0x144
61 #define BCM4377_BAR0_SLEEP_CONTROL 0x150
62 #define BCM4377_BAR0_SLEEP_CONTROL_UNQUIESCE 0
66 #define BCM4377_BAR0_DOORBELL 0x174
71 #define BCM4377_BAR0_HOST_WINDOW_LO 0x590
72 #define BCM4377_BAR0_HOST_WINDOW_HI 0x594
73 #define BCM4377_BAR0_HOST_WINDOW_SIZE 0x598
75 #define BCM4377_BAR2_BOOTSTAGE 0x200454
77 #define BCM4377_BAR2_FW_LO 0x200478
78 #define BCM4377_BAR2_FW_HI 0x20047c
79 #define BCM4377_BAR2_FW_SIZE 0x200480
81 #define BCM4377_BAR2_CONTEXT_ADDR_LO 0x20048c
82 #define BCM4377_BAR2_CONTEXT_ADDR_HI 0x200450
84 #define BCM4377_BAR2_RTI_STATUS 0x20045c
85 #define BCM4377_BAR2_RTI_WINDOW_LO 0x200494
86 #define BCM4377_BAR2_RTI_WINDOW_HI 0x200498
87 #define BCM4377_BAR2_RTI_WINDOW_SIZE 0x20049c
89 #define BCM4377_OTP_SIZE 0xe0
90 #define BCM4377_OTP_SYS_VENDOR 0x15
91 #define BCM4377_OTP_CIS 0x80
92 #define BCM4377_OTP_VENDOR_HDR 0x00000008
101 #define BCM4377_MSGID_ID GENMASK(7, 0)
105 #define BCM4377_CONTROL_MSG_SIZE 0x34
106 #define BCM4377_XFER_RING_MAX_INPLACE_PAYLOAD_SIZE (4 * 0xff)
118 BCM4377_XFER_RING_CONTROL = 0,
128 BCM4377_ACK_RING_CONTROL = 0,
136 BCM4377_DOORBELL_CONTROL = 0,
153 #define BCM4377_XFER_RING_FLAG_PAYLOAD_MAPPED BIT(0)
162 static_assert(sizeof(struct bcm4377_xfer_ring_entry) == 0x10);
182 static_assert(sizeof(struct bcm4377_completion_ring_entry) == 0x10);
298 * size: Size of this structure, must be 0x68.
300 * peripheral_info_addr: DMA address for a 0x20 buffer to which the device will
313 * must be set to 0xffff
314 * control_xfer_ring_msi: Control completion ring MSI index, must be 0
315 * control_completion_ring_msi: Control completion ring MSI index, must be 0.
364 static_assert(sizeof(struct bcm4377_context) == 0x68);
366 #define BCM4378_CALIBRATION_CHUNK_SIZE 0xe6
373 #define BCM4378_PTB_CHUNK_SIZE 0xcf
482 * id: Chip id (e.g. 0x4377 for BCM4377)
606 u32 db = 0; in bcm4377_ring_doorbell()
612 dev_dbg(&bcm4377->pdev->dev, "write %d to doorbell #%d (0x%x)\n", val, in bcm4377_ring_doorbell()
639 return 0; in bcm4377_extract_msgid()
719 bitmap_release_region(ring->msgids, msgid, 0); in bcm4377_handle_ack()
748 if ((ring->transfer_rings & BIT(transfer_ring)) == 0) { in bcm4377_handle_completion()
900 msgid = bitmap_find_free_region(ring->msgids, ring->n_entries, 0); in bcm4377_enqueue()
901 if (msgid < 0) { in bcm4377_enqueue()
914 memset(entry, 0, sizeof(*entry)); in bcm4377_enqueue()
949 ret = 0; in bcm4377_enqueue()
954 if (ret == 0 && wait) { in bcm4377_enqueue()
957 if (ret == 0) in bcm4377_enqueue()
959 else if (ret > 0) in bcm4377_enqueue()
960 ret = 0; in bcm4377_enqueue()
979 return 0; in bcm4377_create_completion_ring()
982 memset(ring->ring, 0, in bcm4377_create_completion_ring()
985 memset(&msg, 0, sizeof(msg)); in bcm4377_create_completion_ring()
991 msg.intmod_bytes = cpu_to_le32(0xffffffff); in bcm4377_create_completion_ring()
992 msg.unk = cpu_to_le32(0xffffffff); in bcm4377_create_completion_ring()
1010 memset(&msg, 0, sizeof(msg)); in bcm4377_destroy_completion_ring()
1029 u16 flags = 0; in bcm4377_create_transfer_ring()
1039 memset(&msg, 0, sizeof(msg)); in bcm4377_create_transfer_ring()
1050 bcm4377->ring_state->xfer_ring_head[ring->ring_id] = 0; in bcm4377_create_transfer_ring()
1051 bcm4377->ring_state->xfer_ring_tail[ring->ring_id] = 0; in bcm4377_create_transfer_ring()
1061 for (i = 0; i < ring->n_entries; ++i) { in bcm4377_create_transfer_ring()
1068 memset(entry, 0, sizeof(*entry)); in bcm4377_create_transfer_ring()
1084 cpu_to_le16(0xf); in bcm4377_create_transfer_ring()
1085 bcm4377_ring_doorbell(bcm4377, ring->doorbell, 0xf); in bcm4377_create_transfer_ring()
1100 memset(&msg, 0, sizeof(msg)); in bcm4377_destroy_transfer_ring()
1124 memset(&cmd, 0, sizeof(cmd)); in __bcm4378_send_calibration_chunk()
1125 cmd.unk = 0x03; in __bcm4378_send_calibration_chunk()
1129 skb = __hci_cmd_sync(bcm4377->hdev, 0xfd97, sizeof(cmd), &cmd, in __bcm4378_send_calibration_chunk()
1135 return 0; in __bcm4378_send_calibration_chunk()
1152 for (i = 0, left = data_size; i < blocks; ++i, left -= transfer_len) { in __bcm4378_send_calibration()
1166 return 0; in __bcm4378_send_calibration()
1171 if ((strcmp(bcm4377->stepping, "b1") == 0) || in bcm4378_send_calibration()
1172 strcmp(bcm4377->stepping, "b3") == 0) in bcm4378_send_calibration()
1184 if (strcmp(bcm4377->stepping, "c2") == 0) in bcm4387_send_calibration()
1227 skb = __hci_cmd_sync(bcm4377->hdev, 0xfd98, fw->size, fw->data, in bcm4377_send_ptb()
1238 return 0; in bcm4377_send_ptb()
1251 memset(&cmd, 0, sizeof(cmd)); in bcm4378_send_ptb_chunk()
1255 skb = __hci_cmd_sync(bcm4377->hdev, 0xfe0d, sizeof(cmd), &cmd, in bcm4378_send_ptb_chunk()
1261 return 0; in bcm4378_send_ptb_chunk()
1271 for (i = 0, left = fw->size; i < chunks; ++i, left -= transfer_len) { in bcm4378_send_ptb()
1286 return 0; in bcm4378_send_ptb()
1334 return 0; in bcm4377_hci_open()
1377 return 0; in bcm4377_hci_close()
1383 if (addr->b[0] != 0x93) in bcm4377_is_valid_bdaddr()
1385 if (addr->b[1] != 0x76) in bcm4377_is_valid_bdaddr()
1387 if (addr->b[2] != 0x00) in bcm4377_is_valid_bdaddr()
1389 if (addr->b[4] != (bcm4377->hw->id & 0xff)) in bcm4377_is_valid_bdaddr()
1401 skb = __hci_cmd_sync(bcm4377->hdev, HCI_OP_READ_BD_ADDR, 0, NULL, in bcm4377_check_bdaddr()
1423 return 0; in bcm4377_check_bdaddr()
1479 if (ret < 0) { in bcm4377_hci_send_frame()
1495 skb = __hci_cmd_sync(hdev, 0xfc01, 6, bdaddr, HCI_INIT_TIMEOUT); in bcm4377_hci_set_bdaddr()
1504 return 0; in bcm4377_hci_set_bdaddr()
1532 return 0; in bcm4377_alloc_transfer_ring()
1559 return 0; in bcm4377_alloc_transfer_ring()
1581 return 0; in bcm4377_alloc_completion_ring()
1593 memset(bcm4377->ctx, 0, sizeof(*bcm4377->ctx)); in bcm4377_init_context()
1600 memset(bcm4377->ring_state, 0, sizeof(*bcm4377->ring_state)); in bcm4377_init_context()
1607 * The BT device will write 0x20 bytes of data to this buffer but in bcm4377_init_context()
1611 if (!dmam_alloc_coherent(&bcm4377->pdev->dev, 0x20, in bcm4377_init_context()
1637 bcm4377->ctx->control_completion_ring_doorbell = cpu_to_le16(0xffff); in bcm4377_init_context()
1638 bcm4377->ctx->control_completion_ring_msi = 0; in bcm4377_init_context()
1639 bcm4377->ctx->control_completion_ring_header_size = 0; in bcm4377_init_context()
1640 bcm4377->ctx->control_completion_ring_footer_size = 0; in bcm4377_init_context()
1648 bcm4377->ctx->control_xfer_ring_msi = 0; in bcm4377_init_context()
1649 bcm4377->ctx->control_xfer_ring_header_size = 0; in bcm4377_init_context()
1656 return 0; in bcm4377_init_context()
1806 return 0; in bcm4377_prepare_rings()
1814 int ret = 0; in bcm4377_boot()
1820 if (bootstage != 0) { in bcm4377_boot()
1821 dev_err(&bcm4377->pdev->dev, "bootstage is %d and not 0\n", in bcm4377_boot()
1826 if (rti_status != 0) { in bcm4377_boot()
1827 dev_err(&bcm4377->pdev->dev, "RTI status is %d and not 0\n", in bcm4377_boot()
1847 iowrite32(0, bcm4377->bar0 + BCM4377_BAR0_HOST_WINDOW_LO); in bcm4377_boot()
1848 iowrite32(0, bcm4377->bar0 + BCM4377_BAR0_HOST_WINDOW_HI); in bcm4377_boot()
1855 iowrite32(0, bcm4377->bar0 + BCM4377_BAR0_FW_DOORBELL); in bcm4377_boot()
1861 if (ret == 0) { in bcm4377_boot()
1864 } else if (ret < 0) { in bcm4377_boot()
1877 ret = 0; in bcm4377_boot()
1895 if (ret == 0) { in bcm4377_setup_rti()
1899 } else if (ret < 0) { in bcm4377_setup_rti()
1911 iowrite32(0, bcm4377->bar2 + BCM4377_BAR2_RTI_WINDOW_LO); in bcm4377_setup_rti()
1912 iowrite32(0, bcm4377->bar2 + BCM4377_BAR2_RTI_WINDOW_HI); in bcm4377_setup_rti()
1925 if (ret == 0) { in bcm4377_setup_rti()
1929 } else if (ret < 0) { in bcm4377_setup_rti()
1943 return 0; in bcm4377_setup_rti()
1950 return 0; in bcm4377_parse_otp_board_params()
1955 return 0; in bcm4377_parse_otp_board_params()
1961 size_t idx = 0; in bcm4377_parse_otp_chip_params()
1964 return 0; in bcm4377_parse_otp_chip_params()
1968 while (len != 0) { in bcm4377_parse_otp_chip_params()
1970 if (val[idx] == '\0') in bcm4377_parse_otp_chip_params()
1971 return 0; in bcm4377_parse_otp_chip_params()
1977 bcm4377->stepping[idx] = '\0'; in bcm4377_parse_otp_chip_params()
1978 return 0; in bcm4377_parse_otp_chip_params()
1996 /* *p might be NUL here, if so end == p and len == 0 */ in bcm4377_parse_otp_str()
2025 return 0; in bcm4377_parse_otp_str()
2072 if (!bcm4377->stepping[0] || !bcm4377->vendor[0]) in bcm4377_parse_otp_sys_vendor()
2077 return 0; in bcm4377_parse_otp_sys_vendor()
2090 for (i = 0; i < BCM4377_OTP_SIZE; ++i) in bcm4377_parse_otp()
2093 i = 0; in bcm4377_parse_otp()
2098 if (type == 0) in bcm4377_parse_otp()
2107 "OTP @ 0x%x (%d): SYS_VENDOR", i, length); in bcm4377_parse_otp()
2112 dev_dbg(&bcm4377->pdev->dev, "OTP @ 0x%x (%d): CIS", i, in bcm4377_parse_otp()
2116 dev_dbg(&bcm4377->pdev->dev, "OTP @ 0x%x (%d): unknown", in bcm4377_parse_otp()
2189 return 0; in bcm4377_probe_dmi()
2198 return 0; in bcm4377_probe_of()
2223 return 0; in bcm4377_probe_of()
2319 bcm4377->bar0 = pcim_iomap(pdev, 0, 0); in bcm4377_probe()
2322 bcm4377->bar2 = pcim_iomap(pdev, 2, 0); in bcm4377_probe()
2338 if (ret < 0) in bcm4377_probe()
2345 irq = pci_irq_vector(pdev, 0); in bcm4377_probe()
2346 if (irq <= 0) in bcm4377_probe()
2349 ret = devm_request_irq(&pdev->dev, irq, bcm4377_irq, 0, "bcm4377", in bcm4377_probe()
2408 return 0; in bcm4377_suspend()
2448 .id = 0x4377,
2449 .otp_offset = 0x4120,
2450 .bar0_window1 = 0x1800b000,
2451 .bar0_window2 = 0x1810c000,
2458 .id = 0x4378,
2459 .otp_offset = 0x4120,
2460 .bar0_window1 = 0x18002000,
2461 .bar0_window2 = 0x1810a000,
2462 .bar0_core2_window2 = 0x18107000,
2471 .id = 0x4387,
2472 .otp_offset = 0x413c,
2473 .bar0_window1 = 0x18002000,
2474 .bar0_window2 = 0x18109000,
2475 .bar0_core2_window2 = 0x18106000,
2488 PCI_ANY_ID, PCI_CLASS_NETWORK_OTHER << 8, 0xffff00, \