1 // SPDX-License-Identifier: GPL-2.0-only
3  * pata_ninja32.c 	- Ninja32 PATA for new ATA layer
12  * The Ninja32 Cardbus is not a generic SFF controller. Instead it is
32  *		bit 4-6 wait bits
51  *	ninja32_set_piomode	-	set initial PIO mode data
52  *	@ap: ATA interface
53  *	@adev: ATA device
64 	iowrite8(pio_timing[adev->pio_mode - XFER_PIO_0],  in ninja32_set_piomode()
65 		 ap->ioaddr.bmdma_addr + 0x1f);  in ninja32_set_piomode()
66 	ap->private_data = adev;  in ninja32_set_piomode()
72 	struct ata_device *adev = &ap->link.device[device];  in ninja32_dev_select()
73 	if (ap->private_data != adev) {  in ninja32_dev_select()
74 		iowrite8(0xd6, ap->ioaddr.bmdma_addr + 0x1f);  in ninja32_dev_select()
110 	host = ata_host_alloc(&dev->dev, 1);  in ninja32_init_one()
112 		return -ENOMEM;  in ninja32_init_one()
113 	ap = host->ports[0];  in ninja32_init_one()
120 	if (rc == -EBUSY)  in ninja32_init_one()
125 	host->iomap = pcim_iomap_table(dev);  in ninja32_init_one()
126 	rc = dma_set_mask_and_coherent(&dev->dev, ATA_DMA_MASK);  in ninja32_init_one()
133 	base = host->iomap[0];  in ninja32_init_one()
135 		return -ENOMEM;  in ninja32_init_one()
136 	ap->ops = &ninja32_port_ops;  in ninja32_init_one()
137 	ap->pio_mask = ATA_PIO4;  in ninja32_init_one()
138 	ap->flags |= ATA_FLAG_SLAVE_POSS;  in ninja32_init_one()
140 	ap->ioaddr.cmd_addr = base + 0x10;  in ninja32_init_one()
141 	ap->ioaddr.ctl_addr = base + 0x1E;  in ninja32_init_one()
142 	ap->ioaddr.altstatus_addr = base + 0x1E;  in ninja32_init_one()
143 	ap->ioaddr.bmdma_addr = base;  in ninja32_init_one()
144 	ata_sff_std_ports(&ap->ioaddr);  in ninja32_init_one()
145 	ap->pflags |= ATA_PFLAG_PIO32 | ATA_PFLAG_PIO32CHANGE;  in ninja32_init_one()
149 	return ata_host_activate(host, dev->irq, ata_bmdma_interrupt,  in ninja32_init_one()
162 	ninja32_program(host->iomap[0]);  in ninja32_reinit_one()
192 MODULE_DESCRIPTION("low-level driver for Ninja32 ATA");