1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/pci-acpi.h>
43 	pr_info("%s detected: ignoring ACPI _SEG\n", id->ident);  in set_ignore_seg()
51 	        id->ident);  in set_no_e820()
60 		.ident = "IBM System x3800",
67 	/* 2006 AMD HT/VIA system with two host bridges */
70 		.ident = "ASRock ALiveSATA2-GLAN",
72 			DMI_MATCH(DMI_PRODUCT_NAME, "ALiveSATA2-GLAN"),
76 	/* 2006 AMD HT/VIA system with two host bridges */
79 		.ident = "ASUS M2V-MX SE",
82 			DMI_MATCH(DMI_BOARD_NAME, "M2V-MX SE"),
89 		.ident = "MSI MS-7253",
91 			DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
92 			DMI_MATCH(DMI_BOARD_NAME, "MS-7253"),
96 	/* https://bugs.launchpad.net/ubuntu/+source/alsa-driver/+bug/931368 */
97 	/* https://bugs.launchpad.net/ubuntu/+source/alsa-driver/+bug/1033299 */
100 		.ident = "Foxconn K8M890-8237A",
103 			DMI_MATCH(DMI_BOARD_NAME, "K8M890-8237A"),
136 			DMI_MATCH(DMI_PRODUCT_NAME, "X8DTH-i/6/iF/6F"),
146 			DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
153 	 * an E820 reserved region that covers the entire 32-bit host
155 	 * _CRS means no space is available for hot-added or uninitialized
157 	 * and hot-added Thunderbolt devices.  See the commit log for
170 	 * The Acer Spin 5 (SP513-54N) has the same E820 reservation covering
171 	 * the entire _CRS 32-bit window issue as the Lenovo *IIL* models.
176 		.ident = "Acer Spin 5 (SP513-54N)",
179 			DMI_MATCH(DMI_PRODUCT_NAME, "Spin SP513-54N"),
184 	 * Clevo X170KM-G barebones have the same E820 reservation covering
185 	 * the entire _CRS 32-bit window issue as the Lenovo *IIL* models.
190 		.ident = "Clevo X170KM-G Barebone",
192 			DMI_MATCH(DMI_BOARD_NAME, "X170KM-G"),
214 	 * leaving none for hot-added or uninitialized devices.  These E820  in pci_acpi_crs_quirks()
216 	 * clipping by default for post-2022 machines.  in pci_acpi_crs_quirks()
218 	 * We already have quirks to disable clipping for pre-2023  in pci_acpi_crs_quirks()
220 	 * post-2022 machines that incorrectly include unusable space in  in pci_acpi_crs_quirks()
250 		pr_info("Please notify linux-pci@vger.kernel.org so future kernels can do this automatically\n");  in pci_acpi_crs_quirks()
254  * Check if pdev is part of a PCIe switch that is directly below the
267 	 * If the device has a PCIe type, check if it is below the  in pcie_switch_directly_under()
268 	 * corresponding PCIe switch components (if applicable). Then check  in pcie_switch_directly_under()
300 	 * with the "usb4-host-interface" ACPI property, so we look for  in pcie_has_usb4_host_interface()
303 	fwnode = fwnode_find_reference(dev_fwnode(&pdev->dev),  in pcie_has_usb4_host_interface()
304 				       "usb4-host-interface", 0);  in pcie_has_usb4_host_interface()
312 	 * before Alder Lake do not have the "usb4-host-interface"  in pcie_has_usb4_host_interface()
316 	if (pdev->vendor == PCI_VENDOR_ID_INTEL) {  in pcie_has_usb4_host_interface()
317 		switch (pdev->device) {  in pcie_has_usb4_host_interface()
323 		/* Tiger Lake-LP Thunderbolt 4 PCIe Root Ports */  in pcie_has_usb4_host_interface()
328 		/* Tiger Lake-H Thunderbolt 4 PCIe Root Ports */  in pcie_has_usb4_host_interface()
353 	if (!root->external_facing)  in arch_pci_dev_is_removable()
356 	/* Anything directly behind a "usb4-host-interface" is tunneled */  in arch_pci_dev_is_removable()
361 	 * Check if this is a discrete Thunderbolt/USB4 controller that is  in arch_pci_dev_is_removable()
362 	 * directly behind the non-USB4 PCIe Root Port marked as  in arch_pci_dev_is_removable()
378 		return -EIO;  in check_segment()
396 	struct acpi_pci_root *root = ci->root;  in setup_mcfg_map()
397 	struct device *dev = &ci->bridge->dev;  in setup_mcfg_map()
400 	info->start_bus = (u8)root->secondary.start;  in setup_mcfg_map()
401 	info->end_bus = (u8)root->secondary.end;  in setup_mcfg_map()
402 	info->mcfg_added = false;  in setup_mcfg_map()
403 	seg = info->sd.domain;  in setup_mcfg_map()
412 	result = pci_mmconfig_insert(dev, seg, info->start_bus, info->end_bus,  in setup_mcfg_map()
413 				     root->mcfg_addr);  in setup_mcfg_map()
418 		info->mcfg_added = true;  in setup_mcfg_map()
419 	} else if (result != -EEXIST)  in setup_mcfg_map()
431 	if (info->mcfg_added) {  in teardown_mcfg_map()
432 		pci_mmconfig_delete(info->sd.domain,  in teardown_mcfg_map()
433 				    info->start_bus, info->end_bus);  in teardown_mcfg_map()
434 		info->mcfg_added = false;  in teardown_mcfg_map()
450 	int busnum = root->secondary.start;  in pci_acpi_root_get_node()
451 	struct acpi_device *device = root->device;  in pci_acpi_root_get_node()
452 	int node = acpi_get_node(device->handle);  in pci_acpi_root_get_node()
457 …dev_info(&device->dev, FW_BUG "no _PXM; falling back to node %d from hardware (may be inconsistent…  in pci_acpi_root_get_node()
486  *     IO port [0xCF8-0xCFF] is consumed by the host bridge itself
489  * So explicitly filter out PCI CFG IO ports[0xCF8-0xCFF].
493 	return (res->flags & IORESOURCE_IO) &&  in resource_is_pcicfg_ioport()
494 		res->start == 0xCF8 && res->end == 0xCFF;  in resource_is_pcicfg_ioport()
499 	struct acpi_device *device = ci->bridge;  in pci_acpi_root_prepare_resources()
500 	int busnum = ci->root->secondary.start;  in pci_acpi_root_prepare_resources()
507 		resource_list_for_each_entry_safe(entry, tmp, &ci->resources)  in pci_acpi_root_prepare_resources()
508 			if (resource_is_pcicfg_ioport(entry->res))  in pci_acpi_root_prepare_resources()
513 	resource_list_for_each_entry_safe(entry, tmp, &ci->resources) {  in pci_acpi_root_prepare_resources()
514 		dev_printk(KERN_DEBUG, &device->dev,  in pci_acpi_root_prepare_resources()
515 			   "host bridge window %pR (ignored)\n", entry->res);  in pci_acpi_root_prepare_resources()
518 	x86_pci_root_bus_resources(busnum, &ci->resources);  in pci_acpi_root_prepare_resources()
532 	int domain = root->segment;  in pci_acpi_scan_root()
533 	int busnum = root->secondary.start;  in pci_acpi_scan_root()
538 		root->segment = domain = 0;  in pci_acpi_scan_root()
550 		 * its bus->sysdata.  in pci_acpi_scan_root()
555 			.companion = root->device  in pci_acpi_scan_root()
558 		memcpy(bus->sysdata, &sd, sizeof(sd));  in pci_acpi_scan_root()
564 			dev_err(&root->device->dev,  in pci_acpi_scan_root()
568 			info->sd.domain = domain;  in pci_acpi_scan_root()
569 			info->sd.node = node;  in pci_acpi_scan_root()
570 			info->sd.companion = root->device;  in pci_acpi_scan_root()
572 						   &info->common, &info->sd);  in pci_acpi_scan_root()
576 	/* After the PCI-E bus has been walked and all devices discovered,  in pci_acpi_scan_root()
581 		list_for_each_entry(child, &bus->children, node)  in pci_acpi_scan_root()
596 	if (!bridge->dev.parent) {  in pcibios_root_bridge_prepare()
597 		struct pci_sysdata *sd = bridge->bus->sysdata;  in pcibios_root_bridge_prepare()
598 		ACPI_COMPANION_SET(&bridge->dev, sd->companion);  in pcibios_root_bridge_prepare()
608 		return -ENODEV;  in pci_acpi_init()