Lines Matching full:intercept

85 	bool always; /* True if intercept is initially cleared */
134 * intercept the MSR 0x832, and do not setup direct_access_msr.
154 * intercept is enabled. Refer to AMD APM Vol 2 Section 15.14.4 Pause
155 * Intercept Filtering for more details.
171 * value is less than zero and PAUSE intercept is enabled, a #VMEXIT is
315 /* #GP intercept is still needed for vmware backdoor */ in svm_set_efer()
336 * Never intercept #GP for SEV guests, KVM can't in svm_set_efer()
796 /* Set the shadow bitmaps to the desired intercept states */ in set_shadow_msr_intercept()
822 * If the L01 MSR bitmap does not intercept the MSR, then we need to in msr_write_intercepted()
826 * If the L02 MSR bitmap does not intercept the MSR, then we need to in msr_write_intercepted()
911 void svm_set_x2apic_msr_interception(struct vcpu_svm *svm, bool intercept) in svm_set_x2apic_msr_interception() argument
915 if (intercept == svm->x2avic_msrs_intercepted) in svm_set_x2apic_msr_interception()
928 !intercept, !intercept); in svm_set_x2apic_msr_interception()
931 svm->x2avic_msrs_intercepted = intercept; in svm_set_x2apic_msr_interception()
945 * Set intercept permissions for all direct access MSRs again. They in svm_msr_filter_changed()
1200 * Intercept INVPCID if shadow paging is enabled to sync/free shadow in svm_recalc_instruction_intercepts()
1225 * We must intercept SYSENTER_EIP and SYSENTER_ESP in init_vmcb_after_set_cpuid()
1245 /* No need to intercept these MSRs */ in init_vmcb_after_set_cpuid()
1277 * We intercept those #GP and allow access to them anyway in init_vmcb()
1666 * Recalculating intercepts may have cleared the VINTR intercept. If in svm_set_vintr()
2198 * On an #MC intercept the MCE handler is not called automatically in in svm_handle_mce()
2222 * VMCB is undefined after a SHUTDOWN intercept. INIT the vCPU to put in shutdown_interception()
2435 * If VGIF is enabled, the STGI intercept is only added to in svm_set_gif()
2437 * Likewise, clear the VINTR intercept, we will set it in svm_set_gif()
2456 * in use, we still rely on the VINTR intercept (rather than in svm_set_gif()
3118 * We only intercept the MSR_IA32_SYSENTER_{EIP|ESP} msrs in svm_set_msr()
3120 * In this case we use this intercept to track the high in svm_set_msr()
3143 * directly. Intercept TSC_AUX instead of exposing it to the in svm_set_msr()
3265 * For an INVPCID intercept: in invpcid_interception()
3849 * 1, because that's a separate STGI/VMRUN intercept. The next time we in svm_enable_irq_window()
3850 * get that intercept, this function will be called again though and in svm_enable_irq_window()
3851 * we'll get the vintr intercept. However, if the vGIF feature is in svm_enable_irq_window()
3891 * the STI shadow or intercept STGI. in svm_enable_nmi_window()
3903 * KVM can't intercept and single-step IRET to detect when NMIs are in svm_enable_nmi_window()
4371 * Intercept VMLOAD if the vCPU mode is Intel in order to emulate that in svm_vcpu_after_set_cpuid()
4478 if (info->intercept >= ARRAY_SIZE(x86_intercept_map)) in svm_check_intercept()
4481 icpt_info = x86_intercept_map[info->intercept]; in svm_check_intercept()
4488 if (info->intercept == x86_intercept_cr_read) in svm_check_intercept()
4494 if (info->intercept == x86_intercept_cr_write) in svm_check_intercept()
4498 info->intercept == x86_intercept_clts) in svm_check_intercept()
4508 if (info->intercept == x86_intercept_lmsw) { in svm_check_intercept()
4526 if (info->intercept == x86_intercept_wrmsr) in svm_check_intercept()
4543 if (info->intercept == x86_intercept_in || in svm_check_intercept()
4544 info->intercept == x86_intercept_ins) { in svm_check_intercept()
4553 if (info->intercept == x86_intercept_outs || in svm_check_intercept()
4554 info->intercept == x86_intercept_ins) in svm_check_intercept()
4801 * doesn't intercept #UD or #GP for SEV guests, but this path is still in svm_can_emulate_instruction()