1 // SPDX-License-Identifier: GPL-2.0
3  * arch/sh/kernel/cpu/sh4/clock-sh4-202.c
5  * Additional SH4-202 support for the clock framework
22 static unsigned long emi_clk_recalc(struct clk *clk)  in emi_clk_recalc()  argument
25 	return clk->parent->rate / frqcr3_divisors[idx];  in emi_clk_recalc()
28 static inline int frqcr3_lookup(struct clk *clk, unsigned long rate)  in frqcr3_lookup()  argument
30 	int divisor = clk->parent->rate / rate;  in frqcr3_lookup()
45 static struct clk sh4202_emi_clk = {
50 static unsigned long femi_clk_recalc(struct clk *clk)  in femi_clk_recalc()  argument
53 	return clk->parent->rate / frqcr3_divisors[idx];  in femi_clk_recalc()
60 static struct clk sh4202_femi_clk = {
65 static void shoc_clk_init(struct clk *clk)  in shoc_clk_init()  argument
81 		if (clk->ops->set_rate(clk, clk->parent->rate / divisor) == 0)  in shoc_clk_init()
88 static unsigned long shoc_clk_recalc(struct clk *clk)  in shoc_clk_recalc()  argument
91 	return clk->parent->rate / frqcr3_divisors[idx];  in shoc_clk_recalc()
94 static int shoc_clk_verify_rate(struct clk *clk, unsigned long rate)  in shoc_clk_verify_rate()  argument
96 	struct clk *bclk = clk_get(NULL, "bus_clk");  in shoc_clk_verify_rate()
109 static int shoc_clk_set_rate(struct clk *clk, unsigned long rate)  in shoc_clk_set_rate()  argument
115 	if (shoc_clk_verify_rate(clk, rate) != 0)  in shoc_clk_set_rate()
116 		return -EINVAL;  in shoc_clk_set_rate()
118 	tmp = frqcr3_lookup(clk, rate);  in shoc_clk_set_rate()
125 	clk->rate = clk->parent->rate / frqcr3_divisors[tmp];  in shoc_clk_set_rate()
136 static struct clk sh4202_shoc_clk = {
141 static struct clk *sh4202_onchip_clocks[] = {
156 	struct clk *clk;  in arch_clk_init()  local
161 	clk = clk_get(NULL, "master_clk");  in arch_clk_init()
163 		struct clk *clkp = sh4202_onchip_clocks[i];  in arch_clk_init()
165 		clkp->parent = clk;  in arch_clk_init()
169 	clk_put(clk);  in arch_clk_init()