boards/mach-ap325rxa/setup.c

1 // SPDX-License-Identifier: GPL-2.0
3  * Renesas - AP-325RXA
4  * (Compatible with Algo System ., LTD. - AP-320A)
10 #include <asm/clock.h>
16 #include <linux/dma-map-ops.h>
38 #include <media/drv-intf/renesas-ceu.h>
74 	.id		= -1,
83  * AP320 and AP325RXA has CPLD data in NOR Flash(0xA80000-0xABFFFF).
91 		.mask_flags = MTD_WRITEABLE,	/* Read-only */
97 		.name = "free-area0",
101 		.name = "CPLD-Data",
103 		.mask_flags = MTD_WRITEABLE,	/* Read-only */
106 		.name = "free-area1",
128 	.name		= "physmap-flash",
193 	/* ASD AP-320/325 LCD ON */  in ap320_wvga_power_on()
199 	/* ASD AP-320/325 LCD OFF */  in ap320_wvga_power_off()
244 		.start	= 0xfe940000, /* P4-only space */
263 /* Powerdown/reset gpios for CEU image sensors */
265 	.dev_id		= "0-0021",
286 		.name	= "CEU",
298 	.name		= "renesas-ceu",
299 	.id             = 0, /* "ceu.0" clock */
335 	.id             = 0, /* "sdhi0" clock */
362 	.id             = 1, /* "sdhi1" clock */
401 	/* register board specific self-refresh code */  in ap325rxa_devices_setup()
408 	regulator_register_always_on(0, "fixed-3.3V", fixed3v3_power_consumers,  in ap325rxa_devices_setup()
456 	/* CEU */  in ap325rxa_devices_setup()
502 	/* SDHI0 - CN3 - SD CARD */  in ap325rxa_devices_setup()
512 	/* SDHI1 - CN7 - MICRO SD CARD */  in ap325rxa_devices_setup()
521 	/* Add a clock alias for ov7725 xclk source. */  in ap325rxa_devices_setup()
522 	clk_add_alias(NULL, "0-0021", "video_clk", NULL);  in ap325rxa_devices_setup()
530 	/* Initialize CEU platform device separately to map memory first */  in ap325rxa_devices_setup()
546 	/* MD0=0, MD1=0, MD2=0: Clock Mode 0  in ap325rxa_mode_pins()
547 	 * MD3=0: 16-bit Area0 Bus Width  in ap325rxa_mode_pins()
554 /* Reserve a portion of memory for CEU buffers */
562 		panic("Failed to allocate CEU memory\n");  in ap325rxa_mv_mem_reserve()
571 	.mv_name = "AP-325RXA",