Lines Matching +full:can +full:- +full:clock +full:- +full:select
1 # SPDX-License-Identifier: GPL-2.0
4 select ARCH_32BIT_OFF_T
5 select ARCH_ENABLE_MEMORY_HOTPLUG if SPARSEMEM && MMU
6 select ARCH_ENABLE_MEMORY_HOTREMOVE if SPARSEMEM && MMU
7 select ARCH_HAVE_NMI_SAFE_CMPXCHG if (GUSA_RB || CPU_SH4A)
8 select ARCH_HAS_BINFMT_FLAT if !MMU
9 select ARCH_HAS_CPU_FINALIZE_INIT
10 select ARCH_HAS_CURRENT_STACK_POINTER
11 select ARCH_HAS_GIGANTIC_PAGE
12 select ARCH_HAS_GCOV_PROFILE_ALL
13 select ARCH_HAS_PTE_SPECIAL
14 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
15 select ARCH_HIBERNATION_POSSIBLE if MMU
16 select ARCH_MIGHT_HAVE_PC_PARPORT
17 select ARCH_WANT_IPC_PARSE_VERSION
18 select CPU_NO_EFFICIENT_FFS
19 select DMA_DECLARE_COHERENT
20 select GENERIC_ATOMIC64
21 select GENERIC_CMOS_UPDATE if SH_SH03 || SH_DREAMCAST
22 select GENERIC_IDLE_POLL_SETUP
23 select GENERIC_IRQ_SHOW
24 select GENERIC_LIB_ASHLDI3
25 select GENERIC_LIB_ASHRDI3
26 select GENERIC_LIB_LSHRDI3
27 select GENERIC_PCI_IOMAP if PCI
28 select GENERIC_SCHED_CLOCK
29 select GENERIC_SMP_IDLE_THREAD
30 select GUP_GET_PXX_LOW_HIGH if X2TLB
31 select HAS_IOPORT if HAS_IOPORT_MAP
32 select GENERIC_IOREMAP if MMU
33 select HAVE_ARCH_AUDITSYSCALL
34 select HAVE_ARCH_KGDB
35 select HAVE_ARCH_SECCOMP_FILTER
36 select HAVE_ARCH_TRACEHOOK
37 select HAVE_DEBUG_BUGVERBOSE
38 select HAVE_DEBUG_KMEMLEAK
39 select HAVE_DYNAMIC_FTRACE
40 select HAVE_FAST_GUP if MMU
41 select HAVE_FUNCTION_GRAPH_TRACER
42 select HAVE_FUNCTION_TRACER
43 select HAVE_FTRACE_MCOUNT_RECORD
44 select HAVE_HW_BREAKPOINT
45 select HAVE_IOREMAP_PROT if MMU && !X2TLB
46 select HAVE_KERNEL_BZIP2
47 select HAVE_KERNEL_GZIP
48 select HAVE_KERNEL_LZMA
49 select HAVE_KERNEL_LZO
50 select HAVE_KERNEL_XZ
51 select HAVE_KPROBES
52 select HAVE_KRETPROBES
53 select HAVE_MIXED_BREAKPOINTS_REGS
54 select HAVE_MOD_ARCH_SPECIFIC if DWARF_UNWINDER
55 select HAVE_NMI
56 select HAVE_PATA_PLATFORM
57 select HAVE_PERF_EVENTS
58 select HAVE_REGS_AND_STACK_ACCESS_API
59 select HAVE_UID16
60 select HAVE_SOFTIRQ_ON_OWN_STACK if IRQSTACKS
61 select HAVE_STACKPROTECTOR
62 select HAVE_SYSCALL_TRACEPOINTS
63 select IRQ_FORCED_THREADING
64 select LOCK_MM_AND_FIND_VMA
65 select MODULES_USE_ELF_RELA
66 select NEED_SG_DMA_LENGTH
67 select NO_DMA if !MMU && !DMA_COHERENT
68 select NO_GENERIC_PCI_IOPORT_MAP if PCI
69 select OLD_SIGACTION
70 select OLD_SIGSUSPEND
71 select PCI_DOMAINS if PCI
72 select PERF_EVENTS
73 select PERF_USE_VMALLOC
74 select RTC_LIB
75 select SPARSE_IRQ
76 select TRACE_IRQFLAGS_SUPPORT
81 <http://www.linux-sh.org/>.
105 select ARCH_SUSPEND_POSSIBLE
141 select ARCH_HAS_DMA_PREP_COHERENT
142 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
143 select DMA_DIRECT_REMAP
156 select SH_INTC
160 select CPU_SH2
161 select UNCACHED_MAPPING
165 select CPU_SH2
166 select OF
167 select OF_EARLY_FLATTREE
171 select CPU_HAS_INTEVT
172 select CPU_HAS_SR_RB
173 select SH_INTC
174 select SYS_SUPPORTS_SH_TMU
178 select ARCH_SUPPORTS_HUGETLBFS if MMU
179 select CPU_HAS_INTEVT
180 select CPU_HAS_SR_RB
181 select CPU_HAS_FPU if !CPU_SH4AL_DSP
182 select SH_INTC
183 select SYS_SUPPORTS_SH_TMU
187 select CPU_SH4
191 select CPU_SH4A
192 select CPU_HAS_DSP
199 select DMA_COHERENT
200 select SYS_SUPPORTS_SMP
201 select SYS_SUPPORTS_NUMA
205 select ARCH_SUSPEND_POSSIBLE
206 select PM
214 prompt "Processor sub-type selection"
220 # SH-2 Processor Support
224 select CPU_SH2
225 select SYS_SUPPORTS_SH_CMT
229 select CPU_J2
230 select SYS_SUPPORTS_SMP
231 select GENERIC_CLOCKEVENTS_BROADCAST if SMP
233 # SH-2A Processor Support
237 select CPU_SH2A
238 select CPU_HAS_FPU
239 select SYS_SUPPORTS_SH_MTU2
243 select CPU_SH2A
244 select CPU_HAS_FPU
245 select SYS_SUPPORTS_SH_CMT
246 select SYS_SUPPORTS_SH_MTU2
247 select PINCTRL
251 select CPU_SH2A
252 select SYS_SUPPORTS_SH_CMT
253 select SYS_SUPPORTS_SH_MTU2
257 select CPU_SH2A
258 select CPU_HAS_FPU
259 select SYS_SUPPORTS_SH_CMT
260 select SYS_SUPPORTS_SH_MTU2
264 select CPU_SH2A
265 select CPU_HAS_FPU
266 select SYS_SUPPORTS_SH_CMT
267 select SYS_SUPPORTS_SH_MTU2
268 select PINCTRL
272 select CPU_SH2A
273 select CPU_HAS_FPU
274 select SYS_SUPPORTS_SH_CMT
275 select SYS_SUPPORTS_SH_MTU2
276 select PINCTRL
279 bool "Support MX-G processor"
280 select CPU_SH2A
281 select SYS_SUPPORTS_SH_MTU2
283 Select MX-G if running on an R8A03022BG part.
285 # SH-3 Processor Support
289 select CPU_SH3
293 select CPU_SH3
295 Select SH7706 if you have a 133 Mhz SH-3 HD6417706 CPU.
299 select CPU_SH3
301 Select SH7707 if you have a 60 Mhz SH-3 HD6417707 CPU.
305 select CPU_SH3
307 Select SH7708 if you have a 60 Mhz SH-3 HD6417708S or
308 if you have a 100 Mhz SH-3 HD6417708R CPU.
312 select CPU_SH3
314 Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU.
318 select CPU_SH3
319 select CPU_HAS_DSP
321 Select SH7710 if you have a SH3-DSP SH7710 CPU.
325 select CPU_SH3
326 select CPU_HAS_DSP
328 Select SH7712 if you have a SH3-DSP SH7712 CPU.
332 select CPU_SH3
333 select CPU_HAS_DSP
334 select SYS_SUPPORTS_SH_CMT
335 select USB_OHCI_SH if USB_OHCI_HCD
336 select PINCTRL
338 Select SH7720 if you have a SH3-DSP SH7720 CPU.
342 select CPU_SH3
343 select CPU_HAS_DSP
344 select SYS_SUPPORTS_SH_CMT
345 select USB_OHCI_SH if USB_OHCI_HCD
347 Select SH7721 if you have a SH3-DSP SH7721 CPU.
349 # SH-4 Processor Support
353 select CPU_SH4
355 Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU.
359 select CPU_SH4
361 Select SH7091 if you have an SH-4 based Sega device (such as
366 select CPU_SH4
370 select CPU_SH4
374 select CPU_SH4
376 Select SH7751 if you have a 166 Mhz SH-4 HD6417751 CPU,
381 select CPU_SH4
385 select CPU_SH4
388 bool "Support SH4-202 processor"
389 select CPU_SH4
391 # SH-4A Processor Support
395 select CPU_SH4A
396 select CPU_SHX2
397 select ARCH_SHMOBILE
398 select ARCH_SPARSEMEM_ENABLE
399 select SYS_SUPPORTS_SH_CMT
400 select PINCTRL
402 Select SH7723 if you have an SH-MobileR2 CPU.
406 select CPU_SH4A
407 select CPU_SHX2
408 select ARCH_SHMOBILE
409 select ARCH_SPARSEMEM_ENABLE
410 select SYS_SUPPORTS_SH_CMT
411 select PINCTRL
413 Select SH7724 if you have an SH-MobileR2R CPU.
417 select CPU_SH4A
418 select CPU_SHX2
419 select PINCTRL
421 Select SH7734 if you have a SH4A SH7734 CPU.
425 select CPU_SH4A
426 select CPU_SHX2
427 select PINCTRL
429 Select SH7757 if you have a SH4A SH7757 CPU.
433 select CPU_SH4A
434 select USB_OHCI_SH if USB_OHCI_HCD
436 Select SH7763 if you have a SH4A SH7763(R5S77631) CPU.
440 select CPU_SH4A
444 select CPU_SH4A
448 select CPU_SH4A
449 select CPU_SHX2
450 select ARCH_SPARSEMEM_ENABLE
451 select SYS_SUPPORTS_NUMA
452 select PINCTRL
456 select CPU_SH4A
457 select CPU_SHX3
458 select CPU_HAS_PTEAEX
459 select GENERIC_CLOCKEVENTS_BROADCAST if SMP
460 select USB_OHCI_SH if USB_OHCI_HCD
461 select USB_EHCI_SH if USB_EHCI_HCD
462 select PINCTRL
465 bool "Support SH-X3 processor"
466 select CPU_SH4A
467 select CPU_SHX3
468 select GENERIC_CLOCKEVENTS_BROADCAST if SMP
469 select GPIOLIB
470 select PINCTRL
472 # SH4AL-DSP Processor Support
476 select CPU_SH4AL_DSP
477 select ARCH_SHMOBILE
478 select SYS_SUPPORTS_SH_CMT
482 select CPU_SH4AL_DSP
483 select CPU_SHX2
484 select ARCH_SHMOBILE
485 select ARCH_SPARSEMEM_ENABLE
486 select SYS_SUPPORTS_NUMA
487 select SYS_SUPPORTS_SH_CMT
488 select PINCTRL
492 select CPU_SH4AL_DSP
493 select CPU_SHX2
494 select ARCH_SHMOBILE
495 select ARCH_SPARSEMEM_ENABLE
496 select SYS_SUPPORTS_NUMA
497 select SYS_SUPPORTS_SH_CMT
507 menu "Timer and clock configuration"
510 int "Peripheral clock frequency (in Hz)"
524 This option is used to specify the peripheral clock frequency.
525 This is necessary for determining the reference clock value on
570 than the panic-ed kernel.
573 bool "Symmetric multi-processing support"
580 If you say N here, the kernel will run on uni- and multiprocessor
587 Y to "Enhanced Real Time Clock Support", below.
589 See also <file:Documentation/admin-guide/lockup-watchdogs.rst> and the SMP-HOWTO
595 int "Maximum number of CPUs (2-32)"
605 This is purely to save memory - each supported CPU adds
609 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
613 can be controlled through /sys/devices/system/cpu.
620 This is the default implementation for both UP and non-ll/sc
623 For additional information, design information can be found
630 bool "Implement atomic operations by roll-back (gRB) (EXPERIMENTAL)"
634 atomic operations using a software implementation of load-locked/
635 store-conditional (LLSC). On machines which do not have hardware
693 This can be useful if you are on a board which has a small amount of