1 // SPDX-License-Identifier: GPL-2.0-or-later
6  * Copyright (C) 1994 - 2006 Ralf Baechle
16 #include <asm/cpu-features.h>
17 #include <asm/cpu-type.h>
22 #include "fpu-probe.h"
39  * Check if the CPU has an external FPU.
53 	fcsr = c->fpu_csr31;  in cpu_set_fpu_fcsr_mask()
71 	c->fpu_msk31 = ~(fcsr0 ^ fcsr1) & ~mask;  in cpu_set_fpu_fcsr_mask()
80 	if (c->isa_level & (MIPS_CPU_ISA_M32R1 | MIPS_CPU_ISA_M64R1 |  in cpu_set_fpu_2008()
109 			if (c->isa_level & (MIPS_CPU_ISA_M32R2 |  in cpu_set_fpu_2008()
113 				 * in future, so we only test for R2-R5.  in cpu_set_fpu_2008()
116 					c->options |= MIPS_CPU_MAC_2008_ONLY;  in cpu_set_fpu_2008()
120 				c->options |= MIPS_CPU_NAN_LEGACY;  in cpu_set_fpu_2008()
122 				c->options |= MIPS_CPU_NAN_2008;  in cpu_set_fpu_2008()
125 				c->fpu_msk31 &= ~FPU_CSR_ABS2008;  in cpu_set_fpu_2008()
127 				c->fpu_csr31 |= fcsr & FPU_CSR_ABS2008;  in cpu_set_fpu_2008()
130 				c->fpu_msk31 &= ~FPU_CSR_NAN2008;  in cpu_set_fpu_2008()
132 				c->fpu_csr31 |= fcsr & FPU_CSR_NAN2008;  in cpu_set_fpu_2008()
134 			c->options |= MIPS_CPU_NAN_LEGACY;  in cpu_set_fpu_2008()
139 		c->options |= MIPS_CPU_NAN_LEGACY;  in cpu_set_fpu_2008()
144  * IEEE 754 conformance mode to use.  Affects the NaN encoding and the
145  * ABS.fmt/NEG.fmt execution mode.
147 static enum { STRICT, LEGACY, STD2008, RELAXED } ieee754 = STRICT;  enumerator
152  * mode selected.  Note that "relaxed" straps the emulator so that it
153  * allows 2008-NaN binaries even for legacy processors.
157 	c->options &= ~(MIPS_CPU_NAN_2008 | MIPS_CPU_NAN_LEGACY);  in cpu_set_nofpu_2008()
158 	c->fpu_csr31 &= ~(FPU_CSR_ABS2008 | FPU_CSR_NAN2008);  in cpu_set_nofpu_2008()
159 	c->fpu_msk31 &= ~(FPU_CSR_ABS2008 | FPU_CSR_NAN2008);  in cpu_set_nofpu_2008()
163 		if (c->isa_level & (MIPS_CPU_ISA_M32R1 | MIPS_CPU_ISA_M64R1 |  in cpu_set_nofpu_2008()
167 			c->options |= MIPS_CPU_NAN_2008 | MIPS_CPU_NAN_LEGACY;  in cpu_set_nofpu_2008()
169 			c->options |= MIPS_CPU_NAN_LEGACY;  in cpu_set_nofpu_2008()
170 			c->fpu_msk31 |= FPU_CSR_ABS2008 | FPU_CSR_NAN2008;  in cpu_set_nofpu_2008()
173 	case LEGACY:  in cpu_set_nofpu_2008()
174 		c->options |= MIPS_CPU_NAN_LEGACY;  in cpu_set_nofpu_2008()
175 		c->fpu_msk31 |= FPU_CSR_ABS2008 | FPU_CSR_NAN2008;  in cpu_set_nofpu_2008()
178 		c->options |= MIPS_CPU_NAN_2008;  in cpu_set_nofpu_2008()
179 		c->fpu_csr31 |= FPU_CSR_ABS2008 | FPU_CSR_NAN2008;  in cpu_set_nofpu_2008()
180 		c->fpu_msk31 |= FPU_CSR_ABS2008 | FPU_CSR_NAN2008;  in cpu_set_nofpu_2008()
183 		c->options |= MIPS_CPU_NAN_2008 | MIPS_CPU_NAN_LEGACY;  in cpu_set_nofpu_2008()
189  * Override the IEEE 754 NaN encoding and ABS.fmt/NEG.fmt execution mode
199 	case LEGACY:  in cpu_set_nan_2008()
215  * IEEE 754 NaN encoding and ABS.fmt/NEG.fmt execution mode override
219  * legacy:  only accept legacy-NaN binaries
220  * 2008:    only accept 2008-NaN binaries
226 		return -1;  in ieee754_setup()
229 	else if (!strcmp(s, "legacy"))  in ieee754_setup()
230 		ieee754 = LEGACY;  in ieee754_setup()
236 		return -1;  in ieee754_setup()
255 	if (c->isa_level & (MIPS_CPU_ISA_M32R1 | MIPS_CPU_ISA_M64R1 |  in cpu_set_nofpu_id()
260 	if (c->isa_level & (MIPS_CPU_ISA_M32R2 | MIPS_CPU_ISA_M64R2 |  in cpu_set_nofpu_id()
264 	if (c->options & MIPS_CPU_NAN_2008)  in cpu_set_nofpu_id()
266 	c->fpu_id = value;  in cpu_set_nofpu_id()
277 	c->fpu_id = cpu_get_fpu_id();  in cpu_set_fpu_opts()
278 	mips_nofpu_msk31 = c->fpu_msk31;  in cpu_set_fpu_opts()
280 	if (c->isa_level & (MIPS_CPU_ISA_M32R1 | MIPS_CPU_ISA_M64R1 |  in cpu_set_fpu_opts()
284 		if (c->fpu_id & MIPS_FPIR_3D)  in cpu_set_fpu_opts()
285 			c->ases |= MIPS_ASE_MIPS3D;  in cpu_set_fpu_opts()
286 		if (c->fpu_id & MIPS_FPIR_UFRP)  in cpu_set_fpu_opts()
287 			c->options |= MIPS_CPU_UFR;  in cpu_set_fpu_opts()
288 		if (c->fpu_id & MIPS_FPIR_FREP)  in cpu_set_fpu_opts()
289 			c->options |= MIPS_CPU_FRE;  in cpu_set_fpu_opts()
302 	c->options &= ~MIPS_CPU_FPU;  in cpu_set_nofpu_opts()
303 	c->fpu_msk31 = mips_nofpu_msk31;  in cpu_set_nofpu_opts()