Lines Matching +full:hall +full:- +full:switch +full:-
1 /* SPDX-License-Identifier: GPL-2.0 */
8 * 2000-03-15 David Mosberger-Tang <davidm@hpl.hp.com>
11 * 2000-03-29 Chuck Fleckenstein <cfleck@co.intel.com>
13 * switch to temp kstack, switch modes, jump to C INIT handler
15 * 2002-01-04 J.Hall <jenna.s.hall@intel.com>
21 * 2004-11-12 Russ Anderson <rja@sgi.com>
24 * 2005-12-08 Keith Owens <kaos@sgi.com>
55 * so we can re-use the code for cpu hotplug code as well
68 ld8 r18=[r2],(O(PTCE_COUNT)-O(PTCE_BASE));; // r18=ptce_base
76 adds r20=-1,r20
234 // switch to per cpu MCA stack
283 // switch back to previous stack
326 // sos->monarch flag in r19.
343 // switch to per cpu INIT stack
397 // switch back to previous stack
440 // r11 MCA - rendevzous state, INIT - reason code
454 //--
516 add regs=MCA_PT_REGS_OFFSET-MCA_SOS_OFFSET, regs
523 st8 [temp1]=temp3,PT(AR_CSD)-PT(B6) // save b6
524 st8 [temp2]=temp4,PT(AR_SSD)-PT(B7) // save b7
529 st8 [temp1]=temp3,PT(AR_UNAT)-PT(AR_CSD) // save ar.csd
530 st8 [temp2]=temp4,PT(AR_PFS)-PT(AR_SSD) // save ar.ssd
534 st8 [temp1]=temp3,PT(AR_RNAT)-PT(AR_UNAT) // save ar.unat
535 st8 [temp2]=temp4,PT(AR_BSPSTORE)-PT(AR_PFS) // save ar.pfs
539 st8 [temp1]=temp3,PT(LOADRS)-PT(AR_RNAT) // save ar.rnat
540 st8 [temp2]=temp4,PT(AR_FPSR)-PT(AR_BSPSTORE) // save ar.bspstore
543 sub temp3=temp3, temp4 // ar.bsp - ar.bspstore
548 st8 [temp1]=temp3,PT(AR_CCV)-PT(LOADRS) // save loadrs
549 st8 [temp2]=temp4,PT(F6)-PT(AR_FPSR) // save ar.fpsr
552 st8 [temp1]=temp3,PT(F7)-PT(AR_CCV) // save ar.ccv
553 stf.spill [temp2]=f6,PT(F8)-PT(F6)
555 stf.spill [temp1]=f7,PT(F9)-PT(F7)
556 stf.spill [temp2]=f8,PT(F10)-PT(F8)
558 stf.spill [temp1]=f9,PT(F11)-PT(F9)
565 add regs=MCA_SWITCH_STACK_OFFSET-MCA_PT_REGS_OFFSET, regs
603 stf.spill [temp1]=f30,SW(B2)-SW(F30)
604 stf.spill [temp2]=f31,SW(B3)-SW(F31)
613 st8 [temp1]=temp3,SW(AR_LC)-SW(B4) // save b4
715 //--
762 ldf.fill f30=[temp1],SW(B2)-SW(F30)
763 ldf.fill f31=[temp2],SW(B3)-SW(F31)
770 ld8 temp3=[temp1],SW(AR_LC)-SW(B4) // restore b4
781 add regs=MCA_PT_REGS_OFFSET-MCA_SWITCH_STACK_OFFSET, regs
786 ld8 temp3=[temp1],PT(AR_CSD)-PT(B6) // restore b6
787 ld8 temp4=[temp2],PT(AR_SSD)-PT(B7) // restore b7
791 ld8 temp3=[temp1],PT(AR_UNAT)-PT(AR_CSD) // restore ar.csd
792 ld8 temp4=[temp2],PT(AR_PFS)-PT(AR_SSD) // restore ar.ssd
797 add temp1=PT(AR_CCV)-PT(AR_UNAT), temp1
798 ld8 temp4=[temp2],PT(AR_FPSR)-PT(AR_PFS) // restore ar.pfs
803 ld8 temp3=[temp1],PT(F6)-PT(AR_CCV) // restore ar.ccv
804 ld8 temp4=[temp2],PT(F7)-PT(AR_FPSR) // restore ar.fpsr
808 ldf.fill f6=[temp1],PT(F8)-PT(F6)
809 ldf.fill f7=[temp2],PT(F9)-PT(F7)
811 ldf.fill f8=[temp1],PT(F10)-PT(F8)
812 ldf.fill f9=[temp2],PT(F11)-PT(F9)
818 add regs=MCA_SOS_OFFSET-MCA_PT_REGS_OFFSET, regs
868 dep r15=-1,r15,61,3 // virtual granule
904 // Switch to the MCA/INIT stack.
912 // On entry, sos->pal_min_state is physical, on exit it is virtual.
914 //--
930 dep temp1=-1,ms,62,2 // set region 6
931 mov temp3=IA64_RBS_OFFSET-MCA_PT_REGS_OFFSET
937 mov ar.bspstore=temp4 // switch RBS to MCA/INIT stack
951 // Switch to the old stack.
968 //--
988 ld8 temp2=[temp1],PT(AR_BSPSTORE)-PT(LOADRS) // restore loadrs
990 ld8 temp3=[temp1],PT(AR_RNAT)-PT(AR_BSPSTORE) // restore ar.bspstore
1018 //--
1043 dep r16=-1,r16,61,3 // virtual granule
1110 dep r14 = -1, r14, PSR_MC, 1 // set psr.mc
1112 dep r14 = -1, r14, PSR_IC, 1 // set psr.ic
1114 dep r14 = -1, r14, PSR_BN, 1 // keep bank1 in use