include/asm/cacheflush.h

1 /* SPDX-License-Identifier: GPL-2.0-only */
3  * Cache flush operations for the Hexagon architecture
5  * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved.
11 #include <linux/mm_types.h>
15  *  - flush_cache_all() flushes entire cache
16  *  - flush_cache_mm(mm) flushes the specified mm context's cache lines
17  *  - flush_cache_page(mm, vmaddr, pfn) flushes a single page
18  *  - flush_cache_range(vma, start, end) flushes a range of pages
19  *  - flush_icache_range(start, end) flush a range of instructions
20  *  - flush_dcache_page(pg) flushes(wback&invalidates) a page for dcache
21  *  - flush_icache_pages(vma, pg, nr) flushes(invalidates) nr pages for icache
41  * Memory-management related flushes are there to ensure in non-physically
43  * in the cache to confuse things.  The prototype Hexagon Virtual Machine
44  * only uses a single ASID for all user-mode maps, which should
45  * mean that they aren't necessary.  A brute-force, flush-everything
47  * arch/hexagon/mm/cache.c, but let's not wire it up until we know
53  * This may or may not ever have to be non-null, depending on the
54  * virtual machine MMU.  For a native kernel, it's definitiely  a no-op
81 #include <asm-generic/cacheflush.h>