dts/st/stm32mp251.dtsi

1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
3  * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 	#address-cells = <2>;
10 	#size-cells = <2>;
13 		#address-cells = <1>;
14 		#size-cells = <0>;
17 			compatible = "arm,cortex-a35";
20 			enable-method = "psci";
24 	arm-pmu {
25 		compatible = "arm,cortex-a35-pmu";
27 		interrupt-affinity = <&cpu0>;
28 		interrupt-parent = <&intc>;
32 		ck_flexgen_08: ck-flexgen-08 {
33 			#clock-cells = <0>;
34 			compatible = "fixed-clock";
35 			clock-frequency = <100000000>;
38 		ck_flexgen_51: ck-flexgen-51 {
39 			#clock-cells = <0>;
40 			compatible = "fixed-clock";
41 			clock-frequency = <200000000>;
44 		ck_icn_ls_mcu: ck-icn-ls-mcu {
45 			#clock-cells = <0>;
46 			compatible = "fixed-clock";
47 			clock-frequency = <200000000>;
53 			compatible = "linaro,optee-tz";
58 			compatible = "linaro,scmi-optee";
59 			#address-cells = <1>;
60 			#size-cells = <0>;
61 			linaro,optee-channel-id = <0>;
65 				#clock-cells = <1>;
70 				#reset-cells = <1>;
75 	intc: interrupt-controller@4ac00000 {
76 		compatible = "arm,cortex-a7-gic";
77 		#interrupt-cells = <3>;
78 		#address-cells = <1>;
79 		interrupt-controller;
87 		compatible = "arm,psci-1.0";
92 		compatible = "arm,armv8-timer";
93 		interrupt-parent = <&intc>;
98 		always-on;
102 		compatible = "simple-bus";
103 		#address-cells = <1>;
104 		#size-cells = <1>;
105 		interrupt-parent = <&intc>;
108 		rifsc: rifsc-bus@42080000 {
109 			compatible = "simple-bus";
111 			#address-cells = <1>;
112 			#size-cells = <1>;
116 				compatible = "st,stm32h7-uart";
125 			compatible = "st,stm32mp25-syscfg", "syscon";
130 			#address-cells = <1>;
131 			#size-cells = <1>;
132 			compatible = "st,stm32mp257-pinctrl";
134 			pins-are-numbered;
137 				gpio-controller;
138 				#gpio-cells = <2>;
139 				interrupt-controller;
140 				#interrupt-cells = <2>;
143 				st,bank-name = "GPIOA";
148 				gpio-controller;
149 				#gpio-cells = <2>;
150 				interrupt-controller;
151 				#interrupt-cells = <2>;
154 				st,bank-name = "GPIOB";
159 				gpio-controller;
160 				#gpio-cells = <2>;
161 				interrupt-controller;
162 				#interrupt-cells = <2>;
165 				st,bank-name = "GPIOC";
170 				gpio-controller;
171 				#gpio-cells = <2>;
172 				interrupt-controller;
173 				#interrupt-cells = <2>;
176 				st,bank-name = "GPIOD";
181 				gpio-controller;
182 				#gpio-cells = <2>;
183 				interrupt-controller;
184 				#interrupt-cells = <2>;
187 				st,bank-name = "GPIOE";
192 				gpio-controller;
193 				#gpio-cells = <2>;
194 				interrupt-controller;
195 				#interrupt-cells = <2>;
198 				st,bank-name = "GPIOF";
203 				gpio-controller;
204 				#gpio-cells = <2>;
205 				interrupt-controller;
206 				#interrupt-cells = <2>;
209 				st,bank-name = "GPIOG";
214 				gpio-controller;
215 				#gpio-cells = <2>;
216 				interrupt-controller;
217 				#interrupt-cells = <2>;
220 				st,bank-name = "GPIOH";
225 				gpio-controller;
226 				#gpio-cells = <2>;
227 				interrupt-controller;
228 				#interrupt-cells = <2>;
231 				st,bank-name = "GPIOI";
236 				gpio-controller;
237 				#gpio-cells = <2>;
238 				interrupt-controller;
239 				#interrupt-cells = <2>;
242 				st,bank-name = "GPIOJ";
247 				gpio-controller;
248 				#gpio-cells = <2>;
249 				interrupt-controller;
250 				#interrupt-cells = <2>;
253 				st,bank-name = "GPIOK";
259 			#address-cells = <1>;
260 			#size-cells = <1>;
261 			compatible = "st,stm32mp257-z-pinctrl";
263 			pins-are-numbered;
266 				gpio-controller;
267 				#gpio-cells = <2>;
268 				interrupt-controller;
269 				#interrupt-cells = <2>;
272 				st,bank-name = "GPIOZ";
273 				st,bank-ioport = <11>;