Lines Matching +full:0 +full:x1100a000
51 #size-cells = <0>;
53 cpu0: cpu@0 {
56 reg = <0x000>;
58 performance-domains = <&performance 0>;
75 reg = <0x100>;
77 performance-domains = <&performance 0>;
94 reg = <0x200>;
96 performance-domains = <&performance 0>;
113 reg = <0x300>;
115 performance-domains = <&performance 0>;
132 reg = <0x400>;
151 reg = <0x500>;
170 reg = <0x600>;
189 reg = <0x700>;
246 arm,psci-suspend-param = <0x00010001>;
255 arm,psci-suspend-param = <0x00010001>;
264 arm,psci-suspend-param = <0x01010002>;
273 arm,psci-suspend-param = <0x01010002>;
313 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH 0>;
332 #clock-cells = <0>;
341 #clock-cells = <0>;
348 #clock-cells = <0>;
355 reg = <0 0x0011bc10 0 0x120>, <0 0x0011bd30 0 0x120>;
449 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH 0>,
450 <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH 0>,
451 <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH 0>,
452 <GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH 0>;
460 dma-ranges = <0x0 0x0 0x0 0x0 0x4 0x0>;
468 reg = <0 0x0c000000 0 0x40000>,
469 <0 0x0c040000 0 0x200000>;
470 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH 0>;
473 ppi_cluster0: interrupt-partition-0 {
485 reg = <0 0x10000000 0 0x1000>;
491 reg = <0 0x10001000 0 0x1000>;
498 reg = <0 0x10003000 0 0x1000>;
504 reg = <0 0x10005000 0 0x1000>,
505 <0 0x11d10000 0 0x1000>,
506 <0 0x11d30000 0 0x1000>,
507 <0 0x11d40000 0 0x1000>,
508 <0 0x11e20000 0 0x1000>,
509 <0 0x11eb0000 0 0x1000>,
510 <0 0x11f40000 0 0x1000>,
511 <0 0x1000b000 0 0x1000>;
517 gpio-ranges = <&pio 0 0 144>;
519 interrupts = <GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH 0>;
525 reg = <0 0x10006000 0 0x1000>;
531 #size-cells = <0>;
538 #size-cells = <0>;
548 #size-cells = <0>;
553 #power-domain-cells = <0>;
558 #power-domain-cells = <0>;
563 #power-domain-cells = <0>;
568 #power-domain-cells = <0>;
573 #power-domain-cells = <0>;
609 "vppsys0-0", "vppsys0-1", "vppsys0-2", "vppsys0-3",
617 #size-cells = <0>;
623 clock-names = "vdec1-0";
625 #power-domain-cells = <0>;
633 #power-domain-cells = <0>;
645 clock-names = "vdosys0", "vdosys0-0", "vdosys0-1",
650 #size-cells = <0>;
658 clock-names = "vppsys1", "vppsys1-0",
661 #power-domain-cells = <0>;
670 clock-names = "wepsys-0", "wepsys-1", "wepsys-2",
673 #power-domain-cells = <0>;
679 clock-names = "vdec0-0";
681 #power-domain-cells = <0>;
687 clock-names = "vdec2-0";
689 #power-domain-cells = <0>;
697 #power-domain-cells = <0>;
706 clock-names = "vdosys1", "vdosys1-0",
710 #size-cells = <0>;
716 #power-domain-cells = <0>;
722 #power-domain-cells = <0>;
729 #power-domain-cells = <0>;
737 clock-names = "img-0", "img-1";
740 #size-cells = <0>;
745 #power-domain-cells = <0>;
753 clock-names = "ipe", "ipe-0", "ipe-1";
755 #power-domain-cells = <0>;
766 clock-names = "cam-0", "cam-1", "cam-2", "cam-3",
770 #size-cells = <0>;
775 #power-domain-cells = <0>;
780 #power-domain-cells = <0>;
785 #power-domain-cells = <0>;
794 #power-domain-cells = <0>;
800 #power-domain-cells = <0>;
805 #power-domain-cells = <0>;
810 #power-domain-cells = <0>;
818 #power-domain-cells = <0>;
825 #power-domain-cells = <0>;
834 #size-cells = <0>;
847 #power-domain-cells = <0>;
856 reg = <0 0x10007000 0 0x100>;
862 reg = <0 0x1000c000 0 0x1000>;
869 reg = <0 0x10017000 0 0x1000>;
870 interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH 0>;
876 reg = <0 0x10024000 0 0x1000>;
878 interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH 0>;
888 reg = <0 0x10027000 0 0x000e00>,
889 <0 0x10029000 0 0x000100>;
903 reg = <0 0x10315000 0 0x5000>;
904 interrupts = <GIC_SPI 795 IRQ_TYPE_LEVEL_HIGH 0>,
905 <GIC_SPI 796 IRQ_TYPE_LEVEL_HIGH 0>,
906 <GIC_SPI 797 IRQ_TYPE_LEVEL_HIGH 0>,
907 <GIC_SPI 798 IRQ_TYPE_LEVEL_HIGH 0>,
908 <GIC_SPI 799 IRQ_TYPE_LEVEL_HIGH 0>;
914 reg = <0 0x10320000 0 0x4000>;
915 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH 0>;
922 reg = <0 0x10330000 0 0x4000>;
923 interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH 0>;
930 reg = <0 0x10500000 0 0x100000>,
931 <0 0x10720000 0 0xe0000>,
932 <0 0x10700000 0 0x8000>;
934 interrupts = <GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH 0>;
940 reg = <0 0x10720000 0 0x1000>;
946 reg = <0 0x10803000 0 0x1000>,
947 <0 0x10840000 0 0x40000>;
969 #mbox-cells = <0>;
970 reg = <0 0x10816000 0 0x1000>;
971 interrupts = <GIC_SPI 702 IRQ_TYPE_LEVEL_HIGH 0>;
976 #mbox-cells = <0>;
977 reg = <0 0x10817000 0 0x1000>;
978 interrupts = <GIC_SPI 703 IRQ_TYPE_LEVEL_HIGH 0>;
983 reg = <0 0x10890000 0 0x10000>;
986 interrupts = <GIC_SPI 822 IRQ_TYPE_LEVEL_HIGH 0>;
1033 reg = <0 0x11001100 0 0x100>;
1034 interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH 0>;
1043 reg = <0 0x11001200 0 0x100>;
1044 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH 0>;
1053 reg = <0 0x11001300 0 0x100>;
1054 interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH 0>;
1063 reg = <0 0x11001400 0 0x100>;
1064 interrupts = <GIC_SPI 723 IRQ_TYPE_LEVEL_HIGH 0>;
1073 reg = <0 0x11001500 0 0x100>;
1074 interrupts = <GIC_SPI 724 IRQ_TYPE_LEVEL_HIGH 0>;
1083 reg = <0 0x11001600 0 0x100>;
1084 interrupts = <GIC_SPI 725 IRQ_TYPE_LEVEL_HIGH 0>;
1093 reg = <0 0x11002000 0 0x1000>;
1102 reg = <0 0x11003000 0 0x1000>;
1110 #size-cells = <0>;
1111 reg = <0 0x1100a000 0 0x1000>;
1112 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH 0>;
1122 reg = <0 0x1100b000 0 0x1000>;
1123 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH 0>;
1133 reg = <0 0x1100e000 0 0x1000>;
1134 interrupts = <GIC_SPI 203 IRQ_TYPE_LEVEL_LOW 0>;
1145 reg = <0 0x1100f000 0 0x1000>;
1146 interrupts = <GIC_SPI 793 IRQ_TYPE_LEVEL_HIGH 0>;
1158 #size-cells = <0>;
1159 reg = <0 0x11010000 0 0x1000>;
1160 interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH 0>;
1172 #size-cells = <0>;
1173 reg = <0 0x11012000 0 0x1000>;
1174 interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH 0>;
1186 #size-cells = <0>;
1187 reg = <0 0x11013000 0 0x1000>;
1188 interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH 0>;
1200 #size-cells = <0>;
1201 reg = <0 0x11018000 0 0x1000>;
1202 interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH 0>;
1214 #size-cells = <0>;
1215 reg = <0 0x11019000 0 0x1000>;
1216 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH 0>;
1226 reg = <0 0x1101d000 0 0x1000>;
1227 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH 0>;
1237 reg = <0 0x1101e000 0 0x1000>;
1238 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH 0>;
1248 reg = <0 0x11021000 0 0x4000>;
1249 interrupts = <GIC_SPI 716 IRQ_TYPE_LEVEL_HIGH 0>;
1276 snps,clk-csr = <0>;
1282 #size-cells = <0>;
1286 snps,wr_osr_lmt = <0x7>;
1287 snps,rd_osr_lmt = <0x7>;
1288 snps,blen = <0 0 0 0 16 8 4>;
1296 snps,map-to-dma-channel = <0x0>;
1300 snps,map-to-dma-channel = <0x0>;
1304 snps,map-to-dma-channel = <0x0>;
1308 snps,map-to-dma-channel = <0x0>;
1316 snps,weight = <0x10>;
1318 snps,priority = <0x0>;
1321 snps,weight = <0x11>;
1323 snps,priority = <0x1>;
1326 snps,weight = <0x12>;
1328 snps,priority = <0x2>;
1331 snps,weight = <0x13>;
1333 snps,priority = <0x3>;
1341 reg = <0 0x11200000 0 0x1000>,
1342 <0 0x11203e00 0 0x0100>;
1344 interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH 0>;
1358 mediatek,syscon-wakeup = <&pericfg 0x400 103>;
1366 reg = <0 0x11230000 0 0x10000>,
1367 <0 0x11f50000 0 0x1000>;
1368 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH 0>;
1379 reg = <0 0x11240000 0 0x1000>,
1380 <0 0x11c70000 0 0x1000>;
1381 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH 0>;
1394 reg = <0 0x11250000 0 0x1000>,
1395 <0 0x11e60000 0 0x1000>;
1396 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH 0>;
1408 reg = <0 0x11278000 0 0x1000>;
1409 interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH 0>;
1420 reg = <0 0x11290000 0 0x1000>,
1421 <0 0x11293e00 0 0x0100>;
1423 interrupts = <GIC_SPI 530 IRQ_TYPE_LEVEL_HIGH 0>;
1436 mediatek,syscon-wakeup = <&pericfg 0x400 104>;
1444 reg = <0 0x112a0000 0 0x1000>,
1445 <0 0x112a3e00 0 0x0100>;
1447 interrupts = <GIC_SPI 533 IRQ_TYPE_LEVEL_HIGH 0>;
1460 mediatek,syscon-wakeup = <&pericfg 0x400 105>;
1468 reg = <0 0x112b0000 0 0x1000>,
1469 <0 0x112b3e00 0 0x0100>;
1471 interrupts = <GIC_SPI 536 IRQ_TYPE_LEVEL_HIGH 0>;
1484 mediatek,syscon-wakeup = <&pericfg 0x400 106>;
1495 reg = <0 0x112f0000 0 0x4000>;
1497 interrupts = <GIC_SPI 791 IRQ_TYPE_LEVEL_HIGH 0>;
1498 bus-range = <0x00 0xff>;
1499 ranges = <0x81000000 0 0x20000000
1500 0x0 0x20000000 0 0x200000>,
1501 <0x82000000 0 0x20200000
1502 0x0 0x20200000 0 0x3e00000>;
1504 iommu-map = <0 &iommu_infra IOMMU_PORT_INFRA_PCIE0 0x2>;
1505 iommu-map-mask = <0x0>;
1527 interrupt-map-mask = <0 0 0 7>;
1528 interrupt-map = <0 0 0 1 &pcie_intc0 0>,
1529 <0 0 0 2 &pcie_intc0 1>,
1530 <0 0 0 3 &pcie_intc0 2>,
1531 <0 0 0 4 &pcie_intc0 3>;
1536 #address-cells = <0>;
1547 reg = <0 0x112f8000 0 0x4000>;
1549 interrupts = <GIC_SPI 792 IRQ_TYPE_LEVEL_HIGH 0>;
1550 bus-range = <0x00 0xff>;
1551 ranges = <0x81000000 0 0x24000000
1552 0x0 0x24000000 0 0x200000>,
1553 <0x82000000 0 0x24200000
1554 0x0 0x24200000 0 0x3e00000>;
1556 iommu-map = <0 &iommu_infra IOMMU_PORT_INFRA_PCIE1 0x2>;
1557 iommu-map-mask = <0x0>;
1576 interrupt-map-mask = <0 0 0 7>;
1577 interrupt-map = <0 0 0 1 &pcie_intc1 0>,
1578 <0 0 0 2 &pcie_intc1 1>,
1579 <0 0 0 3 &pcie_intc1 2>,
1580 <0 0 0 4 &pcie_intc1 3>;
1585 #address-cells = <0>;
1593 reg = <0 0x1132c000 0 0x1000>;
1594 interrupts = <GIC_SPI 825 IRQ_TYPE_LEVEL_HIGH 0>;
1600 #size-cells = <0>;
1606 reg = <0 0x11c10000 0 0x1000>;
1610 reg = <0x184 0x1>;
1611 bits = <0 5>;
1614 reg = <0x184 0x2>;
1618 reg = <0x185 0x1>;
1622 reg = <0x186 0x1>;
1623 bits = <0 5>;
1626 reg = <0x186 0x2>;
1630 reg = <0x187 0x1>;
1634 reg = <0x188 0x1>;
1635 bits = <0 5>;
1638 reg = <0x188 0x2>;
1642 reg = <0x189 0x1>;
1646 reg = <0x189 0x2>;
1650 reg = <0x190 0x1>;
1651 bits = <0 4>;
1654 reg = <0x190 0x1>;
1658 reg = <0x191 0x1>;
1659 bits = <0 4>;
1662 reg = <0x191 0x1>;
1666 reg = <0x192 0x1>;
1667 bits = <0 4>;
1670 reg = <0x192 0x1>;
1674 reg = <0x193 0x1>;
1675 bits = <0 4>;
1678 reg = <0x1ac 0x10>;
1681 reg = <0x1bc 0x14>;
1684 reg = <0x1d0 0x38>;
1692 ranges = <0 0 0x11c40000 0x700>;
1695 u2port2: usb-phy@0 {
1696 reg = <0x0 0x700>;
1707 ranges = <0 0 0x11c50000 0x700>;
1710 u2port3: usb-phy@0 {
1711 reg = <0x0 0x700>;
1721 reg = <0 0x11d00000 0 0x1000>,
1722 <0 0x10220580 0 0x80>;
1723 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH 0>;
1729 #size-cells = <0>;
1736 reg = <0 0x11d01000 0 0x1000>,
1737 <0 0x10220600 0 0x80>;
1738 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH 0>;
1744 #size-cells = <0>;
1751 reg = <0 0x11d02000 0 0x1000>,
1752 <0 0x10220680 0 0x80>;
1753 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH 0>;
1759 #size-cells = <0>;
1765 reg = <0 0x11d03000 0 0x1000>;
1772 reg = <0 0x11e00000 0 0x1000>,
1773 <0 0x10220080 0 0x80>;
1774 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH 0>;
1780 #size-cells = <0>;
1787 reg = <0 0x11e01000 0 0x1000>,
1788 <0 0x10220200 0 0x80>;
1789 interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH 0>;
1795 #size-cells = <0>;
1802 reg = <0 0x11e02000 0 0x1000>,
1803 <0 0x10220380 0 0x80>;
1804 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH 0>;
1810 #size-cells = <0>;
1817 reg = <0 0x11e03000 0 0x1000>,
1818 <0 0x10220480 0 0x80>;
1819 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH 0>;
1825 #size-cells = <0>;
1832 reg = <0 0x11e04000 0 0x1000>,
1833 <0 0x10220500 0 0x80>;
1834 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH 0>;
1840 #size-cells = <0>;
1846 reg = <0 0x11e05000 0 0x1000>;
1854 ranges = <0 0 0x11e30000 0xe00>;
1858 u2port1: usb-phy@0 {
1859 reg = <0x0 0x700>;
1867 reg = <0x700 0x700>;
1883 ranges = <0 0 0x11e40000 0xe00>;
1886 u2port0: usb-phy@0 {
1887 reg = <0x0 0x700>;
1895 reg = <0x700 0x700>;
1909 reg = <0 0x11e80000 0 0x10000>;
1920 #phy-cells = <0>;
1926 reg = <0 0x11fa0000 0 0xc000>;
1929 #phy-cells = <0>;
1936 reg = <0 0x13000000 0 0x4000>;
1939 interrupts = <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH 0>,
1940 <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH 0>,
1941 <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH 0>;
1955 reg = <0 0x13fbf000 0 0x1000>;
1961 reg = <0 0x14000000 0 0x1000>;
1963 mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0 0x1000>;
1968 reg = <0 0x1400f000 0 0x1000>;
1969 interrupts = <GIC_SPI 592 IRQ_TYPE_LEVEL_HIGH 0>;
1970 mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0xf000 0x1000>;
1977 reg = <0 0x14010000 0 0x1000>;
1988 reg = <0 0x14011000 0 0x1000>;
1999 reg = <0 0x14012000 0 0x1000>;
2010 reg = <0 0x14013000 0 0x1000>;
2021 reg = <0 0x14018000 0 0x1000>;
2026 interrupts = <GIC_SPI 594 IRQ_TYPE_LEVEL_HIGH 0>;
2035 reg = <0 0x14e00000 0 0x1000>;
2041 reg = <0 0x14e02000 0 0x1000>;
2047 reg = <0 0x14e03000 0 0x1000>;
2053 reg = <0 0x14e04000 0 0x1000>;
2064 reg = <0 0x14e05000 0 0x1000>;
2076 reg = <0 0x14f00000 0 0x1000>;
2078 mediatek,gce-client-reg = <&gce1 SUBSYS_14f0XXXX 0 0x1000>;
2083 reg = <0 0x14f01000 0 0x1000>;
2084 interrupts = <GIC_SPI 635 IRQ_TYPE_LEVEL_HIGH 0>;
2085 mediatek,gce-client-reg = <&gce1 SUBSYS_14f0XXXX 0x1000 0x1000>;
2092 reg = <0 0x14f02000 0 0x1000>;
2104 reg = <0 0x14f03000 0 0x1000>;
2116 reg = <0 0x15000000 0 0x1000>;
2122 reg = <0 0x15001000 0 0x1000>;
2134 reg = <0 0x15002000 0 0x1000>;
2145 reg = <0 0x15003000 0 0x1000>;
2156 reg = <0 0x15110000 0 0x1000>;
2162 reg = <0 0x15120000 0 0x1000>;
2173 reg = <0 0x15130000 0 0x1000>;
2179 reg = <0 0x15220000 0 0x1000>;
2185 reg = <0 0x15230000 0 0x1000>;
2196 reg = <0 0x15330000 0 0x1000>;
2202 reg = <0 0x15340000 0 0x1000>;
2213 reg = <0 0x16000000 0 0x1000>;
2219 reg = <0 0x16001000 0 0x1000>;
2231 reg = <0 0x16002000 0 0x1000>;
2242 reg = <0 0x16004000 0 0x1000>;
2253 reg = <0 0x16005000 0 0x1000>;
2264 reg = <0 0x16012000 0 0x1000>;
2275 reg = <0 0x16013000 0 0x1000>;
2286 reg = <0 0x16014000 0 0x1000>;
2297 reg = <0 0x16015000 0 0x1000>;
2308 reg = <0 0x1604f000 0 0x1000>;
2314 reg = <0 0x1606f000 0 0x1000>;
2320 reg = <0 0x1608f000 0 0x1000>;
2326 reg = <0 0x160af000 0 0x1000>;
2332 reg = <0 0x16140000 0 0x1000>;
2338 reg = <0 0x16141000 0 0x1000>;
2350 reg = <0 0x16142000 0 0x1000>;
2362 reg = <0 0x17200000 0 0x1000>;
2368 reg = <0 0x17201000 0 0x1000>;
2383 reg = <0 0x18000000 0 0x1000>,
2384 <0 0x18004000 0 0x1000>;
2385 ranges = <0 0 0 0x18000000 0 0x26000>;
2389 reg = <0 0x2000 0 0x800>;
2404 reg = <0 0x10000 0 0x800>;
2405 interrupts = <GIC_SPI 708 IRQ_TYPE_LEVEL_HIGH 0>;
2424 reg = <0 0x25000 0 0x1000>; /* VDEC_CORE_MISC */
2425 interrupts = <GIC_SPI 707 IRQ_TYPE_LEVEL_HIGH 0>;
2449 reg = <0 0x1800d000 0 0x1000>;
2460 reg = <0 0x1800e000 0 0x1000>;
2471 reg = <0 0x1800f000 0 0x1000>;
2477 reg = <0 0x1802e000 0 0x1000>;
2488 reg = <0 0x1802f000 0 0x1000>;
2494 reg = <0 0x1803e000 0 0x1000>;
2505 reg = <0 0x1803f000 0 0x1000>;
2511 reg = <0 0x190f3000 0 0x1000>;
2517 reg = <0 0x1a000000 0 0x1000>;
2523 reg = <0 0x1a010000 0 0x1000>;
2534 reg = <0 0x1a020000 0 0x10000>;
2544 interrupts = <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH 0>;
2570 reg = <0 0x1a040000 0 0x10000>;/* JPGDEC_C0 */
2577 interrupts = <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH 0>;
2585 reg = <0 0x1a050000 0 0x10000>;/* JPGDEC_C1 */
2592 interrupts = <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH 0>;
2600 reg = <0 0x1b040000 0 0x10000>;/* JPGDEC_C2 */
2607 interrupts = <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH 0>;
2616 reg = <0 0x1b000000 0 0x1000>;
2622 reg = <0 0x1c01a000 0 0x1000>;
2623 mboxes = <&gce0 0 CMDQ_THR_PRIO_4>;
2625 mediatek,gce-client-reg = <&gce0 SUBSYS_1c01XXXX 0xa000 0x1000>;
2642 reg = <0 0x1a030000 0 0x10000>;
2647 interrupts = <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH 0>;
2655 reg = <0 0x1b030000 0 0x10000>;
2660 interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH 0>;
2669 reg = <0 0x1b010000 0 0x1000>;
2681 reg = <0 0x1c000000 0 0x1000>;
2682 interrupts = <GIC_SPI 636 IRQ_TYPE_LEVEL_HIGH 0>;
2686 mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x0000 0x1000>;
2691 reg = <0 0x1c002000 0 0x1000>;
2692 interrupts = <GIC_SPI 638 IRQ_TYPE_LEVEL_HIGH 0>;
2696 mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x2000 0x1000>;
2701 reg = <0 0x1c003000 0 0x1000>;
2702 interrupts = <GIC_SPI 639 IRQ_TYPE_LEVEL_HIGH 0>;
2705 mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x3000 0x1000>;
2710 reg = <0 0x1c004000 0 0x1000>;
2711 interrupts = <GIC_SPI 640 IRQ_TYPE_LEVEL_HIGH 0>;
2714 mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x4000 0x1000>;
2719 reg = <0 0x1c005000 0 0x1000>;
2720 interrupts = <GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH 0>;
2723 mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x5000 0x1000>;
2728 reg = <0 0x1c006000 0 0x1000>;
2729 interrupts = <GIC_SPI 642 IRQ_TYPE_LEVEL_HIGH 0>;
2732 mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x6000 0x1000>;
2737 reg = <0 0x1c007000 0 0x1000>;
2738 interrupts = <GIC_SPI 643 IRQ_TYPE_LEVEL_HIGH 0>;
2741 mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x7000 0x1000>;
2746 reg = <0 0x1c009000 0 0x1000>;
2747 interrupts = <GIC_SPI 645 IRQ_TYPE_LEVEL_HIGH 0>;
2750 mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x9000 0x1000>;
2755 reg = <0 0x1c014000 0 0x1000>;
2756 interrupts = <GIC_SPI 656 IRQ_TYPE_LEVEL_HIGH 0>;
2759 mediatek,gce-client-reg = <&gce0 SUBSYS_1c01XXXX 0x4000 0x1000>;
2764 reg = <0 0x1c015000 0 0x1000>;
2765 interrupts = <GIC_SPI 657 IRQ_TYPE_LEVEL_HIGH 0>;
2775 reg = <0 0x1c016000 0 0x1000>;
2776 interrupts = <GIC_SPI 658 IRQ_TYPE_LEVEL_HIGH 0>;
2779 mediatek,gce-client-reg = <&gce0 SUBSYS_1c01XXXX 0x6000 0x1000>;
2785 reg = <0 0x1c018000 0 0x1000>;
2786 mediatek,larb-id = <0>;
2797 reg = <0 0x1c019000 0 0x1000>;
2809 reg = <0 0x1c100000 0 0x1000>;
2811 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x0000 0x1000>;
2818 reg = <0 0x1c01b000 0 0x1000>;
2830 reg = <0 0x1c01f000 0 0x1000>;
2835 interrupts = <GIC_SPI 669 IRQ_TYPE_LEVEL_HIGH 0>;
2844 reg = <0 0x1c101000 0 0x1000>;
2845 interrupts = <GIC_SPI 494 IRQ_TYPE_LEVEL_HIGH 0>;
2848 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x1000 0x1000>;
2854 reg = <0 0x1c102000 0 0x1000>;
2866 reg = <0 0x1c103000 0 0x1000>;
2878 reg = <0 0x1c104000 0 0x1000>;
2879 interrupts = <GIC_SPI 495 IRQ_TYPE_LEVEL_HIGH 0>;
2883 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x4000 0x1000>;
2889 reg = <0 0x1c105000 0 0x1000>;
2890 interrupts = <GIC_SPI 496 IRQ_TYPE_LEVEL_HIGH 0>;
2894 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x5000 0x1000>;
2900 reg = <0 0x1c106000 0 0x1000>;
2901 interrupts = <GIC_SPI 497 IRQ_TYPE_LEVEL_HIGH 0>;
2905 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x6000 0x1000>;
2911 reg = <0 0x1c107000 0 0x1000>;
2912 interrupts = <GIC_SPI 498 IRQ_TYPE_LEVEL_HIGH 0>;
2916 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x7000 0x1000>;
2922 reg = <0 0x1c108000 0 0x1000>;
2923 interrupts = <GIC_SPI 499 IRQ_TYPE_LEVEL_HIGH 0>;
2927 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x8000 0x1000>;
2933 reg = <0 0x1c109000 0 0x1000>;
2934 interrupts = <GIC_SPI 500 IRQ_TYPE_LEVEL_HIGH 0>;
2938 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x9000 0x1000>;
2944 reg = <0 0x1c10a000 0 0x1000>;
2945 interrupts = <GIC_SPI 501 IRQ_TYPE_LEVEL_HIGH 0>;
2949 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xa000 0x1000>;
2955 reg = <0 0x1c10b000 0 0x1000>;
2956 interrupts = <GIC_SPI 502 IRQ_TYPE_LEVEL_HIGH 0>;
2960 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xb000 0x1000>;
2966 reg = <0 0x1c10c000 0 0x1000>;
2967 interrupts = <GIC_SPI 503 IRQ_TYPE_LEVEL_HIGH 0>;
2972 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xc000 0x1000>;
2979 reg = <0 0x1c10d000 0 0x1000>;
2980 interrupts = <GIC_SPI 504 IRQ_TYPE_LEVEL_HIGH 0>;
2985 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xd000 0x1000>;
2992 reg = <0 0x1c10e000 0 0x1000>;
2993 interrupts = <GIC_SPI 505 IRQ_TYPE_LEVEL_HIGH 0>;
2998 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xe000 0x1000>;
3005 reg = <0 0x1c10f000 0 0x1000>;
3006 interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH 0>;
3011 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xf000 0x1000>;
3018 reg = <0 0x1c110000 0 0x1000>;
3019 interrupts = <GIC_SPI 507 IRQ_TYPE_LEVEL_HIGH 0>;
3024 mediatek,gce-client-reg = <&gce0 SUBSYS_1c11XXXX 0x0000 0x1000>;
3031 reg = <0 0x1c113000 0 0x1000>;
3032 interrupts = <GIC_SPI 513 IRQ_TYPE_LEVEL_HIGH 0>;
3043 reg = <0 0x1c114000 0 0x1000>,
3044 <0 0x1c115000 0 0x1000>,
3045 <0 0x1c117000 0 0x1000>,
3046 <0 0x1c119000 0 0x1000>,
3047 <0 0x1c11a000 0 0x1000>,
3048 <0 0x1c11b000 0 0x1000>,
3049 <0 0x1c11c000 0 0x1000>;
3052 mediatek,gce-client-reg = <&gce0 SUBSYS_1c11XXXX 0x4000 0x1000>,
3053 <&gce0 SUBSYS_1c11XXXX 0x5000 0x1000>,
3054 <&gce0 SUBSYS_1c11XXXX 0x7000 0x1000>,
3055 <&gce0 SUBSYS_1c11XXXX 0x9000 0x1000>,
3056 <&gce0 SUBSYS_1c11XXXX 0xa000 0x1000>,
3057 <&gce0 SUBSYS_1c11XXXX 0xb000 0x1000>,
3058 <&gce0 SUBSYS_1c11XXXX 0xc000 0x1000>;
3079 interrupts = <GIC_SPI 517 IRQ_TYPE_LEVEL_HIGH 0>; /* disp mixer */
3091 reg = <0 0x1c500000 0 0x8000>;
3095 interrupts = <GIC_SPI 676 IRQ_TYPE_LEVEL_HIGH 0>;
3102 reg = <0 0x1c600000 0 0x8000>;
3106 interrupts = <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH 0>;