Lines Matching +full:0 +full:x10720000
51 #size-cells = <0>;
53 cpu0: cpu@0 {
56 reg = <0x000>;
58 performance-domains = <&performance 0>;
75 reg = <0x100>;
77 performance-domains = <&performance 0>;
94 reg = <0x200>;
96 performance-domains = <&performance 0>;
113 reg = <0x300>;
115 performance-domains = <&performance 0>;
132 reg = <0x400>;
151 reg = <0x500>;
170 reg = <0x600>;
189 reg = <0x700>;
246 arm,psci-suspend-param = <0x00010001>;
255 arm,psci-suspend-param = <0x00010001>;
264 arm,psci-suspend-param = <0x01010002>;
273 arm,psci-suspend-param = <0x01010002>;
313 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH 0>;
332 #clock-cells = <0>;
341 #clock-cells = <0>;
348 #clock-cells = <0>;
355 reg = <0 0x0011bc10 0 0x120>, <0 0x0011bd30 0 0x120>;
449 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH 0>,
450 <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH 0>,
451 <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH 0>,
452 <GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH 0>;
460 dma-ranges = <0x0 0x0 0x0 0x0 0x4 0x0>;
468 reg = <0 0x0c000000 0 0x40000>,
469 <0 0x0c040000 0 0x200000>;
470 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH 0>;
473 ppi_cluster0: interrupt-partition-0 {
485 reg = <0 0x10000000 0 0x1000>;
491 reg = <0 0x10001000 0 0x1000>;
498 reg = <0 0x10003000 0 0x1000>;
504 reg = <0 0x10005000 0 0x1000>,
505 <0 0x11d10000 0 0x1000>,
506 <0 0x11d30000 0 0x1000>,
507 <0 0x11d40000 0 0x1000>,
508 <0 0x11e20000 0 0x1000>,
509 <0 0x11eb0000 0 0x1000>,
510 <0 0x11f40000 0 0x1000>,
511 <0 0x1000b000 0 0x1000>;
517 gpio-ranges = <&pio 0 0 144>;
519 interrupts = <GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH 0>;
525 reg = <0 0x10006000 0 0x1000>;
531 #size-cells = <0>;
538 #size-cells = <0>;
548 #size-cells = <0>;
553 #power-domain-cells = <0>;
558 #power-domain-cells = <0>;
563 #power-domain-cells = <0>;
568 #power-domain-cells = <0>;
573 #power-domain-cells = <0>;
609 "vppsys0-0", "vppsys0-1", "vppsys0-2", "vppsys0-3",
617 #size-cells = <0>;
629 clock-names = "vdosys0", "vdosys0-0", "vdosys0-1",
634 #size-cells = <0>;
642 clock-names = "vppsys1", "vppsys1-0",
645 #power-domain-cells = <0>;
654 clock-names = "wepsys-0", "wepsys-1", "wepsys-2",
657 #power-domain-cells = <0>;
663 clock-names = "vdec0-0";
666 #size-cells = <0>;
667 #power-domain-cells = <0>;
672 clock-names = "vdec1-0";
674 #power-domain-cells = <0>;
680 clock-names = "vdec2-0";
682 #power-domain-cells = <0>;
692 #size-cells = <0>;
693 #power-domain-cells = <0>;
700 #power-domain-cells = <0>;
710 clock-names = "vdosys1", "vdosys1-0",
714 #size-cells = <0>;
720 #power-domain-cells = <0>;
726 #power-domain-cells = <0>;
733 #power-domain-cells = <0>;
741 clock-names = "img-0", "img-1";
744 #size-cells = <0>;
749 #power-domain-cells = <0>;
757 clock-names = "ipe", "ipe-0", "ipe-1";
759 #power-domain-cells = <0>;
770 clock-names = "cam-0", "cam-1", "cam-2", "cam-3",
774 #size-cells = <0>;
779 #power-domain-cells = <0>;
784 #power-domain-cells = <0>;
789 #power-domain-cells = <0>;
798 #power-domain-cells = <0>;
804 #power-domain-cells = <0>;
809 #power-domain-cells = <0>;
814 #power-domain-cells = <0>;
822 #power-domain-cells = <0>;
829 #power-domain-cells = <0>;
838 #size-cells = <0>;
851 #power-domain-cells = <0>;
860 reg = <0 0x10007000 0 0x100>;
866 reg = <0 0x1000c000 0 0x1000>;
873 reg = <0 0x10017000 0 0x1000>;
874 interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH 0>;
880 reg = <0 0x10024000 0 0x1000>;
882 interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH 0>;
892 reg = <0 0x10027000 0 0x000e00>,
893 <0 0x10029000 0 0x000100>;
907 reg = <0 0x10315000 0 0x5000>;
908 interrupts = <GIC_SPI 795 IRQ_TYPE_LEVEL_HIGH 0>,
909 <GIC_SPI 796 IRQ_TYPE_LEVEL_HIGH 0>,
910 <GIC_SPI 797 IRQ_TYPE_LEVEL_HIGH 0>,
911 <GIC_SPI 798 IRQ_TYPE_LEVEL_HIGH 0>,
912 <GIC_SPI 799 IRQ_TYPE_LEVEL_HIGH 0>;
918 reg = <0 0x10320000 0 0x4000>;
919 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH 0>;
926 reg = <0 0x10330000 0 0x4000>;
927 interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH 0>;
934 reg = <0 0x10500000 0 0x100000>,
935 <0 0x10720000 0 0xe0000>,
936 <0 0x10700000 0 0x8000>;
938 interrupts = <GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH 0>;
944 reg = <0 0x10720000 0 0x1000>;
950 reg = <0 0x10803000 0 0x1000>,
951 <0 0x10840000 0 0x40000>;
973 #mbox-cells = <0>;
974 reg = <0 0x10816000 0 0x1000>;
975 interrupts = <GIC_SPI 702 IRQ_TYPE_LEVEL_HIGH 0>;
980 #mbox-cells = <0>;
981 reg = <0 0x10817000 0 0x1000>;
982 interrupts = <GIC_SPI 703 IRQ_TYPE_LEVEL_HIGH 0>;
987 reg = <0 0x10890000 0 0x10000>;
990 interrupts = <GIC_SPI 822 IRQ_TYPE_LEVEL_HIGH 0>;
1037 reg = <0 0x11001100 0 0x100>;
1038 interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH 0>;
1047 reg = <0 0x11001200 0 0x100>;
1048 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH 0>;
1057 reg = <0 0x11001300 0 0x100>;
1058 interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH 0>;
1067 reg = <0 0x11001400 0 0x100>;
1068 interrupts = <GIC_SPI 723 IRQ_TYPE_LEVEL_HIGH 0>;
1077 reg = <0 0x11001500 0 0x100>;
1078 interrupts = <GIC_SPI 724 IRQ_TYPE_LEVEL_HIGH 0>;
1087 reg = <0 0x11001600 0 0x100>;
1088 interrupts = <GIC_SPI 725 IRQ_TYPE_LEVEL_HIGH 0>;
1097 reg = <0 0x11002000 0 0x1000>;
1106 reg = <0 0x11003000 0 0x1000>;
1114 #size-cells = <0>;
1115 reg = <0 0x1100a000 0 0x1000>;
1116 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH 0>;
1126 reg = <0 0x1100b000 0 0x1000>;
1127 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH 0>;
1137 reg = <0 0x1100e000 0 0x1000>;
1138 interrupts = <GIC_SPI 203 IRQ_TYPE_LEVEL_LOW 0>;
1149 reg = <0 0x1100f000 0 0x1000>;
1150 interrupts = <GIC_SPI 793 IRQ_TYPE_LEVEL_HIGH 0>;
1162 #size-cells = <0>;
1163 reg = <0 0x11010000 0 0x1000>;
1164 interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH 0>;
1176 #size-cells = <0>;
1177 reg = <0 0x11012000 0 0x1000>;
1178 interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH 0>;
1190 #size-cells = <0>;
1191 reg = <0 0x11013000 0 0x1000>;
1192 interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH 0>;
1204 #size-cells = <0>;
1205 reg = <0 0x11018000 0 0x1000>;
1206 interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH 0>;
1218 #size-cells = <0>;
1219 reg = <0 0x11019000 0 0x1000>;
1220 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH 0>;
1230 reg = <0 0x1101d000 0 0x1000>;
1231 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH 0>;
1241 reg = <0 0x1101e000 0 0x1000>;
1242 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH 0>;
1252 reg = <0 0x11021000 0 0x4000>;
1253 interrupts = <GIC_SPI 716 IRQ_TYPE_LEVEL_HIGH 0>;
1280 snps,clk-csr = <0>;
1286 #size-cells = <0>;
1290 snps,wr_osr_lmt = <0x7>;
1291 snps,rd_osr_lmt = <0x7>;
1292 snps,blen = <0 0 0 0 16 8 4>;
1300 snps,map-to-dma-channel = <0x0>;
1304 snps,map-to-dma-channel = <0x0>;
1308 snps,map-to-dma-channel = <0x0>;
1312 snps,map-to-dma-channel = <0x0>;
1320 snps,weight = <0x10>;
1322 snps,priority = <0x0>;
1325 snps,weight = <0x11>;
1327 snps,priority = <0x1>;
1330 snps,weight = <0x12>;
1332 snps,priority = <0x2>;
1335 snps,weight = <0x13>;
1337 snps,priority = <0x3>;
1345 reg = <0 0x11200000 0 0x1000>,
1346 <0 0x11203e00 0 0x0100>;
1348 interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH 0>;
1362 mediatek,syscon-wakeup = <&pericfg 0x400 103>;
1370 reg = <0 0x11230000 0 0x10000>,
1371 <0 0x11f50000 0 0x1000>;
1372 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH 0>;
1383 reg = <0 0x11240000 0 0x1000>,
1384 <0 0x11c70000 0 0x1000>;
1385 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH 0>;
1398 reg = <0 0x11250000 0 0x1000>,
1399 <0 0x11e60000 0 0x1000>;
1400 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH 0>;
1412 reg = <0 0x11278000 0 0x1000>;
1413 interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH 0>;
1424 reg = <0 0x11290000 0 0x1000>,
1425 <0 0x11293e00 0 0x0100>;
1427 interrupts = <GIC_SPI 530 IRQ_TYPE_LEVEL_HIGH 0>;
1440 mediatek,syscon-wakeup = <&pericfg 0x400 104>;
1448 reg = <0 0x112a0000 0 0x1000>,
1449 <0 0x112a3e00 0 0x0100>;
1451 interrupts = <GIC_SPI 533 IRQ_TYPE_LEVEL_HIGH 0>;
1464 mediatek,syscon-wakeup = <&pericfg 0x400 105>;
1472 reg = <0 0x112b0000 0 0x1000>,
1473 <0 0x112b3e00 0 0x0100>;
1475 interrupts = <GIC_SPI 536 IRQ_TYPE_LEVEL_HIGH 0>;
1488 mediatek,syscon-wakeup = <&pericfg 0x400 106>;
1499 reg = <0 0x112f0000 0 0x4000>;
1501 interrupts = <GIC_SPI 791 IRQ_TYPE_LEVEL_HIGH 0>;
1502 bus-range = <0x00 0xff>;
1503 ranges = <0x81000000 0 0x20000000
1504 0x0 0x20000000 0 0x200000>,
1505 <0x82000000 0 0x20200000
1506 0x0 0x20200000 0 0x3e00000>;
1508 iommu-map = <0 &iommu_infra IOMMU_PORT_INFRA_PCIE0 0x2>;
1509 iommu-map-mask = <0x0>;
1531 interrupt-map-mask = <0 0 0 7>;
1532 interrupt-map = <0 0 0 1 &pcie_intc0 0>,
1533 <0 0 0 2 &pcie_intc0 1>,
1534 <0 0 0 3 &pcie_intc0 2>,
1535 <0 0 0 4 &pcie_intc0 3>;
1540 #address-cells = <0>;
1551 reg = <0 0x112f8000 0 0x4000>;
1553 interrupts = <GIC_SPI 792 IRQ_TYPE_LEVEL_HIGH 0>;
1554 bus-range = <0x00 0xff>;
1555 ranges = <0x81000000 0 0x24000000
1556 0x0 0x24000000 0 0x200000>,
1557 <0x82000000 0 0x24200000
1558 0x0 0x24200000 0 0x3e00000>;
1560 iommu-map = <0 &iommu_infra IOMMU_PORT_INFRA_PCIE1 0x2>;
1561 iommu-map-mask = <0x0>;
1580 interrupt-map-mask = <0 0 0 7>;
1581 interrupt-map = <0 0 0 1 &pcie_intc1 0>,
1582 <0 0 0 2 &pcie_intc1 1>,
1583 <0 0 0 3 &pcie_intc1 2>,
1584 <0 0 0 4 &pcie_intc1 3>;
1589 #address-cells = <0>;
1597 reg = <0 0x1132c000 0 0x1000>;
1598 interrupts = <GIC_SPI 825 IRQ_TYPE_LEVEL_HIGH 0>;
1604 #size-cells = <0>;
1610 reg = <0 0x11c10000 0 0x1000>;
1614 reg = <0x184 0x1>;
1615 bits = <0 5>;
1618 reg = <0x184 0x2>;
1622 reg = <0x185 0x1>;
1626 reg = <0x186 0x1>;
1627 bits = <0 5>;
1630 reg = <0x186 0x2>;
1634 reg = <0x187 0x1>;
1638 reg = <0x188 0x1>;
1639 bits = <0 5>;
1642 reg = <0x188 0x2>;
1646 reg = <0x189 0x1>;
1650 reg = <0x189 0x2>;
1654 reg = <0x190 0x1>;
1655 bits = <0 4>;
1658 reg = <0x190 0x1>;
1662 reg = <0x191 0x1>;
1663 bits = <0 4>;
1666 reg = <0x191 0x1>;
1670 reg = <0x192 0x1>;
1671 bits = <0 4>;
1674 reg = <0x192 0x1>;
1678 reg = <0x193 0x1>;
1679 bits = <0 4>;
1682 reg = <0x1ac 0x10>;
1685 reg = <0x1bc 0x14>;
1688 reg = <0x1d0 0x38>;
1696 ranges = <0 0 0x11c40000 0x700>;
1699 u2port2: usb-phy@0 {
1700 reg = <0x0 0x700>;
1711 ranges = <0 0 0x11c50000 0x700>;
1714 u2port3: usb-phy@0 {
1715 reg = <0x0 0x700>;
1725 reg = <0 0x11d00000 0 0x1000>,
1726 <0 0x10220580 0 0x80>;
1727 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH 0>;
1733 #size-cells = <0>;
1740 reg = <0 0x11d01000 0 0x1000>,
1741 <0 0x10220600 0 0x80>;
1742 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH 0>;
1748 #size-cells = <0>;
1755 reg = <0 0x11d02000 0 0x1000>,
1756 <0 0x10220680 0 0x80>;
1757 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH 0>;
1763 #size-cells = <0>;
1769 reg = <0 0x11d03000 0 0x1000>;
1776 reg = <0 0x11e00000 0 0x1000>,
1777 <0 0x10220080 0 0x80>;
1778 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH 0>;
1784 #size-cells = <0>;
1791 reg = <0 0x11e01000 0 0x1000>,
1792 <0 0x10220200 0 0x80>;
1793 interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH 0>;
1799 #size-cells = <0>;
1806 reg = <0 0x11e02000 0 0x1000>,
1807 <0 0x10220380 0 0x80>;
1808 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH 0>;
1814 #size-cells = <0>;
1821 reg = <0 0x11e03000 0 0x1000>,
1822 <0 0x10220480 0 0x80>;
1823 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH 0>;
1829 #size-cells = <0>;
1836 reg = <0 0x11e04000 0 0x1000>,
1837 <0 0x10220500 0 0x80>;
1838 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH 0>;
1844 #size-cells = <0>;
1850 reg = <0 0x11e05000 0 0x1000>;
1858 ranges = <0 0 0x11e30000 0xe00>;
1862 u2port1: usb-phy@0 {
1863 reg = <0x0 0x700>;
1871 reg = <0x700 0x700>;
1887 ranges = <0 0 0x11e40000 0xe00>;
1890 u2port0: usb-phy@0 {
1891 reg = <0x0 0x700>;
1899 reg = <0x700 0x700>;
1913 reg = <0 0x11e80000 0 0x10000>;
1924 #phy-cells = <0>;
1930 reg = <0 0x11fa0000 0 0xc000>;
1933 #phy-cells = <0>;
1940 reg = <0 0x13000000 0 0x4000>;
1943 interrupts = <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH 0>,
1944 <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH 0>,
1945 <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH 0>;
1959 reg = <0 0x13fbf000 0 0x1000>;
1965 reg = <0 0x14000000 0 0x1000>;
1967 mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0 0x1000>;
1972 reg = <0 0x1400f000 0 0x1000>;
1973 interrupts = <GIC_SPI 592 IRQ_TYPE_LEVEL_HIGH 0>;
1974 mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0xf000 0x1000>;
1981 reg = <0 0x14010000 0 0x1000>;
1992 reg = <0 0x14011000 0 0x1000>;
2003 reg = <0 0x14012000 0 0x1000>;
2014 reg = <0 0x14013000 0 0x1000>;
2025 reg = <0 0x14018000 0 0x1000>;
2030 interrupts = <GIC_SPI 594 IRQ_TYPE_LEVEL_HIGH 0>;
2039 reg = <0 0x14e00000 0 0x1000>;
2045 reg = <0 0x14e02000 0 0x1000>;
2051 reg = <0 0x14e03000 0 0x1000>;
2057 reg = <0 0x14e04000 0 0x1000>;
2068 reg = <0 0x14e05000 0 0x1000>;
2080 reg = <0 0x14f00000 0 0x1000>;
2082 mediatek,gce-client-reg = <&gce1 SUBSYS_14f0XXXX 0 0x1000>;
2087 reg = <0 0x14f01000 0 0x1000>;
2088 interrupts = <GIC_SPI 635 IRQ_TYPE_LEVEL_HIGH 0>;
2089 mediatek,gce-client-reg = <&gce1 SUBSYS_14f0XXXX 0x1000 0x1000>;
2096 reg = <0 0x14f02000 0 0x1000>;
2108 reg = <0 0x14f03000 0 0x1000>;
2120 reg = <0 0x15000000 0 0x1000>;
2126 reg = <0 0x15001000 0 0x1000>;
2138 reg = <0 0x15002000 0 0x1000>;
2149 reg = <0 0x15003000 0 0x1000>;
2160 reg = <0 0x15110000 0 0x1000>;
2166 reg = <0 0x15120000 0 0x1000>;
2177 reg = <0 0x15130000 0 0x1000>;
2183 reg = <0 0x15220000 0 0x1000>;
2189 reg = <0 0x15230000 0 0x1000>;
2200 reg = <0 0x15330000 0 0x1000>;
2206 reg = <0 0x15340000 0 0x1000>;
2217 reg = <0 0x16000000 0 0x1000>;
2223 reg = <0 0x16001000 0 0x1000>;
2235 reg = <0 0x16002000 0 0x1000>;
2246 reg = <0 0x16004000 0 0x1000>;
2257 reg = <0 0x16005000 0 0x1000>;
2268 reg = <0 0x16012000 0 0x1000>;
2279 reg = <0 0x16013000 0 0x1000>;
2290 reg = <0 0x16014000 0 0x1000>;
2301 reg = <0 0x16015000 0 0x1000>;
2312 reg = <0 0x1604f000 0 0x1000>;
2318 reg = <0 0x1606f000 0 0x1000>;
2324 reg = <0 0x1608f000 0 0x1000>;
2330 reg = <0 0x160af000 0 0x1000>;
2336 reg = <0 0x16140000 0 0x1000>;
2342 reg = <0 0x16141000 0 0x1000>;
2354 reg = <0 0x16142000 0 0x1000>;
2366 reg = <0 0x17200000 0 0x1000>;
2372 reg = <0 0x17201000 0 0x1000>;
2387 reg = <0 0x18000000 0 0x1000>,
2388 <0 0x18004000 0 0x1000>;
2389 ranges = <0 0 0 0x18000000 0 0x26000>;
2393 reg = <0 0x2000 0 0x800>;
2408 reg = <0 0x10000 0 0x800>;
2409 interrupts = <GIC_SPI 708 IRQ_TYPE_LEVEL_HIGH 0>;
2428 reg = <0 0x25000 0 0x1000>; /* VDEC_CORE_MISC */
2429 interrupts = <GIC_SPI 707 IRQ_TYPE_LEVEL_HIGH 0>;
2453 reg = <0 0x1800d000 0 0x1000>;
2464 reg = <0 0x1800e000 0 0x1000>;
2475 reg = <0 0x1800f000 0 0x1000>;
2481 reg = <0 0x1802e000 0 0x1000>;
2492 reg = <0 0x1802f000 0 0x1000>;
2498 reg = <0 0x1803e000 0 0x1000>;
2509 reg = <0 0x1803f000 0 0x1000>;
2515 reg = <0 0x190f3000 0 0x1000>;
2521 reg = <0 0x1a000000 0 0x1000>;
2527 reg = <0 0x1a010000 0 0x1000>;
2538 reg = <0 0x1a020000 0 0x10000>;
2548 interrupts = <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH 0>;
2574 reg = <0 0x1a040000 0 0x10000>;/* JPGDEC_C0 */
2581 interrupts = <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH 0>;
2589 reg = <0 0x1a050000 0 0x10000>;/* JPGDEC_C1 */
2596 interrupts = <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH 0>;
2604 reg = <0 0x1b040000 0 0x10000>;/* JPGDEC_C2 */
2611 interrupts = <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH 0>;
2620 reg = <0 0x1b000000 0 0x1000>;
2626 reg = <0 0x1c01a000 0 0x1000>;
2627 mboxes = <&gce0 0 CMDQ_THR_PRIO_4>;
2629 mediatek,gce-client-reg = <&gce0 SUBSYS_1c01XXXX 0xa000 0x1000>;
2646 reg = <0 0x1a030000 0 0x10000>;
2651 interrupts = <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH 0>;
2659 reg = <0 0x1b030000 0 0x10000>;
2664 interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH 0>;
2673 reg = <0 0x1b010000 0 0x1000>;
2685 reg = <0 0x1c000000 0 0x1000>;
2686 interrupts = <GIC_SPI 636 IRQ_TYPE_LEVEL_HIGH 0>;
2690 mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x0000 0x1000>;
2695 reg = <0 0x1c002000 0 0x1000>;
2696 interrupts = <GIC_SPI 638 IRQ_TYPE_LEVEL_HIGH 0>;
2700 mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x2000 0x1000>;
2705 reg = <0 0x1c003000 0 0x1000>;
2706 interrupts = <GIC_SPI 639 IRQ_TYPE_LEVEL_HIGH 0>;
2709 mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x3000 0x1000>;
2714 reg = <0 0x1c004000 0 0x1000>;
2715 interrupts = <GIC_SPI 640 IRQ_TYPE_LEVEL_HIGH 0>;
2718 mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x4000 0x1000>;
2723 reg = <0 0x1c005000 0 0x1000>;
2724 interrupts = <GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH 0>;
2727 mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x5000 0x1000>;
2732 reg = <0 0x1c006000 0 0x1000>;
2733 interrupts = <GIC_SPI 642 IRQ_TYPE_LEVEL_HIGH 0>;
2736 mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x6000 0x1000>;
2741 reg = <0 0x1c007000 0 0x1000>;
2742 interrupts = <GIC_SPI 643 IRQ_TYPE_LEVEL_HIGH 0>;
2745 mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x7000 0x1000>;
2750 reg = <0 0x1c009000 0 0x1000>;
2751 interrupts = <GIC_SPI 645 IRQ_TYPE_LEVEL_HIGH 0>;
2754 mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x9000 0x1000>;
2759 reg = <0 0x1c014000 0 0x1000>;
2760 interrupts = <GIC_SPI 656 IRQ_TYPE_LEVEL_HIGH 0>;
2763 mediatek,gce-client-reg = <&gce0 SUBSYS_1c01XXXX 0x4000 0x1000>;
2768 reg = <0 0x1c015000 0 0x1000>;
2769 interrupts = <GIC_SPI 657 IRQ_TYPE_LEVEL_HIGH 0>;
2779 reg = <0 0x1c016000 0 0x1000>;
2780 interrupts = <GIC_SPI 658 IRQ_TYPE_LEVEL_HIGH 0>;
2783 mediatek,gce-client-reg = <&gce0 SUBSYS_1c01XXXX 0x6000 0x1000>;
2789 reg = <0 0x1c018000 0 0x1000>;
2790 mediatek,larb-id = <0>;
2801 reg = <0 0x1c019000 0 0x1000>;
2813 reg = <0 0x1c100000 0 0x1000>;
2815 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x0000 0x1000>;
2822 reg = <0 0x1c01b000 0 0x1000>;
2834 reg = <0 0x1c01f000 0 0x1000>;
2839 interrupts = <GIC_SPI 669 IRQ_TYPE_LEVEL_HIGH 0>;
2848 reg = <0 0x1c101000 0 0x1000>;
2849 interrupts = <GIC_SPI 494 IRQ_TYPE_LEVEL_HIGH 0>;
2852 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x1000 0x1000>;
2858 reg = <0 0x1c102000 0 0x1000>;
2870 reg = <0 0x1c103000 0 0x1000>;
2882 reg = <0 0x1c104000 0 0x1000>;
2883 interrupts = <GIC_SPI 495 IRQ_TYPE_LEVEL_HIGH 0>;
2887 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x4000 0x1000>;
2893 reg = <0 0x1c105000 0 0x1000>;
2894 interrupts = <GIC_SPI 496 IRQ_TYPE_LEVEL_HIGH 0>;
2898 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x5000 0x1000>;
2904 reg = <0 0x1c106000 0 0x1000>;
2905 interrupts = <GIC_SPI 497 IRQ_TYPE_LEVEL_HIGH 0>;
2909 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x6000 0x1000>;
2915 reg = <0 0x1c107000 0 0x1000>;
2916 interrupts = <GIC_SPI 498 IRQ_TYPE_LEVEL_HIGH 0>;
2920 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x7000 0x1000>;
2926 reg = <0 0x1c108000 0 0x1000>;
2927 interrupts = <GIC_SPI 499 IRQ_TYPE_LEVEL_HIGH 0>;
2931 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x8000 0x1000>;
2937 reg = <0 0x1c109000 0 0x1000>;
2938 interrupts = <GIC_SPI 500 IRQ_TYPE_LEVEL_HIGH 0>;
2942 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x9000 0x1000>;
2948 reg = <0 0x1c10a000 0 0x1000>;
2949 interrupts = <GIC_SPI 501 IRQ_TYPE_LEVEL_HIGH 0>;
2953 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xa000 0x1000>;
2959 reg = <0 0x1c10b000 0 0x1000>;
2960 interrupts = <GIC_SPI 502 IRQ_TYPE_LEVEL_HIGH 0>;
2964 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xb000 0x1000>;
2970 reg = <0 0x1c10c000 0 0x1000>;
2971 interrupts = <GIC_SPI 503 IRQ_TYPE_LEVEL_HIGH 0>;
2976 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xc000 0x1000>;
2983 reg = <0 0x1c10d000 0 0x1000>;
2984 interrupts = <GIC_SPI 504 IRQ_TYPE_LEVEL_HIGH 0>;
2989 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xd000 0x1000>;
2996 reg = <0 0x1c10e000 0 0x1000>;
2997 interrupts = <GIC_SPI 505 IRQ_TYPE_LEVEL_HIGH 0>;
3002 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xe000 0x1000>;
3009 reg = <0 0x1c10f000 0 0x1000>;
3010 interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH 0>;
3015 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xf000 0x1000>;
3022 reg = <0 0x1c110000 0 0x1000>;
3023 interrupts = <GIC_SPI 507 IRQ_TYPE_LEVEL_HIGH 0>;
3028 mediatek,gce-client-reg = <&gce0 SUBSYS_1c11XXXX 0x0000 0x1000>;
3035 reg = <0 0x1c113000 0 0x1000>;
3036 interrupts = <GIC_SPI 513 IRQ_TYPE_LEVEL_HIGH 0>;
3047 reg = <0 0x1c114000 0 0x1000>,
3048 <0 0x1c115000 0 0x1000>,
3049 <0 0x1c117000 0 0x1000>,
3050 <0 0x1c119000 0 0x1000>,
3051 <0 0x1c11a000 0 0x1000>,
3052 <0 0x1c11b000 0 0x1000>,
3053 <0 0x1c11c000 0 0x1000>;
3056 mediatek,gce-client-reg = <&gce0 SUBSYS_1c11XXXX 0x4000 0x1000>,
3057 <&gce0 SUBSYS_1c11XXXX 0x5000 0x1000>,
3058 <&gce0 SUBSYS_1c11XXXX 0x7000 0x1000>,
3059 <&gce0 SUBSYS_1c11XXXX 0x9000 0x1000>,
3060 <&gce0 SUBSYS_1c11XXXX 0xa000 0x1000>,
3061 <&gce0 SUBSYS_1c11XXXX 0xb000 0x1000>,
3062 <&gce0 SUBSYS_1c11XXXX 0xc000 0x1000>;
3083 interrupts = <GIC_SPI 517 IRQ_TYPE_LEVEL_HIGH 0>; /* disp mixer */
3095 reg = <0 0x1c500000 0 0x8000>;
3099 interrupts = <GIC_SPI 676 IRQ_TYPE_LEVEL_HIGH 0>;
3106 reg = <0 0x1c600000 0 0x8000>;
3110 interrupts = <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH 0>;