Lines Matching +full:gxbb +full:- +full:clkc
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include "meson-gx.dtsi"
7 #include "meson-gx-mali450.dtsi"
8 #include <dt-bindings/gpio/meson-gxbb-gpio.h>
9 #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
10 #include <dt-bindings/clock/gxbb-clkc.h>
11 #include <dt-bindings/clock/gxbb-aoclkc.h>
12 #include <dt-bindings/reset/gxbb-aoclkc.h>
15 compatible = "amlogic,meson-gxbb";
19 compatible = "amlogic,meson-gxbb-usb2-phy";
20 #phy-cells = <0>;
23 clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB0>;
24 clock-names = "usb_general", "usb";
29 compatible = "amlogic,meson-gxbb-usb2-phy";
30 #phy-cells = <0>;
33 clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1>;
34 clock-names = "usb_general", "usb";
39 compatible = "amlogic,meson-gxbb-usb", "snps,dwc2";
42 clocks = <&clkc CLKID_USB0_DDR_BRIDGE>;
43 clock-names = "otg";
45 phy-names = "usb2-phy";
51 compatible = "amlogic,meson-gxbb-usb", "snps,dwc2";
54 clocks = <&clkc CLKID_USB1_DDR_BRIDGE>;
55 clock-names = "otg";
57 phy-names = "usb2-phy";
65 compatible = "amlogic,aiu-gxbb", "amlogic,aiu";
66 clocks = <&clkc CLKID_AIU_GLUE>,
67 <&clkc CLKID_I2S_OUT>,
68 <&clkc CLKID_AOCLK_GATE>,
69 <&clkc CLKID_CTS_AMCLK>,
70 <&clkc CLKID_MIXER_IFACE>,
71 <&clkc CLKID_IEC958>,
72 <&clkc CLKID_IEC958_GATE>,
73 <&clkc CLKID_CTS_MCLK_I958>,
74 <&clkc CLKID_CTS_I958>;
75 clock-names = "pclk",
89 compatible = "amlogic,meson-gxbb-aobus-pinctrl";
90 #address-cells = <2>;
91 #size-cells = <2>;
98 reg-names = "mux", "pull", "gpio";
99 gpio-controller;
100 #gpio-cells = <2>;
101 gpio-ranges = <&pinctrl_aobus 0 0 14>;
108 bias-disable;
117 bias-disable;
125 bias-disable;
134 bias-disable;
142 bias-disable;
151 bias-disable;
159 bias-disable;
167 bias-disable;
175 bias-disable;
183 bias-disable;
191 bias-disable;
199 bias-disable;
207 bias-disable;
215 bias-disable;
223 bias-disable;
231 bias-disable;
246 bias-disable;
254 bias-disable;
262 bias-disable;
270 compatible = "amlogic,meson-gxbb-spifc";
272 #address-cells = <1>;
273 #size-cells = <0>;
274 clocks = <&clkc CLKID_SPI>;
281 clock-names = "core";
285 compatible = "amlogic,meson-gxbb-aoclkc", "amlogic,meson-gx-aoclkc";
286 clocks = <&xtal>, <&clkc CLKID_CLK81>;
287 clock-names = "xtal", "mpeg-clk";
291 clocks = <&clkc CLKID_EFUSE>;
295 clocks = <&clkc CLKID_ETH>,
296 <&clkc CLKID_FCLK_DIV2>,
297 <&clkc CLKID_MPLL2>,
298 <&clkc CLKID_FCLK_DIV2>;
299 clock-names = "stmmaceth", "clkin0", "clkin1", "timing-adjustment";
303 compatible = "amlogic,meson-gxbb-gpio-intc",
304 "amlogic,meson-gpio-intc";
309 compatible = "amlogic,meson-gxbb-dw-hdmi", "amlogic,meson-gx-dw-hdmi";
313 reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy";
314 clocks = <&clkc CLKID_HDMI>,
315 <&clkc CLKID_HDMI_PCLK>,
316 <&clkc CLKID_GCLK_VENCI_INT0>;
317 clock-names = "isfr", "iahb", "venci";
318 power-domains = <&pwrc PWRC_GXBB_VPU_ID>;
320 assigned-clocks = <&clkc CLKID_HDMI_SEL>,
321 <&clkc CLKID_HDMI>;
322 assigned-clock-parents = <&xtal>, <0>;
323 assigned-clock-rates = <0>, <24000000>;
327 clkc: clock-controller { label
328 compatible = "amlogic,gxbb-clkc";
329 #clock-cells = <1>;
331 clock-names = "xtal";
336 clocks = <&clkc CLKID_RNG0>;
337 clock-names = "core";
341 clocks = <&clkc CLKID_I2C>;
345 clocks = <&clkc CLKID_AO_I2C>;
349 clocks = <&clkc CLKID_I2C>;
353 clocks = <&clkc CLKID_I2C>;
357 compatible = "amlogic,meson-gxbb-mali", "arm,mali-450";
359 clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>;
360 clock-names = "bus", "core";
362 assigned-clocks = <&clkc CLKID_GP0_PLL>;
363 assigned-clock-rates = <744000000>;
368 compatible = "amlogic,meson-gxbb-periphs-pinctrl";
369 #address-cells = <2>;
370 #size-cells = <2>;
378 reg-names = "mux", "pull", "pull-enable", "gpio";
379 gpio-controller;
380 #gpio-cells = <2>;
381 gpio-ranges = <&pinctrl_periphs 0 0 119>;
385 mux-0 {
389 bias-pull-up;
392 mux-1 {
395 bias-disable;
399 emmc_ds_pins: emmc-ds {
403 bias-pull-down;
411 bias-pull-down;
422 bias-disable;
426 spi_pins: spi-pins {
432 bias-disable;
436 spi_idle_high_pins: spi-idle-high-pins {
439 bias-pull-up;
443 spi_idle_low_pins: spi-idle-low-pins {
446 bias-pull-down;
450 spi_ss0_pins: spi-ss0 {
454 bias-disable;
459 mux-0 {
466 bias-pull-up;
469 mux-1 {
472 bias-disable;
480 bias-pull-down;
485 mux-0 {
492 bias-pull-up;
495 mux-1 {
498 bias-disable;
506 bias-pull-down;
514 bias-disable;
523 bias-disable;
532 bias-disable;
541 bias-disable;
550 bias-disable;
559 bias-disable;
568 bias-disable;
577 bias-disable;
586 bias-disable;
595 bias-disable;
599 eth_rgmii_pins: eth-rgmii {
616 bias-disable;
620 eth_rmii_pins: eth-rmii {
632 bias-disable;
640 bias-disable;
648 bias-disable;
656 bias-disable;
664 bias-disable;
672 bias-disable;
680 bias-disable;
688 bias-disable;
696 bias-disable;
704 bias-disable;
712 bias-disable;
720 bias-disable;
728 bias-disable;
736 bias-disable;
755 reset-names = "viu", "venc", "vcbus", "bt656",
758 clocks = <&clkc CLKID_VPU>,
759 <&clkc CLKID_VAPB>;
760 clock-names = "vpu", "vapb";
767 assigned-clocks = <&clkc CLKID_VPU_0_SEL>,
768 <&clkc CLKID_VPU_0>,
769 <&clkc CLKID_VPU>, /* Glitch free mux */
770 <&clkc CLKID_VAPB_0_SEL>,
771 <&clkc CLKID_VAPB_0>,
772 <&clkc CLKID_VAPB_SEL>; /* Glitch free mux */
773 assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
775 <&clkc CLKID_VPU_0>,
776 <&clkc CLKID_FCLK_DIV4>,
778 <&clkc CLKID_VAPB_0>;
779 assigned-clock-rates = <0>, /* Do Nothing */
788 compatible = "amlogic,meson-gxbb-saradc", "amlogic,meson-saradc";
790 <&clkc CLKID_SAR_ADC>,
791 <&clkc CLKID_SAR_ADC_CLK>,
792 <&clkc CLKID_SAR_ADC_SEL>;
793 clock-names = "clkin", "core", "adc_clk", "adc_sel";
797 clocks = <&clkc CLKID_SD_EMMC_A>,
798 <&clkc CLKID_SD_EMMC_A_CLK0>,
799 <&clkc CLKID_FCLK_DIV2>;
800 clock-names = "core", "clkin0", "clkin1";
805 clocks = <&clkc CLKID_SD_EMMC_B>,
806 <&clkc CLKID_SD_EMMC_B_CLK0>,
807 <&clkc CLKID_FCLK_DIV2>;
808 clock-names = "core", "clkin0", "clkin1";
813 clocks = <&clkc CLKID_SD_EMMC_C>,
814 <&clkc CLKID_SD_EMMC_C_CLK0>,
815 <&clkc CLKID_FCLK_DIV2>;
816 clock-names = "core", "clkin0", "clkin1";
821 clocks = <&clkc CLKID_HDMI_PCLK>,
822 <&clkc CLKID_CLK81>,
823 <&clkc CLKID_GCLK_VENCI_INT0>;
827 clocks = <&clkc CLKID_SPICC>;
828 clock-names = "core";
830 num-cs = <1>;
834 clocks = <&clkc CLKID_SPI>;
838 clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
839 clock-names = "xtal", "pclk", "baud";
844 clock-names = "xtal", "pclk", "baud";
849 clock-names = "xtal", "pclk", "baud";
853 clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
854 clock-names = "xtal", "pclk", "baud";
858 clocks = <&xtal>, <&clkc CLKID_UART2>, <&xtal>;
859 clock-names = "xtal", "pclk", "baud";
863 compatible = "amlogic,meson-gxbb-vpu", "amlogic,meson-gx-vpu";
864 power-domains = <&pwrc PWRC_GXBB_VPU_ID>;
868 compatible = "amlogic,gxbb-vdec", "amlogic,gx-vdec";
869 clocks = <&clkc CLKID_DOS_PARSER>,
870 <&clkc CLKID_DOS>,
871 <&clkc CLKID_VDEC_1>,
872 <&clkc CLKID_VDEC_HEVC>;
873 clock-names = "dos_parser", "dos", "vdec_1", "vdec_hevc";
875 reset-names = "esparser";