1 // SPDX-License-Identifier: GPL-2.0-only
3  * Utility to set the DAVINCI MUX register from a table in mux.h
7  * Based on linux/arch/arm/plat-omap/mux.c:
8  * Copyright (C) 2003 - 2005 Nokia Corporation
23 #include "mux.h"
29  * Sets the DAVINCI MUX register based on the table
38 	unsigned int mask, warn = 0;  in davinci_cfg_reg()  local
40 	if (WARN_ON(!soc_info->pinmux_pins))  in davinci_cfg_reg()
41 		return -ENODEV;  in davinci_cfg_reg()
44 		pinmux_base = ioremap(soc_info->pinmux_base, SZ_4K);  in davinci_cfg_reg()
46 			return -ENOMEM;  in davinci_cfg_reg()
49 	if (index >= soc_info->pinmux_pins_num) {  in davinci_cfg_reg()
50 		pr_err("Invalid pin mux index: %lu (%lu)\n",  in davinci_cfg_reg()
51 		       index, soc_info->pinmux_pins_num);  in davinci_cfg_reg()
53 		return -ENODEV;  in davinci_cfg_reg()
56 	cfg = &soc_info->pinmux_pins[index];  in davinci_cfg_reg()
58 	if (cfg->name == NULL) {  in davinci_cfg_reg()
60 		return -ENODEV;  in davinci_cfg_reg()
63 	/* Update the mux register in question */  in davinci_cfg_reg()
64 	if (cfg->mask) {  in davinci_cfg_reg()
68 		reg_orig = __raw_readl(pinmux_base + cfg->mux_reg);  in davinci_cfg_reg()
70 		mask = (cfg->mask << cfg->mask_offset);  in davinci_cfg_reg()
71 		tmp1 = reg_orig & mask;  in davinci_cfg_reg()
72 		reg = reg_orig & ~mask;  in davinci_cfg_reg()
74 		tmp2 = (cfg->mode << cfg->mask_offset);  in davinci_cfg_reg()
80 		__raw_writel(reg, pinmux_base + cfg->mux_reg);  in davinci_cfg_reg()
86 		pr_warn("initialized %s\n", cfg->name);  in davinci_cfg_reg()
91 	if (cfg->debug || warn) {  in davinci_cfg_reg()
92 		pr_warn("Setting register %s\n", cfg->name);  in davinci_cfg_reg()
93 		pr_warn("   %s (0x%08x) = 0x%08x -> 0x%08x\n",  in davinci_cfg_reg()
94 			cfg->mux_reg_name, cfg->mux_reg, reg_orig, reg);  in davinci_cfg_reg()