Lines Matching +full:0 +full:x3e000000
24 reg = <0x42000000 0x3e000000>;
28 mdio0: mdio-0 {
32 <&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
34 #size-cells = <0>;
36 pinctrl-0 = <&mdio0_pins>;
42 dsa,member = <0 0>;
44 pinctrl-0 = <&sw0_reset_pin>;
48 reg = <0x10>;
52 #size-cells = <0>;
54 switch0cpu: port@0 {
55 reg = <0>;
71 #size-cells = <0>;
73 led@0 {
74 reg = <0>;
88 #size-cells = <0>;
90 led@0 {
91 reg = <0>;
105 #size-cells = <0>;
107 led@0 {
108 reg = <0>;
122 #size-cells = <0>;
124 led@0 {
125 reg = <0>;
139 #size-cells = <0>;
141 led@0 {
142 reg = <0>;
159 #size-cells = <0>;
161 pinctrl-0 = <&mdio1_pins>;
167 dsa,member = <1 0>;
169 pinctrl-0 = <&sw1_reset_pin>;
173 reg = <0x10>;
177 #size-cells = <0>;
179 switch1cpu: port@0 {
180 reg = <0>;
196 #size-cells = <0>;
198 led@0 {
199 reg = <0>;
213 #size-cells = <0>;
215 led@0 {
216 reg = <0>;
230 #size-cells = <0>;
232 led@0 {
233 reg = <0>;
247 #size-cells = <0>;
249 led@0 {
250 reg = <0>;
264 #size-cells = <0>;
266 led@0 {
267 reg = <0>;
286 pinctrl-0 = <&spi_pins>;
291 norflash: flash@0 {
296 reg = <0>;
298 partition@0 {
300 reg = <0x0 0x40000>;
308 pinctrl-0 = <&buttons_pins>;
322 pinctrl-0 = <&leds_pins>;
325 led-0 {
344 qcom,id = <0>;
382 nand@0 {
383 reg = <0>;
394 boot@0 {
396 reg = <0x0000000 0x0800000>;
401 reg = <0x0800000 0x7800000>;
469 pinctrl-0 = <&usb1_pwr_en_pins>;