dts/nuvoton/nuvoton-npcm750-evb.dts

1 // SPDX-License-Identifier: GPL-2.0
5 /dts-v1/;
6 #include "nuvoton-npcm750.dtsi"
7 #include "dt-bindings/gpio/gpio.h"
8 #include "nuvoton-npcm750-pincfg-evb.dtsi"
12 	compatible = "nuvoton,npcm750-evb", "nuvoton,npcm750";
45 		stdout-path = &serial3;
56 	phy-mode = "rgmii-id";
61 	phy-mode = "rgmii-id";
72 		compatible = "jedec,spi-nor";
73 		#address-cells = <1>;
74 		#size-cells = <1>;
75 		spi-rx-bus-width = <2>;
77 		spi-max-frequency = <5000000>;
79 			compatible = "fixed-partitions";
80 			#address-cells = <1>;
81 			#size-cells = <1>;
83 				label = "bb-uboot-1";
85 				read-only;
88 				label = "bb-uboot-2";
90 				read-only;
93 				label = "env-param";
95 				read-only;
130 	pinctrl-0 = <&spi3_pins>, <&spi3quad_pins>;
133 		compatible = "jedec,spi-nor";
134 		#address-cells = <1>;
135 		#size-cells = <1>;
136 		spi-rx-bus-width = <2>;
138 		spi-max-frequency = <5000000>;
140 			compatible = "fixed-partitions";
141 			#address-cells = <1>;
142 			#size-cells = <1>;
144 				label = "spi3-system1";
152 	spix-mode;
159 &rng {
199 	clock-frequency = <100000>;
210 	clock-frequency = <100000>;
221 	clock-frequency = <100000>;
231 	clock-frequency = <100000>;
236 	clock-frequency = <100000>;
242 	clock-frequency = <100000>;
252 	clock-frequency = <100000>;
257 	clock-frequency = <100000>;
262 	clock-frequency = <100000>;
267 	clock-frequency = <100000>;
272 	clock-frequency = <100000>;
277 	clock-frequency = <100000>;
285 		fan-tach-ch = /bits/ 8 <0x00 0x01>;
286 		cooling-levels = <127 255>;
290 		fan-tach-ch = /bits/ 8 <0x02 0x03>;
291 		cooling-levels = /bits/ 8 <127 255>;
295 		fan-tach-ch = /bits/ 8 <0x04 0x05>;
296 		cooling-levels = /bits/ 8 <127 255>;
300 		fan-tach-ch = /bits/ 8 <0x06 0x07>;
301 		cooling-levels = /bits/ 8 <127 255>;
305 		fan-tach-ch = /bits/ 8 <0x08 0x09>;
306 		cooling-levels = /bits/ 8 <127 255>;
310 		fan-tach-ch = /bits/ 8 <0x0A 0x0B>;
311 		cooling-levels = /bits/ 8 <127 255>;
315 		fan-tach-ch = /bits/ 8 <0x0C 0x0D>;
316 		cooling-levels = /bits/ 8 <127 255>;
320 		fan-tach-ch = /bits/ 8 <0x0E 0x0F>;
321 		cooling-levels = /bits/ 8 <127 255>;
326 	cs-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
330 		"jedec,spi-nor";
332 		#address-cells = <1>;
333 		#size-cells = <1>;
334 		spi-max-frequency = <5000000>;
347 	cs-gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
351 		"jedec,spi-nor";
353 		#address-cells = <1>;
354 		#size-cells = <1>;
355 		spi-max-frequency = <5000000>;
368 	pinctrl-names = "default";
369 	pinctrl-0 = <	&iox1_pins