Lines Matching +full:0 +full:- +full:23
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * include/asm-alpha/xor.h
5 * Optimized RAID-5 checksumming functions for alpha EV5 and EV6
51 .prologue 0 \n\
55 ldq $0,0($17) \n\
56 ldq $1,0($18) \n\
70 ldq $23,48($17) \n\
73 xor $0,$1,$0 # 7 cycles from $1 load \n\
77 stq $0,0($17) \n\
88 xor $23,$24,$23 \n\
92 stq $23,48($17) \n\
106 .prologue 0 \n\
110 ldq $0,0($17) \n\
111 ldq $1,0($18) \n\
112 ldq $2,0($19) \n\
126 ldq $23,24($19) \n\
130 xor $0,$1,$1 # 8 cycles from $0 load \n\
137 stq $2,0($17) \n\
143 xor $22,$23,$23 # 7 cycles from $23 load \n\
145 stq $23,24($17) \n\
150 ldq $0,40($17) \n\
161 xor $0,$1,$1 # 4 cycles from $1 load \n\
184 .prologue 0 \n\
188 ldq $0,0($17) \n\
189 ldq $1,0($18) \n\
190 ldq $2,0($19) \n\
191 ldq $3,0($20) \n\
200 ldq $23,16($19) \n\
204 xor $0,$1,$1 # 6 cycles from $1 load \n\
208 ldq $0,24($19) \n\
213 stq $3,0($17) \n\
219 xor $23,$24,$24 # 7 cycles from $24 load \n\
234 xor $0,$1,$1 # 9 cycles from $1 load \n\
240 ldq $23,48($17) \n\
246 ldq $0,56($17) \n\
256 xor $23,$24,$24 # 5 cycles from $24 load \n\
261 xor $0,$1,$1 # 5 cycles from $1 load \n\
281 .prologue 0 \n\
285 ldq $0,0($17) \n\
286 ldq $1,0($18) \n\
287 ldq $2,0($19) \n\
288 ldq $3,0($20) \n\
290 ldq $4,0($21) \n\
296 ldq $23,8($21) \n\
301 xor $0,$1,$1 # 6 cycles from $1 load \n\
305 ldq $0,16($21) \n\
310 stq $4,0($17) \n\
313 xor $6,$23,$23 # 7 cycles from $23 load \n\
316 xor $22,$23,$23 \n\
320 stq $23,8($17) \n\
323 xor $28,$0,$0 # 7 cycles from $0 load \n\
326 xor $27,$0,$0 \n\
330 stq $0,16($17) \n\
335 ldq $23,32($20) \n\
342 ldq $0,40($20) \n\
353 xor $23,$24,$24 # 6 cycles from $24 load \n\
363 xor $0,$1,$1 # 6 cycles from $1 load \n\
366 ldq $23,56($19) \n\
378 xor $23,$24,$24 # 6 cycles from $24 load \n\
399 .prologue 0 \n\
402 ldq $31, 0($17) \n\
403 ldq $31, 0($18) \n\
415 ldq $0,0($17) \n\
416 ldq $1,0($18) \n\
430 ldq $23,48($17) \n\
436 xor $0,$1,$0 # 8 cycles from $1 load \n\
440 stq $0,0($17) \n\
451 xor $23,$24,$23 \n\
455 stq $23,48($17) \n\
468 .prologue 0 \n\
471 ldq $31, 0($17) \n\
472 ldq $31, 0($18) \n\
473 ldq $31, 0($19) \n\
488 ldq $0,0($17) \n\
489 ldq $1,0($18) \n\
490 ldq $2,0($19) \n\
504 ldq $23,24($19) \n\
508 xor $0,$1,$1 # 8 cycles from $0 load \n\
515 stq $2,0($17) \n\
521 xor $22,$23,$23 # 7 cycles from $23 load \n\
523 stq $23,24($17) \n\
528 ldq $0,40($17) \n\
543 xor $0,$1,$1 # 6 cycles from $1 load \n\
566 .prologue 0 \n\
569 ldq $31, 0($17) \n\
570 ldq $31, 0($18) \n\
571 ldq $31, 0($19) \n\
572 ldq $31, 0($20) \n\
590 ldq $0,0($17) \n\
591 ldq $1,0($18) \n\
592 ldq $2,0($19) \n\
593 ldq $3,0($20) \n\
602 ldq $23,16($19) \n\
606 xor $0,$1,$1 # 6 cycles from $1 load \n\
610 ldq $0,24($19) \n\
615 stq $3,0($17) \n\
621 xor $23,$24,$24 # 7 cycles from $24 load \n\
636 xor $0,$1,$1 # 9 cycles from $1 load \n\
642 ldq $23,48($17) \n\
648 ldq $0,56($17) \n\
661 xor $23,$24,$24 # 6 cycles from $24 load \n\
667 xor $0,$1,$1 # 7 cycles from $1 load \n\
688 .prologue 0 \n\
691 ldq $31, 0($17) \n\
692 ldq $31, 0($18) \n\
693 ldq $31, 0($19) \n\
694 ldq $31, 0($20) \n\
695 ldq $31, 0($21) \n\
716 ldq $0,0($17) \n\
717 ldq $1,0($18) \n\
718 ldq $2,0($19) \n\
719 ldq $3,0($20) \n\
721 ldq $4,0($21) \n\
727 ldq $23,8($21) \n\
732 xor $0,$1,$1 # 6 cycles from $1 load \n\
736 ldq $0,16($21) \n\
741 stq $4,0($17) \n\
744 xor $6,$23,$23 # 7 cycles from $23 load \n\
747 xor $22,$23,$23 \n\
751 stq $23,8($17) \n\
754 xor $28,$0,$0 # 7 cycles from $0 load \n\
757 xor $27,$0,$0 \n\
761 stq $0,16($17) \n\
766 ldq $23,32($20) \n\
773 ldq $0,40($20) \n\
784 xor $23,$24,$24 # 6 cycles from $24 load \n\
794 xor $0,$1,$1 # 6 cycles from $1 load \n\
797 ldq $23,56($19) \n\
814 xor $23,$24,$24 # 6 cycles from $24 load \n\
852 #include <asm-generic/xor.h>
861 } while (0)