Documentation/spi/spi-summary.rst

2 Overview of Linux kernel SPI support
5 02-Feb-2012
7 What is SPI?
8 ------------
9 The "Serial Peripheral Interface" (SPI) is a synchronous four wire serial
12 standardization body.  SPI uses a master/slave configuration.
17 clocking modes through which data is exchanged; mode-0 and mode-3 are most
22 SPI masters use a fourth "chip select" line to activate a given SPI slave
24 in parallel.  All SPI slaves support chipselects; they are usually active
29 SPI slave functions are usually not interoperable between vendors
30 (except for commodities like SPI memory chips).
32   - SPI may be used for request/response style device protocols, as with
35   - It may also be used to stream data in either direction (half duplex),
38   - Some devices may use eight bit words.  Others may use different word
39     lengths, such as streams of 12-bit or 20-bit digital samples.
41   - Words are usually sent with their most significant bit (MSB) first,
42     but sometimes the least significant bit (LSB) goes first instead.
44   - Sometimes SPI is used to daisy-chain devices, like shift registers.
46 In the same way, SPI slaves will only rarely support any kind of automatic
48 a given SPI master will normally be set up manually, with configuration
51 SPI is only one of the names used by such four-wire protocols, and
53 half-duplex SPI, for request/response protocols), SSP ("Synchronous
58 limiting themselves to half-duplex at the hardware level.  In fact
59 some SPI chips have this signal mode as a strapping option.  These
60 can be accessed using the same programming interface as SPI, but of
65 Microcontrollers often support both master and slave sides of the SPI
67 sides of SPI interactions.
71 ---------------------------------------
72 Linux developers using SPI are probably writing device drivers for embedded
73 systems boards.  SPI is used to control external chips, and it is also a
76 support only SPI.)  Some PC hardware uses SPI flash for BIOS code.
78 SPI slave chips range from digital/analog converters used for analog
82 Most systems using SPI will integrate a few devices on a mainboard.
83 Some provide SPI links on expansion connectors; in cases where no
84 dedicated SPI controller exists, GPIO pins can be used to create a
85 low speed "bitbanging" adapter.  Very few systems will "hotplug" an SPI
86 controller; the reasons to use SPI focus on low cost and simple operation,
88 appropriate low-pincount peripheral bus.
91 interfaces with SPI modes.  Given SPI support, they could use MMC or SD
95 I'm confused.  What are these four SPI "clock modes"?
96 -----------------------------------------------------
100  - CPOL indicates the initial clock polarity.  CPOL=0 means the
101    clock starts low, so the first (leading) edge is rising, and
103    starts high, so the first (leading) edge is falling.
105  - CPHA indicates the clock phase used to sample data; CPHA=0 says
109    implies that its data is written half a clock before the first
112 Chip specs won't always say "uses SPI mode X" in as many words,
115 In the SPI mode number, CPOL is the high order bit and CPHA is the
118 trailing clock edge (CPHA=1), that's SPI mode 1.
129 ------------------------------------------------
130 The <linux/spi/spi.h> header file includes kerneldoc, as does the
135 SPI requests always go into I/O queues.  Requests for a given SPI device
141 There are two types of SPI driver, here called:
144         controllers may be built into System-On-Chip
152 	other side of an SPI link.
155 data to filesystems stored on SPI flash like DataFlash; and others might
160 A "struct spi_device" encapsulates the controller-side interface between
163 There is a minimal core of SPI programming interfaces, focussing on
165 device tables provided by board specific initialization code.  SPI
168    /sys/devices/.../CTLR ... physical node for a given SPI controller
173    /sys/bus/spi/devices/spiB.C ... symlink to that physical
179    /sys/bus/spi/drivers/D ... driver for one or more spi*.* devices
182 	class related state for the SPI master controller managing bus "B".
183 	All spiB.* devices share one physical SPI bus segment, with SCLK,
187 	slave device for an SPI slave controller.
188 	Writing the driver name of an SPI slave handler to this file
195 	class related state for the SPI slave controller on bus "B".  When
197 	the physical SPI bus segment with other SPI slave devices.
199 At this time, the only class-specific state is the bus number ("B" in "spiB"),
203 How does board-specific init code declare SPI devices?
204 ------------------------------------------------------
205 Linux needs several kinds of information to properly configure SPI devices.
206 That information is normally provided by board-specific code, even for
212 The first kind of information is a list of what SPI controllers exist.
213 For System-on-Chip (SOC) based boards, these will usually be platform
216 like the physical address of the controller's first register and its IRQ.
218 Platforms will often abstract the "register SPI controller" operation,
220 the arch/.../mach-*/board-*.c files for several boards can all share the
222 SPI-capable controllers, and only the ones actually usable on a given
225 So for example arch/.../mach-*/board-*.c files might have code like::
227 	#include <mach/spi.h>	/* for mysoc_spi_data */
229 	/* if your mach-* infrastructure doesn't support kernels that can
237 		/* this board only uses SPI controller #2 */
242 And SOC-specific utility code might look something like::
244 	#include <mach/spi.h>
256 			spi2->dev.platform_data = pdata2;
269 same SOC controller is used.  For example, on one board SPI might use
270 an external clock, where another derives the SPI clock from current
276 The second kind of information is a list of what SPI slave devices exist
277 on the target board, often with some board-specific data needed for the
280 Normally your arch/.../mach-*/board-*.c files would provide a small table
281 listing the SPI devices on each board.  (This would typically be only a
302 Again, notice how board-specific information is provided; each chip may need
303 several types.  This example shows generic constraints like the fastest SPI
305 is wired, plus chip-specific constraints like an important delay that's
309 controller driver.  An example would be peripheral-specific DMA tuning
318 Then your board initialization code would register that table with the SPI
319 infrastructure, so that it's available later when the SPI master controller
324 Like with other static board-specific setup, you won't unregister those.
328 your ``arch/.../mach-.../board-*.c`` file would primarily provide information
330 certainly includes SPI devices hooked up through the card connectors!
333 Non-static Configurations
336 When Linux includes support for MMC/SD/SDIO/DataFlash cards through SPI, those
341 How do I write an "SPI Protocol Driver"?
342 ----------------------------------------
343 Most SPI drivers are currently kernel drivers, but there's also support
346 SPI protocol drivers somewhat resemble platform device drivers::
359 The driver core will automatically attempt to bind this driver to any SPI
366 	static int CHIP_probe(struct spi_device *spi)
371 		/* assuming the driver requires board-specific data: */
372 		pdata = &spi->dev.platform_data;
374 			return -ENODEV;
376 		/* get memory for driver's per-chip state */
379 			return -ENOMEM;
380 		spi_set_drvdata(spi, chip);
387 the SPI device using "struct spi_message".  When remove() returns,
391   - An spi_message is a sequence of protocol operations, executed
392     as one atomic sequence.  SPI driver controls include:
417   - Follow standard kernel rules, and provide DMA-safe buffers in
426   - The basic I/O primitive is spi_async().  Async requests may be
432   - There are also synchronous wrappers like spi_sync(), and wrappers
437   - The spi_write_then_read() call, and convenience wrappers around
440     common RPC-style requests, such as writing an eight bit command
441     and reading a sixteen bit response -- spi_w8r16() being one its
446 which would normally be called from probe() before the first I/O is
456 of interacting with SPI devices.
458   - I/O buffers use the usual Linux rules, and must be DMA-safe.
462   - The spi_message and spi_transfer metadata used to glue those
465     other allocate-once driver data structures.  Zero-init these.
468 routines are available to allocate and zero-initialize an spi_message
472 How do I write an "SPI Master Controller Driver"?
473 -------------------------------------------------
474 An SPI controller will probably be registered on the platform_bus; write
479 to get the driver-private data allocated for that device.
488 		return -ENODEV;
494 used to interact with the SPI core and SPI protocol drivers.  It will
500 controller and any predeclared spi devices will be made available, and
503 If you need to remove your SPI controller driver, spi_unregister_master()
511 SPI bus (shared SCK, MOSI, MISO).  Valid bus numbers start at zero.  On
516 If you don't have such hardware-assigned bus number, and for some reason
519 this as a non-static configuration (see above).
522 SPI Master Methods
525 ``master->setup(struct spi_device *spi)``
526 	This sets up the device clock rate, SPI mode, and word sizes.
528 	call spi_setup(spi) to invoke this routine.  It may sleep.
530 	Unless each SPI slave has its own configuration registers, don't
532 	that's in progress for other SPI devices.
536 		BUG ALERT:  for some reason the first version of
541 ``master->cleanup(struct spi_device *spi)``
546 ``master->prepare_transfer_hardware(struct spi_master *master)``
552 ``master->unprepare_transfer_hardware(struct spi_master *master)``
557 ``master->transfer_one_message(struct spi_master *master, struct spi_message *mesg)``
564 ``master->transfer_one(struct spi_master *master, struct spi_device *spi, struct spi_transfer *tran…
579 ``master->set_cs_timing(struct spi_device *spi, u8 setup_clk_cycles, u8 hold_clk_cycles, u8 inactiv…
580 	This method allows SPI client drivers to request SPI master controller
587 ``master->transfer(struct spi_device *spi, struct spi_message *message)``
597 SPI Message Queue
601 SPI subsystem, just implement the queued methods specified above. Using
603 providing pure process-context execution of methods. The message queue
604 can also be elevated to realtime priority on high-priority SPI traffic.
606 Unless the queueing mechanism in the SPI subsystem is selected, the bulk
611 for low-frequency sensor access might be fine using synchronous PIO.
613 But the queue will probably be very real, using message->queue, PIO,
614 often DMA (especially if the root filesystem is in SPI flash), and
623 ---------
624 Contributors to Linux-SPI discussions include (in alphabetical order,
627 - Mark Brown
628 - David Brownell
629 - Russell King
630 - Grant Likely
631 - Dmitry Pervushin
632 - Stephen Street
633 - Mark Underwood
634 - Andrew Victor
635 - Linus Walleij
636 - Vitaly Wool