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e8a016b5 |
| 08-Sep-2016 |
Michal Simek <michal.simek@xilinx.com> |
dm: Add support for scsi/sata based devices
All sata based drivers are bind and corresponding block device is created. Based on this find_scsi_device() is able to get back block device based on scsi
dm: Add support for scsi/sata based devices
All sata based drivers are bind and corresponding block device is created. Based on this find_scsi_device() is able to get back block device based on scsi_curr_dev pointer.
intr_scsi() is commented now but it can be replaced by calling find_scsi_device() and scsi_scan().
scsi_dev_desc[] is commented out but common/scsi.c heavily depends on it. That's why CONFIG_SYS_SCSI_MAX_DEVICE is hardcoded to 1 and symbol is reassigned to a block description allocated by uclass. There is only one block description by device now but it doesn't need to be correct when more devices are present.
scsi_bind() ensures corresponding block device creation. uclass post_probe (scsi_post_probe()) is doing low level init.
SCSI/SATA DM based drivers requires to have 64bit base address as the first entry in platform data structure to setup mmio_base.
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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#
361a8799 |
| 09-Dec-2016 |
Tom Rini <trini@konsulko.com> |
Revert "Merge branch 'master' of git://www.denx.de/git/u-boot-microblaze"
This reverts commit 3edc0c252257e4afed163a3a74aba24a5509b198, reversing changes made to bb135a0180c31fbd7456021fb9700b49bba7
Revert "Merge branch 'master' of git://www.denx.de/git/u-boot-microblaze"
This reverts commit 3edc0c252257e4afed163a3a74aba24a5509b198, reversing changes made to bb135a0180c31fbd7456021fb9700b49bba7f533.
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#
3edc0c25 |
| 09-Dec-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://www.denx.de/git/u-boot-microblaze
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#
bce4d18c |
| 08-Sep-2016 |
Michal Simek <michal.simek@xilinx.com> |
dm: Add support for scsi/sata based devices
All sata based drivers are bind and corresponding block device is created. Based on this find_scsi_device() is able to get back block device based on scsi
dm: Add support for scsi/sata based devices
All sata based drivers are bind and corresponding block device is created. Based on this find_scsi_device() is able to get back block device based on scsi_curr_dev pointer.
intr_scsi() is commented now but it can be replaced by calling find_scsi_device() and scsi_scan().
scsi_dev_desc[] is commented out but common/scsi.c heavily depends on it. That's why CONFIG_SYS_SCSI_MAX_DEVICE is hardcoded to 1 and symbol is reassigned to a block description allocated by uclass. There is only one block description by device now but it doesn't need to be correct when more devices are present.
scsi_bind() ensures corresponding block device creation. uclass post_probe (scsi_post_probe()) is doing low level init.
SCSI/SATA DM based drivers requires to have 64bit base address as the first entry in platform data structure to setup mmio_base.
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> Series-changes: 2 - Use CONFIG_DM_SCSI instead of mix of DM_SCSI and DM_SATA Ceva sata has never used sata commands that's why keep it in SCSI part only. - Separate scsi_scan() for DM_SCSI and do not change cmd/scsi.c - Extend platdata
Series-changes: 3 - Fix scsi_scan return path - Fix header location uclass-internal.h - Add scsi_max_devs under !DM_SCSI - Add new header device-internal because of device_probe() - Redesign block device creation algorithm - Use device_unbind in error path - Create block device with id and lun numbers (lun was there in v2) - Cleanup dev_num initialization in block device description with fixing parameters in blk_create_devicef - Create new Kconfig menu for SATA/SCSI drivers - Extend description for DM_SCSI - Fix Kconfig dependencies - Fix kernel doc format in scsi_platdata - Fix ahci_init_one - vendor variable
Series-changes: 4 - Fix Kconfig entry - Remove SPL ifdef around SCSI uclass - Clean ahci_print_info() ifdef logic
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#
fe34b6a4 |
| 27-Jul-2016 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-dm
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#
61f5ddcb |
| 13-Jul-2016 |
Stephen Warren <swarren@nvidia.com> |
Add a power domain framework/uclass
Many SoCs allow power to be applied to or removed from portions of the SoC (power domains). This may be used to save power. This API provides the means to control
Add a power domain framework/uclass
Many SoCs allow power to be applied to or removed from portions of the SoC (power domains). This may be used to save power. This API provides the means to control such power management hardware.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
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Revision tags: v2016.07, openbmc-20160624-1 |
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#
6f0e7a36 |
| 22-Jun-2016 |
Bin Meng <bmeng.cn@gmail.com> |
dm: Sort the uclass id in alphabetical order
Some uclass ids are out of order. Per the comments, sort them in alphabetical order.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass
dm: Sort the uclass id in alphabetical order
Some uclass ids are out of order. Per the comments, sort them in alphabetical order.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
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#
09849f4a |
| 20-Jun-2016 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-dm
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#
89c1e2da |
| 17-Jun-2016 |
Stephen Warren <swarren@nvidia.com> |
Add a reset driver framework/uclass
A reset controller is a hardware module that controls reset signals that affect other hardware modules or chips.
This patch defines a standard API that connects
Add a reset driver framework/uclass
A reset controller is a hardware module that controls reset signals that affect other hardware modules or chips.
This patch defines a standard API that connects reset clients (i.e. the drivers for devices affected by reset signals) to drivers for reset controllers/providers. Initially, DT is the only supported method for connecting the two.
The DT binding specification (reset.txt) was taken from Linux kernel v4.5's Documentation/devicetree/bindings/reset/reset.txt.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
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#
dc557e9a |
| 18-Jun-2016 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot
Signed-off-by: Stefano Babic <sbabic@denx.de>
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e4a94ce4 |
| 27-May-2016 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-dm
For odroid-c2 (arch-meson) for now disable designware eth as meson now needs to do some harder GPIO work.
Signed-off-by: Tom Rini <trini@konsulko.com>
Conflicts:
Merge git://git.denx.de/u-boot-dm
For odroid-c2 (arch-meson) for now disable designware eth as meson now needs to do some harder GPIO work.
Signed-off-by: Tom Rini <trini@konsulko.com>
Conflicts: lib/efi_loader/efi_disk.c
Modified: configs/odroid-c2_defconfig
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#
6238935d |
| 13-May-2016 |
Stephen Warren <swarren@nvidia.com> |
Add a mailbox driver framework/uclass
A mailbox is a hardware mechanism for transferring small message and/or notifications between the CPU on which U-Boot runs and some other device such as an auxi
Add a mailbox driver framework/uclass
A mailbox is a hardware mechanism for transferring small message and/or notifications between the CPU on which U-Boot runs and some other device such as an auxilliary CPU running firmware or a hardware module.
This patch defines a standard API that connects mailbox clients to mailbox providers (drivers). Initially, DT is the only supported method for connecting the two.
The DT binding specification (mailbox.txt) was taken from Linux kernel v4.5's Documentation/devicetree/bindings/mailbox/mailbox.txt.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
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#
11636258 |
| 12-May-2016 |
Stephen Warren <swarren@nvidia.com> |
Rename reset to sysreset
The current reset API implements a method to reset the entire system. In the near future, I'd like to introduce code that implements the device tree reset bindings; i.e. the
Rename reset to sysreset
The current reset API implements a method to reset the entire system. In the near future, I'd like to introduce code that implements the device tree reset bindings; i.e. the equivalent of the Linux kernel's reset API. This controls resets to individual HW blocks or external chips with reset signals. It doesn't make sense to merge the two APIs into one since they have different semantic purposes. Resolve the naming conflict by renaming the existing reset API to sysreset instead, so the new reset API can be called just reset.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
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#
08ca213a |
| 24-May-2016 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot
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#
4b6e1fda |
| 17-May-2016 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-dm
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#
a219639d |
| 01-May-2016 |
Simon Glass <sjg@chromium.org> |
dm: Rename disk uclass to ahci
This started as 'ahci' and was renamed to 'disk' during code review. But it seems that this is too generic. Now that we have a 'blk' uclass, we can use that as the gen
dm: Rename disk uclass to ahci
This started as 'ahci' and was renamed to 'disk' during code review. But it seems that this is too generic. Now that we have a 'blk' uclass, we can use that as the generic piece, and revert to ahci for this.
Signed-off-by: Simon Glass <sjg@chromium.org>
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#
04868b40 |
| 31-Mar-2016 |
Mateusz Kulikowski <mateusz.kulikowski@gmail.com> |
drivers: Add SPMI bus uclass
Qualcom processors use proprietary bus to talk with PMIC devices - SPMI (System Power Management Interface). On wiring level it is similar to I2C, but on protocol level,
drivers: Add SPMI bus uclass
Qualcom processors use proprietary bus to talk with PMIC devices - SPMI (System Power Management Interface). On wiring level it is similar to I2C, but on protocol level, it's multi-master and has simple autodetection capabilities. This commit adds simple uclass that provides bus read/write interface.
Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
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#
88033d73 |
| 14-Mar-2016 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-dm
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09d71aac |
| 29-Feb-2016 |
Simon Glass <sjg@chromium.org> |
dm: blk: Add a block-device uclass
Add a uclass for block devices. These provide block-oriented data access, supporting reading, writing and erasing of whole blocks.
Signed-off-by: Simon Glass <sjg
dm: blk: Add a block-device uclass
Add a uclass for block devices. These provide block-oriented data access, supporting reading, writing and erasing of whole blocks.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Stephen Warren <swarren@nvidia.com>
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#
b625fab7 |
| 23-Feb-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-spi
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a0594cef |
| 15-Feb-2016 |
Mugunthan V N <mugunthanvnm@ti.com> |
dm: implement a DMA uclass
Implement a DMA uclass so that the devices like ethernet, spi, mmc etc can offload the data transfers from/to the device and memory.
Signed-off-by: Mugunthan V N <mugunth
dm: implement a DMA uclass
Implement a DMA uclass so that the devices like ethernet, spi, mmc etc can offload the data transfers from/to the device and memory.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jteki@openedev.com>
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e3b5f041 |
| 17-Jan-2016 |
Simon Glass <sjg@chromium.org> |
ahci: Add a disk-controller uclass
Add a uclass ID for a disk controller. This can be used by AHCI/SATA or other controller types. There are no operations and no interface so far, but it is possible
ahci: Add a disk-controller uclass
Add a uclass ID for a disk controller. This can be used by AHCI/SATA or other controller types. There are no operations and no interface so far, but it is possible to probe a SATA device.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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#
5544757c |
| 17-Jan-2016 |
Simon Glass <sjg@chromium.org> |
dm: x86: Add a northbridge uclass
Add a uclass for the northbridge / SDRAM controller found on some older Intel chipsets.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.
dm: x86: Add a northbridge uclass
Add a uclass for the northbridge / SDRAM controller found on some older Intel chipsets.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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#
e76187a3 |
| 19-Jan-2016 |
Simon Glass <sjg@chromium.org> |
dm: x86: Create a driver for x86 interrupts
It seems likely that at some point we will want a generic interrupt uclass. But this is a big undertaking as it involves unifying code across multiple arc
dm: x86: Create a driver for x86 interrupts
It seems likely that at some point we will want a generic interrupt uclass. But this is a big undertaking as it involves unifying code across multiple architectures.
As a first step, create a simple IRQ uclass and a driver for x86. This can be generalised later as required.
Adjust pirq_init() to probe this driver, which has the effect of creating routing tables and setting up the interrupt routing. This is a start towards making interrupts fit better with driver model.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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#
2dcf1433 |
| 21-Jan-2016 |
Simon Glass <sjg@chromium.org> |
dm: video: Repurpose the 'displayport' uclass to 'display'
The current DisplayPort uclass is too specific. The operations it provides are shared with other types of output devices, such as HDMI and
dm: video: Repurpose the 'displayport' uclass to 'display'
The current DisplayPort uclass is too specific. The operations it provides are shared with other types of output devices, such as HDMI and LVDS LCD displays.
Generalise the uclass so that it can be used with these devices as well. Adjust the uclass to handle the EDID reading and conversion to display_timing internally.
Also update nyan-big which is affected by this.
Signed-off-by: Simon Glass <sjg@chromium.org>
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