History log of /openbmc/u-boot/configs/zynq_cse_qspi_defconfig (Results 26 – 35 of 35)
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# 3b3ea2c5 26-Feb-2018 Michal Simek <michal.simek@xilinx.com>

Kconfig: cmd: Make networking command dependent on NET

Enable networking command only when NET is enabled.
And remove selecting NET for CMD_NET

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

Kconfig: cmd: Make networking command dependent on NET

Enable networking command only when NET is enabled.
And remove selecting NET for CMD_NET

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

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# fa2c1467 10-Feb-2018 Tom Rini <trini@konsulko.com>

configs: Re-sync with CONFIG_DISTRO_DEFAULTS

A number of platforms include config_distro_defaults.h but do not enable
CONFIG_DISTRO_DEFAULTS. As they plainly intended to, set that flag and
re-sync

configs: Re-sync with CONFIG_DISTRO_DEFAULTS

A number of platforms include config_distro_defaults.h but do not enable
CONFIG_DISTRO_DEFAULTS. As they plainly intended to, set that flag and
re-sync config files.

Signed-off-by: Tom Rini <trini@konsulko.com>

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# a4fa8114 27-Jan-2018 Tuomas Tynkkynen <tuomas@tuxera.com>

cmd: Make CONFIG_CMD_FPGA depend on CONFIG_FPGA

cmd/Makefile has:

ifdef CONFIG_FPGA
obj-$(CONFIG_CMD_FPGA) += fpga.o
endif

which means that if CONFIG_FPGA is not set, CONFIG_CMD_FPGA silently
does

cmd: Make CONFIG_CMD_FPGA depend on CONFIG_FPGA

cmd/Makefile has:

ifdef CONFIG_FPGA
obj-$(CONFIG_CMD_FPGA) += fpga.o
endif

which means that if CONFIG_FPGA is not set, CONFIG_CMD_FPGA silently
does nothing. Let's remove that Makefile conditional and instead express
this equivalent dependency in Kconfig, so a lot of redundant

# CONFIG_CMD_FPGA is not set

can be removed from board defconfigs that don't actually have an FPGA.

Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>

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# ab21ecef 31-Jan-2018 Tom Rini <trini@konsulko.com>

Merge tag 'xilinx-for-v2018.03' of git://git.denx.de/u-boot-microblaze

Xilinx changes for v2018.03

- Several Kconfig fixes (also moving configs to defconfigs)
- Some DTS updates
- ZynqMP psu rework

Merge tag 'xilinx-for-v2018.03' of git://git.denx.de/u-boot-microblaze

Xilinx changes for v2018.03

- Several Kconfig fixes (also moving configs to defconfigs)
- Some DTS updates
- ZynqMP psu rework based on Zynq concept
- Add low level initialization for zc770 and zcu102
- Add support for Zynq zc770 x16 nand configuration
- Add mini nand/emmc ZynqMP targets
- Some arasan nand changes

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# 93561a32 09-Jan-2018 Michal Simek <michal.simek@xilinx.com>

arm: zynq: Enable DM_GPIO when needed

There are two reasons for doing this change.
There is still !DM driver for xilinx soft gpio IP and especially it is
saving some space for memory constrained boa

arm: zynq: Enable DM_GPIO when needed

There are two reasons for doing this change.
There is still !DM driver for xilinx soft gpio IP and especially it is
saving some space for memory constrained boards like cse (almost ~400B).

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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# 099b9ae7 09-Jan-2018 Michal Simek <michal.simek@xilinx.com>

arm: zynq: Enable BLK when needed

There is no reason to enable BLK by default for all boards which is just
increasing memory footprint for memory contrained boards like cse.
zc770s are also saving s

arm: zynq: Enable BLK when needed

There is no reason to enable BLK by default for all boards which is just
increasing memory footprint for memory contrained boards like cse.
zc770s are also saving some space.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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# 90d75d2e 18-Dec-2017 Tom Rini <trini@konsulko.com>

Merge tag 'xilinx-for-v2018.01-rc2-v2' of git://www.denx.de/git/u-boot-microblaze

Xilinx changes for v2018.01-rc2-v2

fpga:
- Enable loading bitstream via fit image for !xilinx platforms

zynq:
- Fi

Merge tag 'xilinx-for-v2018.01-rc2-v2' of git://www.denx.de/git/u-boot-microblaze

Xilinx changes for v2018.01-rc2-v2

fpga:
- Enable loading bitstream via fit image for !xilinx platforms

zynq:
- Fix SPL SD boot mode

zynqmp:
- Not not reset in panic
- Do not use simple allocator because of fat changes
- Various dt chagnes
- modeboot variable setup
- Fix fpga loading on automotive devices
- Fix coverity issues

test:
- Fix env test for !hush case - Stephen's patch

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# 52b36fd1 01-Dec-2017 Michal Simek <michal.simek@xilinx.com>

arm: zynq: Fix SPL SD boot mode

This patch is fixing two issues:
1. Insufficient stack size for fat fs buffers
2. Insufficient space in malloc area

Tested on zc702 and zc706.

Signed-off-by: Michal

arm: zynq: Fix SPL SD boot mode

This patch is fixing two issues:
1. Insufficient stack size for fat fs buffers
2. Insufficient space in malloc area

Tested on zc702 and zc706.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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# b06c46de 29-Nov-2017 Tom Rini <trini@konsulko.com>

Merge tag 'xilinx-for-v2018.01' of git://www.denx.de/git/u-boot-microblaze

Xilinx changes for v2018.1

Zynq:
- Add support for Syzygy and cc108 boards
- Add support for mini u-boot configurations (c

Merge tag 'xilinx-for-v2018.01' of git://www.denx.de/git/u-boot-microblaze

Xilinx changes for v2018.1

Zynq:
- Add support for Syzygy and cc108 boards
- Add support for mini u-boot configurations (cse)
- dts updates
- config/defconfig updates in connection to Kconfig changes
- Fix psu_init handling

ZynqMP:
- SPL fixes
- Remove slcr.c
- Fixing r5 startup sequence
- Add support for external pmufw
- Add support for new ZynqMP chips
- dts updates
- Add support for zcu102 rev1.0 board

Drivers:
- nand: Support external timing setting and board init
- ahci: Fix wording
- axi_emac: Wait for bit, non processor mode, readl/write conversion
- zynq_gem: Fix SGMII/PCS support

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# dea4d2f0 02-Nov-2017 Michal Simek <michal.simek@xilinx.com>

arm: zynq: Add mini u-boot configuration for zynq

Add configuration files/dtses for mini u-boot configurations which runs
out of OCM.

ram top is calculated from 0 that's why +#define CONFIG_SYS_SDR

arm: zynq: Add mini u-boot configuration for zynq

Add configuration files/dtses for mini u-boot configurations which runs
out of OCM.

ram top is calculated from 0 that's why +#define CONFIG_SYS_SDRAM_BASE
0xfffc0000
+#define CONFIG_SYS_SDRAM_SIZE 0x40000
was hardcoded.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

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