| 4acfe1ae | 23-Feb-2017 |
Uri Mashiach <uri.mashiach@compulab.co.il> |
arm: am57xx: cl-som-am57x: invoke clock API to enable/disable clocks
Invoke enable_usb_clocks during board_usb_init and disable_usb_clocks
during board_usb_exit to enable and disable clocks respecti
arm: am57xx: cl-som-am57x: invoke clock API to enable/disable clocks
Invoke enable_usb_clocks during board_usb_init and disable_usb_clocks
during board_usb_exit to enable and disable clocks respectively.
Modifications:
* Enable USB clocks in the OMAP version of the function
board_usb_init.
* Disable USB clocks in the OMAP version of the function
board_usb_cleanup.
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
show more ...
|
| fc300e2c | 28-Dec-2016 |
Dmitry Lifshitz <lifshitz@compulab.co.il> |
arm: am57xx: cl-som-am57x: add ETH support
Add MAC support.
Use PHY, connected to RGMII1 as a default Eth adapter,
by appropriate setting of 'cpsw_data.active_slave'.
'cpsw_phy' env variable can o
arm: am57xx: cl-som-am57x: add ETH support
Add MAC support.
Use PHY, connected to RGMII1 as a default Eth adapter,
by appropriate setting of 'cpsw_data.active_slave'.
'cpsw_phy' env variable can override this setting.
Set the MAC addresses in the U-Boot environment.
The addresses are retrieved from the on-board EEPROM or from the SOC's
MAC fuses.
Set the following PHYs RGMII clock delays:
- Enable RX delay
- Disable TX delay
Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il>
[uri.mashiach@compulab.co.il: add RGMII clock delays]
Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Reviewed-by: Tom Rini <trini@konsulko.com>
show more ...
|
| 965c509f | 28-Dec-2016 |
Dmitry Lifshitz <lifshitz@compulab.co.il> |
arm: am57xx: cl-som-am57x: fetch board rev from EEPROM
Add PCB revision message.
Implement board revision get_board_rev API.
Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il>
Commit descript
arm: am57xx: cl-som-am57x: fetch board rev from EEPROM
Add PCB revision message.
Implement board revision get_board_rev API.
Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il>
Commit description update.
Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Reviewed-by: Tom Rini <trini@konsulko.com>
show more ...
|
| edf00937 | 29-Aug-2016 |
Fabio Estevam <fabio.estevam@nxp.com> |
mx6: ddr: Allow changing REFSEL and REFR fields
Currently MX6 SPL DDR initialization hardcodes the REF_SEL and
REFR fields of the MDREF register as 1 and 7, respectively for
DDR3 and 0 and 3 for LPD
mx6: ddr: Allow changing REFSEL and REFR fields
Currently MX6 SPL DDR initialization hardcodes the REF_SEL and
REFR fields of the MDREF register as 1 and 7, respectively for
DDR3 and 0 and 3 for LPDDR2.
Looking at the MDREF initialization done via DCD we see that
boards do need to initialize these fields differently:
$ git grep 0x021b0020 board/
board/bachmann/ot1200/mx6q_4x_mt41j128.cfg:DATA 4 0x021b0020 0x00005800
board/ccv/xpress/imximage.cfg:DATA 4 0x021b0020 0x00000800 /* MMDC0_MDREF */
board/freescale/mx6qarm2/imximage.cfg:DATA 4 0x021b0020 0x7800
board/freescale/mx6qarm2/imximage.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qarm2/imximage_mx6dl.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qarm2/imximage_mx6dl.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qsabreauto/imximage.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qsabreauto/mx6dl.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qsabreauto/mx6qp.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6sabresd/mx6dlsabresd.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6sabresd/mx6q_4x_mt41j128.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6slevk/imximage.cfg:DATA 4 0x021b0020 0x00001800
board/freescale/mx6sxsabreauto/imximage.cfg:DATA 4 0x021b0020 0x00000800
board/freescale/mx6sxsabresd/imximage.cfg:DATA 4 0x021b0020 0x00000800
board/warp/imximage.cfg:DATA 4 0x021b0020 0x00001800
So introduce a mechanism for users to be able to configure
REFSEL and REFR fields as needed.
Keep all the mx6 SPL users in their current REF_SEL and REFR values,
so no functional changes for the existing users.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Eric Nelson <eric@nelint.com>
show more ...
|
| 43e568c4 | 19-Feb-2016 |
Nikita Kiryanov <nikita@compulab.co.il> |
arm: am437x: cm-t43: set MPU and CORE voltages on boot
During boot, U-Boot raises the CPU frequency but the CORE and MPU regulators
are not updated. This is not a problem in cold boot since the defa
arm: am437x: cm-t43: set MPU and CORE voltages on boot
During boot, U-Boot raises the CPU frequency but the CORE and MPU regulators
are not updated. This is not a problem in cold boot since the default values
that the pmic outputs are correct, but if Linux were to switch the module to a
low power OPP, the new voltage values will be retained after a reboot and the
module will likely hang once U-Boot raises the CPU frequency back up.
Set both CORE and MPU regulators to to 1.1V on boot.
Cc: Tom Rini <trini@konsulko.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Reviewed-by: Tom Rini <trini@konsulko.com>
show more ...
|
| e038e2a8 | 19-Feb-2016 |
Nikita Kiryanov <nikita@compulab.co.il> |
arm: am437x: cm-t43: get rid of enable_vtt_regulator()
CM-T43 does not have a vtt regulator. Remove the function that's supposed
to enable it.
Cc: Tom Rini <trini@konsulko.com>
Cc: Albert Aribaud <
arm: am437x: cm-t43: get rid of enable_vtt_regulator()
CM-T43 does not have a vtt regulator. Remove the function that's supposed
to enable it.
Cc: Tom Rini <trini@konsulko.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Reviewed-by: Tom Rini <trini@konsulko.com>
show more ...
|
| dccaaaeb | 19-Feb-2016 |
Nikita Kiryanov <nikita@compulab.co.il> |
arm: am437x: cm-t43: set tps fseal bit
Set TPS65218 FSEAL bit to 1 so that RTC could be powered using on-board
3V battery. This is necessary so that time and date will survive reboots and
power offs
arm: am437x: cm-t43: set tps fseal bit
Set TPS65218 FSEAL bit to 1 so that RTC could be powered using on-board
3V battery. This is necessary so that time and date will survive reboots and
power offs.
Cc: Tom Rini <trini@konsulko.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Reviewed-by: Tom Rini <trini@konsulko.com>
show more ...
|