Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210604' into staging

Host vector support for arm neon.

# gpg: Signature made Fri 04 Jun 2021 19:56:59 BST
# gpg: usin

Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210604' into staging

Host vector support for arm neon.

# gpg: Signature made Fri 04 Jun 2021 19:56:59 BST
# gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg: issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F

* remotes/rth-gitlab/tags/pull-tcg-20210604:
tcg/arm: Implement TCG_TARGET_HAS_rotv_vec
tcg/arm: Implement TCG_TARGET_HAS_roti_vec
tcg/arm: Implement TCG_TARGET_HAS_shv_vec
tcg/arm: Implement TCG_TARGET_HAS_bitsel_vec
tcg/arm: Implement TCG_TARGET_HAS_minmax_vec
tcg/arm: Implement TCG_TARGET_HAS_sat_vec
tcg/arm: Implement TCG_TARGET_HAS_mul_vec
tcg/arm: Implement TCG_TARGET_HAS_shi_vec
tcg/arm: Implement andc, orc, abs, neg, not vector operations
tcg/arm: Implement minimal vector operations
tcg/arm: Implement tcg_out_dup*_vec
tcg/arm: Implement tcg_out_mov for vector types
tcg/arm: Implement tcg_out_ld/st for vector types
tcg/arm: Add host vector framework
tcg: Change parameters for tcg_target_const_match

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

tcg: Change parameters for tcg_target_const_match

Change the return value to bool, because that's what is should
have been from the start. Pass the ct mask instead of the whole
TCGArgConstraint, as

tcg: Change parameters for tcg_target_const_match

Change the return value to bool, because that's what is should
have been from the start. Pass the ct mask instead of the whole
TCGArgConstraint, as that's the only part that's relevant.

Change the value argument to int64_t. We will need the extra
width for 32-bit hosts wanting to match vector constants.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

show more ...

Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-for-6.1-pull-request' into staging

Trivial patches pull request 20210503

# gpg: Signature made Mon 03 May 2021 09:34:56 BST
# gpg:

Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-for-6.1-pull-request' into staging

Trivial patches pull request 20210503

# gpg: Signature made Mon 03 May 2021 09:34:56 BST
# gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C
# gpg: issuer "laurent@vivier.eu"
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
# gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full]
# gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full]
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C

* remotes/vivier2/tags/trivial-branch-for-6.1-pull-request: (23 commits)
hw/rx/rx-gdbsim: Do not accept invalid memory size
docs: More precisely describe memory-backend-*::id's user
scripts: fix generation update-binfmts templates
docs/system: Document the removal of "compat" property for POWER CPUs
mc146818rtc: put it into the 'misc' category
Do not include exec/address-spaces.h if it's not really necessary
Do not include cpu.h if it's not really necessary
Do not include hw/boards.h if it's not really necessary
Do not include sysemu/sysemu.h if it's not really necessary
hw: Do not include qemu/log.h if it is not necessary
hw: Do not include hw/irq.h if it is not necessary
hw: Do not include hw/sysbus.h if it is not necessary
hw: Remove superfluous includes of hw/hw.h
ui: Fix memory leak in qemu_xkeymap_mapping_table()
hw/usb: Constify VMStateDescription
hw/display/qxl: Constify VMStateDescription
hw/arm: Constify VMStateDescription
vmstate: Constify some VMStateDescriptions
Fix typo in CFI build documentation
hw/pcmcia: Do not register PCMCIA type if not required
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

Do not include cpu.h if it's not really necessary

Stop including cpu.h in files that don't need it.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20210416171314.2074665-4-thuth@redhat.

Do not include cpu.h if it's not really necessary

Stop including cpu.h in files that don't need it.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20210416171314.2074665-4-thuth@redhat.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>

show more ...

Do not include sysemu/sysemu.h if it's not really necessary

Stop including sysemu/sysemu.h in files that don't need it.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20210416171314.207

Do not include sysemu/sysemu.h if it's not really necessary

Stop including sysemu/sysemu.h in files that don't need it.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20210416171314.2074665-2-thuth@redhat.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>

show more ...

Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20210323' into staging

Workaround for macos mprotect
Workaround for target_page vs -flto

# gpg: Signature made Wed 24 Mar 2021 01:40:12 GMT
#

Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20210323' into staging

Workaround for macos mprotect
Workaround for target_page vs -flto

# gpg: Signature made Wed 24 Mar 2021 01:40:12 GMT
# gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg: issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F

* remotes/rth/tags/pull-tcg-20210323:
exec: Build page-vary-common.c with -fno-lto
exec: Extract 'page-vary.h' header
exec: Rename exec-vary.c as page-vary.c
tcg: Workaround macOS 11.2 mprotect bug
tcg: Do not set guard pages on the rx portion of code_gen_buffer

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

tcg: Workaround macOS 11.2 mprotect bug

There's a change in mprotect() behaviour [1] in the latest macOS
on M1 and it's not yet clear if it's going to be fixed by Apple.

As a short-term fix, ignore

tcg: Workaround macOS 11.2 mprotect bug

There's a change in mprotect() behaviour [1] in the latest macOS
on M1 and it's not yet clear if it's going to be fixed by Apple.

As a short-term fix, ignore failures setting up the guard pages.

[1] https://gist.github.com/hikalium/75ae822466ee4da13cbbe486498a191f

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Roman Bolshakov <r.bolshakov@yadro.com>
Reviewed-by: Roman Bolshakov <r.bolshakov@yadro.com>
Buglink: https://bugs.launchpad.net/qemu/+bug/1914849
Message-Id: <20210320165720.1813545-3-richard.henderson@linaro.org>

show more ...

tcg: Do not set guard pages on the rx portion of code_gen_buffer

The rw portion of the buffer is the only one in which overruns
can be generated. Allow the rx portion to be more completely
covered

tcg: Do not set guard pages on the rx portion of code_gen_buffer

The rw portion of the buffer is the only one in which overruns
can be generated. Allow the rx portion to be more completely
covered by huge pages.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Roman Bolshakov <r.bolshakov@yadro.com>
Reviewed-by: Roman Bolshakov <r.bolshakov@yadro.com>
Message-Id: <20210320165720.1813545-2-richard.henderson@linaro.org>

show more ...

Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210317' into staging

TCI argument extraction helpers and disassembler
TCG build fix for gcc 11

# gpg: Signature made Wed 17 Mar 2021

Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210317' into staging

TCI argument extraction helpers and disassembler
TCG build fix for gcc 11

# gpg: Signature made Wed 17 Mar 2021 15:29:47 GMT
# gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg: issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F

* remotes/rth-gitlab/tags/pull-tcg-20210317: (38 commits)
tcg: Fix prototypes for tcg_out_vec_op and tcg_out_op
tcg/tci: Split out tcg_out_op_r[iI]
tcg/tci: Split out tcg_out_op_v
tcg/tci: Split out tcg_out_op_{rrm,rrrm,rrrrm}
tcg/tci: Split out tcg_out_op_rrrrcl
tcg/tci: Split out tcg_out_op_rrrr
tcg/tci: Split out tcg_out_op_rrrrrr
tcg/tci: Split out tcg_out_op_rrcl
tcg/tci: Split out tcg_out_op_rrrbb
tcg/tci: Split out tcg_out_op_rrrrrc
tcg/tci: Split out tcg_out_op_rrrc
tcg/tci: Split out tcg_out_op_rrr
tcg/tci: Split out tcg_out_op_rr
tcg/tci: Split out tcg_out_op_p
tcg/tci: Split out tcg_out_op_l
tcg/tci: Split out tcg_out_op_rrs
tcg/tci: Push opcode emit into each case
tcg/tci: Implement the disassembler properly
tcg/tci: Remove tci_disas
tcg/tci: Hoist op_size checking into tci_args_*
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

tcg: Fix prototypes for tcg_out_vec_op and tcg_out_op

There are two different versions of prototype for tcg_out_op and
tcg_out_vec_op functions:

1) using const TCGArg *args and const int *const_arg

tcg: Fix prototypes for tcg_out_vec_op and tcg_out_op

There are two different versions of prototype for tcg_out_op and
tcg_out_vec_op functions:

1) using const TCGArg *args and const int *const_args arguments
2) using const TCGArg args[TCG_MAX_OP_ARGS] and const int
const_args[TCG_MAX_OP_ARGS] aguments.

This duality causes warnings on GCC 11 and prevents build using
--enable-werror. As second version provides more information,
unify functions prototypes to this variant.

Signed-off-by: Miroslav Rezanina <mrezanin@redhat.com>
Message-Id: <20210312121418.139093-1-mrezanin@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

show more ...

Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210306' into staging

TCI build fix and cleanup
Streamline tb_lookup
Fixes for tcg/aarch64

# gpg: Signature made Sat 06 Mar 2021 21:3

Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210306' into staging

TCI build fix and cleanup
Streamline tb_lookup
Fixes for tcg/aarch64

# gpg: Signature made Sat 06 Mar 2021 21:34:46 GMT
# gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg: issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F

* remotes/rth-gitlab/tags/pull-tcg-20210306: (27 commits)
accel/tcg: Precompute curr_cflags into cpu->tcg_cflags
include/exec: lightly re-arrange TranslationBlock
accel/tcg: drop the use of CF_HASH_MASK and rename params
accel/tcg: move CF_CLUSTER calculation to curr_cflags
accel/tcg: rename tb_lookup__cpu_state and hoist state extraction
tcg/tci: Merge mov, not and neg operations
tcg/tci: Merge bswap operations
tcg/tci: Merge extension operations
tcg/tci: Merge basic arithmetic operations
tcg/tci: Reduce use of tci_read_r64
tcg/tci: Remove tci_read_r32s
tcg/tci: Remove tci_read_r32
tcg/tci: Remove tci_read_r16s
tcg/tci: Remove tci_read_r16
tcg/tci: Remove tci_read_r8s
tcg/tci: Remove tci_read_r8
tcg/tci: Merge identical cases in generation (load/store opcodes)
tcg/tci: Merge identical cases in generation (conditional opcodes)
tcg/tci: Merge identical cases in generation (deposit opcode)
tcg/tci: Merge identical cases in generation (exchange opcodes)
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

tcg: Manage splitwx in tc_ptr_to_region_tree by hand

The use in tcg_tb_lookup is given a random pc that comes from the pc
of a signal handler. Do not assert that the pointer is already within
the c

tcg: Manage splitwx in tc_ptr_to_region_tree by hand

The use in tcg_tb_lookup is given a random pc that comes from the pc
of a signal handler. Do not assert that the pointer is already within
the code gen buffer at all, much less the writable mirror of it.

Fixes: db0c51a3803
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

show more ...

tcg: Split out tcg_raise_tb_overflow

Allow other places in tcg to restart with a smaller tb.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderso

tcg: Split out tcg_raise_tb_overflow

Allow other places in tcg to restart with a smaller tb.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

show more ...

Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210202' into staging

TCG backend constraints cleanup

# gpg: Signature made Tue 02 Feb 2021 22:59:19 GMT
# gpg: using

Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210202' into staging

TCG backend constraints cleanup

# gpg: Signature made Tue 02 Feb 2021 22:59:19 GMT
# gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg: issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F

* remotes/rth-gitlab/tags/pull-tcg-20210202: (24 commits)
tcg: Remove TCG_TARGET_CON_SET_H
tcg/tci: Split out constraint sets to tcg-target-con-set.h
tcg/sparc: Split out constraint sets to tcg-target-con-set.h
tcg/s390: Split out constraint sets to tcg-target-con-set.h
tcg/riscv: Split out constraint sets to tcg-target-con-set.h
tcg/ppc: Split out constraint sets to tcg-target-con-set.h
tcg/mips: Split out constraint sets to tcg-target-con-set.h
tcg/arm: Split out constraint sets to tcg-target-con-set.h
tcg/aarch64: Split out constraint sets to tcg-target-con-set.h
tcg/i386: Split out constraint sets to tcg-target-con-set.h
tcg: Remove TCG_TARGET_CON_STR_H
tcg/sparc: Split out target constraints to tcg-target-con-str.h
tcg/s390: Split out target constraints to tcg-target-con-str.h
tcg/riscv: Split out target constraints to tcg-target-con-str.h
tcg/mips: Split out target constraints to tcg-target-con-str.h
tcg/tci: Split out target constraints to tcg-target-con-str.h
tcg/ppc: Split out target constraints to tcg-target-con-str.h
tcg/aarch64: Split out target constraints to tcg-target-con-str.h
tcg/arm: Split out target constraints to tcg-target-con-str.h
tcg/i386: Split out target constraints to tcg-target-con-str.h
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

tcg: Remove TCG_TARGET_CON_SET_H

All backends have now been converted to tcg-target-con-set.h,
so we can remove the fallback code.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by:

tcg: Remove TCG_TARGET_CON_SET_H

All backends have now been converted to tcg-target-con-set.h,
so we can remove the fallback code.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

show more ...

tcg/i386: Split out constraint sets to tcg-target-con-set.h

This exports the constraint sets from tcg_target_op_def to
a place we will be able to manipulate more in future.

Reviewed-by: Peter Mayde

tcg/i386: Split out constraint sets to tcg-target-con-set.h

This exports the constraint sets from tcg_target_op_def to
a place we will be able to manipulate more in future.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

show more ...

tcg: Remove TCG_TARGET_CON_STR_H

All backends have now been converted to tcg-target-con-str.h,
so we can remove the fallback code.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by:

tcg: Remove TCG_TARGET_CON_STR_H

All backends have now been converted to tcg-target-con-str.h,
so we can remove the fallback code.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

show more ...

tcg/i386: Split out target constraints to tcg-target-con-str.h

This eliminates the target-specific function target_parse_constraint
and folds it into the single caller, process_op_defs. Since this

tcg/i386: Split out target constraints to tcg-target-con-str.h

This eliminates the target-specific function target_parse_constraint
and folds it into the single caller, process_op_defs. Since this is
done directly into the switch statement, duplicates are compilation
errors rather than silently ignored at runtime.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

show more ...

Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210124' into staging

Fix tcg constant temp overflow.
Fix running during atomic single-step.
Partial support for apple silicon.
Cleanu

Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210124' into staging

Fix tcg constant temp overflow.
Fix running during atomic single-step.
Partial support for apple silicon.
Cleanups for accel/tcg.

# gpg: Signature made Sun 24 Jan 2021 18:08:57 GMT
# gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg: issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F

* remotes/rth-gitlab/tags/pull-tcg-20210124:
tcg: Restart code generation when we run out of temps
tcg: Toggle page execution for Apple Silicon
accel/tcg: Restrict cpu_io_recompile() from other accelerators
accel/tcg: Declare missing cpu_loop_exit*() stubs
accel/tcg: Restrict tb_gen_code() from other accelerators
accel/tcg: Move tb_flush_jmp_cache() to cputlb.c
accel/tcg: Make cpu_gen_init() static
tcg: Optimize inline dup_const for MO_64
qemu/compiler: Split out qemu_build_not_reached_always
tcg: update the cpu running flag in cpu_exec_step_atomic

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

tcg: Restart code generation when we run out of temps

Some large translation blocks can generate so many unique
constants that we run out of temps to hold them. In this
case, longjmp back to the st

tcg: Restart code generation when we run out of temps

Some large translation blocks can generate so many unique
constants that we run out of temps to hold them. In this
case, longjmp back to the start of code generation and
restart with a smaller translation block.

Buglink: https://bugs.launchpad.net/bugs/1912065
Tested-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

show more ...

tcg: Toggle page execution for Apple Silicon

Pages can't be both write and executable at the same time on Apple
Silicon. macOS provides public API to switch write protection [1] for
JIT applications

tcg: Toggle page execution for Apple Silicon

Pages can't be both write and executable at the same time on Apple
Silicon. macOS provides public API to switch write protection [1] for
JIT applications, like TCG.

1. https://developer.apple.com/documentation/apple_silicon/porting_just-in-time_compilers_to_apple_silicon

Tested-by: Alexander Graf <agraf@csgraf.de>
Signed-off-by: Roman Bolshakov <r.bolshakov@yadro.com>
Message-Id: <20210113032806.18220-1-r.bolshakov@yadro.com>
[rth: Inline the qemu_thread_jit_* functions;
drop the MAP_JIT change for a follow-on patch.]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

show more ...

Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210113' into staging

Improvements to tcg constant handling.
Force utf8 for decodetree.

# gpg: Signature made Thu 14 Jan 2021 02:15:4

Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210113' into staging

Improvements to tcg constant handling.
Force utf8 for decodetree.

# gpg: Signature made Thu 14 Jan 2021 02:15:42 GMT
# gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg: issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F

* remotes/rth-gitlab/tags/pull-tcg-20210113: (24 commits)
decodetree: Open files with encoding='utf-8'
tcg/aarch64: Use tcg_constant_vec with tcg vec expanders
tcg/ppc: Use tcg_constant_vec with tcg vec expanders
tcg: Remove tcg_gen_dup{8,16,32,64}i_vec
tcg/i386: Use tcg_constant_vec with tcg vec expanders
tcg: Add tcg_reg_alloc_dup2
tcg: Remove movi and dupi opcodes
tcg/tci: Add special tci_movi_{i32,i64} opcodes
tcg: Use tcg_constant_{i32,i64,vec} with gvec expanders
tcg: Use tcg_constant_{i32,i64} with tcg plugins
tcg: Use tcg_constant_{i32,i64} with tcg int expanders
tcg: Use tcg_constant_i32 with icount expander
tcg: Convert tcg_gen_dupi_vec to TCG_CONST
tcg/optimize: Use tcg_constant_internal with constant folding
tcg/optimize: Adjust TempOptInfo allocation
tcg/optimize: Improve find_better_copy
tcg: Introduce TYPE_CONST temporaries
tcg: Expand TempOptInfo to 64-bits
tcg: Rename struct tcg_temp_info to TempOptInfo
tcg: Expand TCGTemp.val to 64-bits
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

tcg: Add tcg_reg_alloc_dup2

There are several ways we can expand a vector dup of a 64-bit
element on a 32-bit host.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

tcg: Remove movi and dupi opcodes

These are now completely covered by mov from a
TYPE_CONST temporary.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Aleksandar Markovic <aleksandar

tcg: Remove movi and dupi opcodes

These are now completely covered by mov from a
TYPE_CONST temporary.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

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tcg: Use tcg_constant_{i32,i64,vec} with gvec expanders

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>