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67e25eed |
| 01-Jul-2021 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210629' into staging
TranslatorOps conversion for target/avr TranslatorOps conversion for target/cris TranslatorOps conversion for ta
Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210629' into staging
TranslatorOps conversion for target/avr TranslatorOps conversion for target/cris TranslatorOps conversion for target/nios2 Simple vector operations on TCGv_i32 Host signal fixes for *BSD Improvements to tcg bswap operations
# gpg: Signature made Tue 29 Jun 2021 19:51:03 BST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* remotes/rth-gitlab/tags/pull-tcg-20210629: (63 commits) tcg/riscv: Remove MO_BSWAP handling tcg/aarch64: Unset TCG_TARGET_HAS_MEMORY_BSWAP tcg/arm: Unset TCG_TARGET_HAS_MEMORY_BSWAP target/mips: Fix gen_mxu_s32ldd_s32lddr target/sh4: Improve swap.b translation target/i386: Improve bswap translation target/arm: Improve REVSH target/arm: Improve vector REV target/arm: Improve REV32 tcg: Make use of bswap flags in tcg_gen_qemu_st_* tcg: Make use of bswap flags in tcg_gen_qemu_ld_* tcg: Add flags argument to tcg_gen_bswap16_*, tcg_gen_bswap32_i64 tcg: Handle new bswap flags during optimize tcg/tci: Support bswap flags tcg/mips: Support bswap flags in tcg_out_bswap32 tcg/mips: Support bswap flags in tcg_out_bswap16 tcg/s390: Support bswap flags tcg/ppc: Use power10 byte-reverse instructions tcg/ppc: Support bswap flags tcg/ppc: Split out tcg_out_bswap64 ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
587195bd |
| 12-Jun-2021 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Add flags argument to bswap opcodes
This will eventually simplify front-end usage, and will allow backends to unset TCG_TARGET_HAS_MEMORY_BSWAP without loss of optimization.
The argument is ad
tcg: Add flags argument to bswap opcodes
This will eventually simplify front-end usage, and will allow backends to unset TCG_TARGET_HAS_MEMORY_BSWAP without loss of optimization.
The argument is added during expansion, not currently exposed to the front end translators. The backends currently only support a flags value of either TCG_BSWAP_IZ, or (TCG_BSWAP_IZ | TCG_BSWAP_OZ), since they all require zero top bytes and leave them that way. At the existing call sites we pass in (TCG_BSWAP_IZ | TCG_BSWAP_OZ), except for the flags-ignored cases of a 32-bit swap of a 32-bit value and or a 64-bit swap of a 64-bit value, where we pass 0.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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b733163e |
| 22-Jun-2021 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210619-2' into staging
TCI cleanup and re-encoding Fixes for #367 and #390. Move TCGCond to tcg/tcg-cond.h. Fix for win32 qemu_try_me
Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210619-2' into staging
TCI cleanup and re-encoding Fixes for #367 and #390. Move TCGCond to tcg/tcg-cond.h. Fix for win32 qemu_try_memalign.
# gpg: Signature made Sun 20 Jun 2021 05:23:53 BST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* remotes/rth-gitlab/tags/pull-tcg-20210619-2: (33 commits) util/oslib-win32: Fix fatal assertion in qemu_try_memalign tcg: expose TCGCond manipulation routines tcg: Restart when exhausting the stack frame tcg: Allocate sufficient storage in temp_allocate_frame tcg/sparc: Fix temp_allocate_frame vs sparc stack bias accel/tcg: Probe the proper permissions for atomic ops tests/tcg: Increase timeout for TCI tcg/tci: Use {set,clear}_helper_retaddr tcg/tci: Remove the qemu_ld/st_type macros Revert "tcg/tci: Use exec/cpu_ldst.h interfaces" tcg/tci: Split out tci_qemu_ld, tci_qemu_st tcg/tci: Implement add2, sub2 tcg/tci: Implement mulu2, muls2 tcg/tci: Implement clz, ctz, ctpop tcg/tci: Implement extract, sextract tcg/tci: Implement andc, orc, eqv, nand, nor tcg/tci: Implement movcond tcg/tci: Implement goto_ptr tcg/tci: Change encoding to uint32_t units tcg/tci: Remove tci_write_reg ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
732d5897 |
| 19-Jun-2021 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Restart when exhausting the stack frame
Assume that we'll have fewer temps allocated after restarting with a fewer number of instructions.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
tcg: Restart when exhausting the stack frame
Assume that we'll have fewer temps allocated after restarting with a fewer number of instructions.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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c1c09194 |
| 18-Jun-2021 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Allocate sufficient storage in temp_allocate_frame
This function should have been updated for vector types when they were introduced.
Fixes: d2fd745fe8b Resolves: https://gitlab.com/qemu-proje
tcg: Allocate sufficient storage in temp_allocate_frame
This function should have been updated for vector types when they were introduced.
Fixes: d2fd745fe8b Resolves: https://gitlab.com/qemu-project/qemu/-/issues/367 Cc: qemu-stable@nongnu.org Tested-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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9defd1bd |
| 18-Jun-2021 |
Richard Henderson <richard.henderson@linaro.org> |
tcg/sparc: Fix temp_allocate_frame vs sparc stack bias
We should not be aligning the offset in temp_allocate_frame, because the odd offset produces an aligned address in the end. Instead, pass the l
tcg/sparc: Fix temp_allocate_frame vs sparc stack bias
We should not be aligning the offset in temp_allocate_frame, because the odd offset produces an aligned address in the end. Instead, pass the logical offset into tcg_set_frame and add the stack bias last.
Cc: qemu-stable@nongnu.org Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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6eea0434 |
| 02-Feb-2021 |
Richard Henderson <richard.henderson@linaro.org> |
tcg/tci: Implement goto_ptr
This operation is critical to staying within the interpretation loop longer, which avoids the overhead of setup and teardown for many TBs.
The check in tcg_prologue_init
tcg/tci: Implement goto_ptr
This operation is critical to staying within the interpretation loop longer, which avoids the overhead of setup and teardown for many TBs.
The check in tcg_prologue_init is disabled because TCI does want to use NULL to indicate exit, as opposed to branching to a real epilogue.
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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7b7d8b2d |
| 30-Jan-2021 |
Richard Henderson <richard.henderson@linaro.org> |
tcg/tci: Use ffi for calls
This requires adjusting where arguments are stored. Place them on the stack at left-aligned positions. Adjust the stack frame to be at entirely positive offsets.
Tested-b
tcg/tci: Use ffi for calls
This requires adjusting where arguments are stored. Place them on the stack at left-aligned positions. Adjust the stack frame to be at entirely positive offsets.
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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22f15579 |
| 18-Mar-2021 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Build ffi data structures for helpers
Add libffi as a build requirement for TCI. Add libffi to the dockerfiles to satisfy that requirement.
Construct an ffi_cif structure for each unique typem
tcg: Build ffi data structures for helpers
Add libffi as a build requirement for TCI. Add libffi to the dockerfiles to satisfy that requirement.
Construct an ffi_cif structure for each unique typemask. Record the result in a separate hash table for later lookup; this allows helper_table to stay const.
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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fa52e660 |
| 18-Mar-2021 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Add tcg_call_func
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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3e92aa34 |
| 18-Mar-2021 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Store the TCGHelperInfo in the TCGOp for call
This will give us both flags and typemask for use later.
We also fix a dumping bug, wherein calls generated for plugins fail tcg_find_helper and p
tcg: Store the TCGHelperInfo in the TCGOp for call
This will give us both flags and typemask for use later.
We also fix a dumping bug, wherein calls generated for plugins fail tcg_find_helper and print (null) instead of either a name or the raw function pointer.
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
90163900 |
| 18-Mar-2021 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Add tcg_call_flags
We're going to change how to look up the call flags from a TCGop, so extract it as a helper.
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Philippe Mathie
tcg: Add tcg_call_flags
We're going to change how to look up the call flags from a TCGop, so extract it as a helper.
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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7319d83a |
| 18-Mar-2021 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Combine dh_is_64bit and dh_is_signed to dh_typecode
We will shortly be interested in distinguishing pointers from integers in the helper's declaration, as well as a true void return. We curren
tcg: Combine dh_is_64bit and dh_is_signed to dh_typecode
We will shortly be interested in distinguishing pointers from integers in the helper's declaration, as well as a true void return. We currently have two parallel 1 bit fields; merge them and expand to a 3 bit field.
Our current maximum is 7 helper arguments, plus the return makes 8 * 3 = 24 bits used within the uint32_t typemask.
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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fbe7919e |
| 14-Jun-2021 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210613' into staging
Clean up code_gen_buffer allocation. Add tcg_remove_ops_after. Fix tcg_constant_* documentation. Improve TB chai
Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210613' into staging
Clean up code_gen_buffer allocation. Add tcg_remove_ops_after. Fix tcg_constant_* documentation. Improve TB chaining documentation. Fix float32_exp2. Fix arm tcg_out_op function signature.
# gpg: Signature made Mon 14 Jun 2021 02:12:35 BST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* remotes/rth-gitlab/tags/pull-tcg-20210613: (34 commits) docs/devel: Explain in more detail the TB chaining mechanisms softfloat: Fix tp init in float32_exp2 tcg/arm: Fix tcg_out_op function signature tcg: Fix documentation for tcg_constant_* vs tcg_temp_free_* tcg: Introduce tcg_remove_ops_after tcg: Move tcg_init_ctx and tcg_ctx from accel/tcg/ tcg: When allocating for !splitwx, begin with PROT_NONE tcg: Merge buffer protection and guard page protection tcg: Round the tb_size default from qemu_get_host_physmem util/osdep: Add qemu_mprotect_rw tcg: Sink qemu_madvise call to common code tcg: Return the map protection from alloc_code_gen_buffer tcg: Allocate code_gen_buffer into struct tcg_region_state tcg: Move in_code_gen_buffer and tests to region.c tcg: Tidy split_cross_256mb tcg: Tidy tcg_n_regions tcg: Rename region.start to region.after_prologue tcg: Replace region.end with region.total_size tcg: Move MAX_CODE_GEN_BUFFER_SIZE to tcg-target.h tcg: Introduce tcg_max_ctxs ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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a80cdd31 |
| 04-Jun-2021 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Introduce tcg_remove_ops_after
Introduce a function to remove everything emitted since a given point.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <ri
tcg: Introduce tcg_remove_ops_after
Introduce a function to remove everything emitted since a given point.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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42eb6dfc |
| 13-Mar-2021 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Move tcg_init_ctx and tcg_ctx from accel/tcg/
These variables belong to the jit side, not the user side.
Since tcg_init_ctx is no longer used outside of tcg/, move the declaration to tcg-inter
tcg: Move tcg_init_ctx and tcg_ctx from accel/tcg/
These variables belong to the jit side, not the user side.
Since tcg_init_ctx is no longer used outside of tcg/, move the declaration to tcg-internal.h.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Luis Pires <luis.pires@eldorado.org.br> Suggested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
47d590df |
| 13-Mar-2021 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Move in_code_gen_buffer and tests to region.c
Shortly, the full code_gen_buffer will only be visible to region.c, so move in_code_gen_buffer out-of-line.
Move the debugging versions of tcg_spl
tcg: Move in_code_gen_buffer and tests to region.c
Shortly, the full code_gen_buffer will only be visible to region.c, so move in_code_gen_buffer out-of-line.
Move the debugging versions of tcg_splitwx_to_{rx,rw} to region.c as well, so that the compiler gets to see the implementation of in_code_gen_buffer.
This leaves exactly one use of in_code_gen_buffer outside of region.c, in cpu_restore_state. Which, being on the exception path, is not performance critical.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Luis Pires <luis.pires@eldorado.org.br> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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0e2d61cf |
| 09-Mar-2021 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Introduce tcg_max_ctxs
Finish the divorce of tcg/ from hw/, and do not take the max cpu value from MachineState; just remember what we were passed in tcg_init.
Reviewed-by: Luis Pires <luis.pi
tcg: Introduce tcg_max_ctxs
Finish the divorce of tcg/ from hw/, and do not take the max cpu value from MachineState; just remember what we were passed in tcg_init.
Reviewed-by: Luis Pires <luis.pires@eldorado.org.br> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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43b972b7 |
| 09-Mar-2021 |
Richard Henderson <richard.henderson@linaro.org> |
accel/tcg: Pass down max_cpus to tcg_init
Start removing the include of hw/boards.h from tcg/. Pass down the max_cpus value from tcg_init_machine, where we have the MachineState already.
Reviewed-b
accel/tcg: Pass down max_cpus to tcg_init
Start removing the include of hw/boards.h from tcg/. Pass down the max_cpus value from tcg_init_machine, where we have the MachineState already.
Reviewed-by: Luis Pires <luis.pires@eldorado.org.br> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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a76aabd3 |
| 09-Mar-2021 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Create tcg_init
Perform both tcg_context_init and tcg_region_init. Do not leave this split to the caller.
Reviewed-by: Luis Pires <luis.pires@eldorado.org.br> Reviewed-by: Alex Bennée <alex.be
tcg: Create tcg_init
Perform both tcg_context_init and tcg_region_init. Do not leave this split to the caller.
Reviewed-by: Luis Pires <luis.pires@eldorado.org.br> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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5ff7258c |
| 09-Mar-2021 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Split out region.c
Reviewed-by: Luis Pires <luis.pires@eldorado.org.br> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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bf042e8e |
| 09-Mar-2021 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Split out tcg_region_prologue_set
This has only one user, but will make more sense after some code motion.
Always leave the tcg_init_ctx initialized to the first region, in preparation for tcg
tcg: Split out tcg_region_prologue_set
This has only one user, but will make more sense after some code motion.
Always leave the tcg_init_ctx initialized to the first region, in preparation for tcg_prologue_init(). This also requires that we don't re-allocate the region for the first cpu, lest we hit the assertion for total number of regions allocated .
Reviewed-by: Luis Pires <luis.pires@eldorado.org.br> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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0430ca00 |
| 09-Mar-2021 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Split out tcg_region_initial_alloc
This has only one user, and currently needs an ifdef, but will make more sense after some code motion.
Reviewed-by: Luis Pires <luis.pires@eldorado.org.br> R
tcg: Split out tcg_region_initial_alloc
This has only one user, and currently needs an ifdef, but will make more sense after some code motion.
Reviewed-by: Luis Pires <luis.pires@eldorado.org.br> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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bd35f2ce |
| 09-Mar-2021 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Remove error return from tcg_region_initial_alloc__locked
All callers immediately assert on error, so move the assert into the function itself.
Reviewed-by: Luis Pires <luis.pires@eldorado.org
tcg: Remove error return from tcg_region_initial_alloc__locked
All callers immediately assert on error, so move the assert into the function itself.
Reviewed-by: Luis Pires <luis.pires@eldorado.org.br> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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b0a0794a |
| 09-Mar-2021 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Re-order tcg_region_init vs tcg_prologue_init
Instead of delaying tcg_region_init until after tcg_prologue_init is complete, do tcg_region_init first and let tcg_prologue_init shrink the first
tcg: Re-order tcg_region_init vs tcg_prologue_init
Instead of delaying tcg_region_init until after tcg_prologue_init is complete, do tcg_region_init first and let tcg_prologue_init shrink the first region by the size of the generated prologue.
Reviewed-by: Luis Pires <luis.pires@eldorado.org.br> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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