#
767c2503 |
| 05-Apr-2023 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Introduce tcg_out_xchg
We will want a backend interface for register swapping. This is only properly defined for x86; all others get a stub version that always indicates failure.
Reviewed-by:
tcg: Introduce tcg_out_xchg
We will want a backend interface for register swapping. This is only properly defined for x86; all others get a stub version that always indicates failure.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
b3dfd5fc |
| 05-Apr-2023 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Introduce tcg_out_movext
This is common code in most qemu_{ld,st} slow paths, extending the input value for the store helper data argument or extending the return value from the load helper.
R
tcg: Introduce tcg_out_movext
This is common code in most qemu_{ld,st} slow paths, extending the input value for the store helper data argument or extending the return value from the load helper.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
b8b94ac6 |
| 05-Apr-2023 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Split out tcg_out_extrl_i64_i32
We will need a backend interface for type truncation. For those backends that did not enable TCG_TARGET_HAS_extrl_i64_i32, use tcg_out_mov. Use it in tcg_reg_al
tcg: Split out tcg_out_extrl_i64_i32
We will need a backend interface for type truncation. For those backends that did not enable TCG_TARGET_HAS_extrl_i64_i32, use tcg_out_mov. Use it in tcg_reg_alloc_op in the meantime.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
b9bfe000 |
| 05-Apr-2023 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Split out tcg_out_extu_i32_i64
We will need a backend interface for type extension with zero. Use it in tcg_reg_alloc_op in the meantime.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org
tcg: Split out tcg_out_extu_i32_i64
We will need a backend interface for type extension with zero. Use it in tcg_reg_alloc_op in the meantime.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
9c6aa274 |
| 05-Apr-2023 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Split out tcg_out_exts_i32_i64
We will need a backend interface for type extension with sign. Use it in tcg_reg_alloc_op in the meantime.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org
tcg: Split out tcg_out_exts_i32_i64
We will need a backend interface for type extension with sign. Use it in tcg_reg_alloc_op in the meantime.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
9ecf5f61 |
| 05-Apr-2023 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Split out tcg_out_ext32u
We will need a backend interface for performing 32-bit zero-extend. Use it in tcg_reg_alloc_op in the meantime.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
tcg: Split out tcg_out_ext32u
We will need a backend interface for performing 32-bit zero-extend. Use it in tcg_reg_alloc_op in the meantime.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
52bf3398 |
| 05-Apr-2023 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Split out tcg_out_ext32s
We will need a backend interface for performing 32-bit sign-extend. Use it in tcg_reg_alloc_op in the meantime.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
tcg: Split out tcg_out_ext32s
We will need a backend interface for performing 32-bit sign-extend. Use it in tcg_reg_alloc_op in the meantime.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
379afdff |
| 05-Apr-2023 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Split out tcg_out_ext16u
We will need a backend interface for performing 16-bit zero-extend. Use it in tcg_reg_alloc_op in the meantime.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
tcg: Split out tcg_out_ext16u
We will need a backend interface for performing 16-bit zero-extend. Use it in tcg_reg_alloc_op in the meantime.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
753e42ea |
| 05-Apr-2023 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Split out tcg_out_ext16s
We will need a backend interface for performing 16-bit sign-extend. Use it in tcg_reg_alloc_op in the meantime.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
tcg: Split out tcg_out_ext16s
We will need a backend interface for performing 16-bit sign-extend. Use it in tcg_reg_alloc_op in the meantime.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
d0e66c89 |
| 05-Apr-2023 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Split out tcg_out_ext8u
We will need a backend interface for performing 8-bit zero-extend. Use it in tcg_reg_alloc_op in the meantime.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> S
tcg: Split out tcg_out_ext8u
We will need a backend interface for performing 8-bit zero-extend. Use it in tcg_reg_alloc_op in the meantime.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
678155b2 |
| 05-Apr-2023 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Split out tcg_out_ext8s
We will need a backend interface for performing 8-bit sign-extend. Use it in tcg_reg_alloc_op in the meantime.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> S
tcg: Split out tcg_out_ext8s
We will need a backend interface for performing 8-bit sign-extend. Use it in tcg_reg_alloc_op in the meantime.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
732e89f4 |
| 05-Apr-2023 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Replace tcg_abort with g_assert_not_reached
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
1a057554 |
| 05-Apr-2023 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Replace if + tcg_abort with tcg_debug_assert
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
27a03171 |
| 14-Mar-2023 |
Peter Maydell <peter.maydell@linaro.org> |
Merge tag 'pull-tcg-20230313' of https://gitlab.com/rth7680/qemu into staging
accel/tcg: Fix NB_MMU_MODES to 16 Balance of the target/ patchset which eliminates tcg_temp_free Balance of the target/
Merge tag 'pull-tcg-20230313' of https://gitlab.com/rth7680/qemu into staging
accel/tcg: Fix NB_MMU_MODES to 16 Balance of the target/ patchset which eliminates tcg_temp_free Balance of the target/ patchset which eliminates tcg_const
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* tag 'pull-tcg-20230313' of https://gitlab.com/rth7680/qemu: (91 commits) tcg: Drop tcg_const_* tcg: Drop tcg_const_*_vec target/tricore: Use min/max for saturate target/ppc: Avoid tcg_const_* in translate.c target/ppc: Fix gen_tlbsx_booke206 target/ppc: Rewrite trans_ADDG6S target/ppc: Avoid tcg_const_* in power8-pmu-regs.c.inc target/ppc: Avoid tcg_const_* in fp-impl.c.inc target/ppc: Avoid tcg_const_* in vsx-impl.c.inc target/ppc: Avoid tcg_const_* in xxeval target/ppc: Avoid tcg_const_* in vmx-impl.c.inc target/ppc: Avoid tcg_const_i64 in do_vcntmb target/m68k: Use tcg_constant_i32 in gen_ea_mode target/arm: Avoid tcg_const_ptr in handle_rev target/arm: Avoid tcg_const_ptr in handle_vec_simd_sqshrn target/arm: Avoid tcg_const_ptr in disas_simd_zip_trn target/arm: Avoid tcg_const_* in translate-mve.c target/arm: Avoid tcg_const_ptr in gen_sve_{ldr,str} target/arm: Improve trans_BFCI target/arm: Create gen_set_rmode, gen_restore_rmode ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
0c8b6b9a |
| 26-Feb-2023 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Drop tcg_const_*
These functions are no longer used.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
47f7313d |
| 25-Feb-2023 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Create tcg/tcg-temp-internal.h
Move the tcg_temp_free_* and tcg_temp_ebb_new_* declarations and inlines to the new header. These are private to the implementation, and will prevent tcg_temp_fr
tcg: Create tcg/tcg-temp-internal.h
Move the tcg_temp_free_* and tcg_temp_ebb_new_* declarations and inlines to the new header. These are private to the implementation, and will prevent tcg_temp_free_* from creeping back into the guest front ends.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
f003dd8d |
| 06-Mar-2023 |
Peter Maydell <peter.maydell@linaro.org> |
Merge tag 'pull-tcg-20230305' of https://gitlab.com/rth7680/qemu into staging
tcg: Merge two sequential labels accel/tcg: Retain prot flags from tlb_fill accel/tcg: Honor TLB_DISCARD_WRITE in atomic
Merge tag 'pull-tcg-20230305' of https://gitlab.com/rth7680/qemu into staging
tcg: Merge two sequential labels accel/tcg: Retain prot flags from tlb_fill accel/tcg: Honor TLB_DISCARD_WRITE in atomic_mmu_lookup accel/tcg: Honor TLB_WATCHPOINTS in atomic_mmu_lookup target/sparc: Use tlb_set_page_full include/qemu/cpuid: Introduce xgetbv_low tcg/i386: Mark Win64 call-saved vector regs as reserved tcg: Decode the operand to INDEX_op_mb in dumps
Portion of the target/ patchset which eliminates use of tcg_temp_free* Portion of the target/ patchset which eliminates use of tcg_const*
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* tag 'pull-tcg-20230305' of https://gitlab.com/rth7680/qemu: (84 commits) target/xtensa: Avoid tcg_const_i32 target/xtensa: Split constant in bit shift target/xtensa: Use tcg_gen_subfi_i32 in translate_sll target/xtensa: Avoid tcg_const_i32 in translate_l32r target/xtensa: Tidy translate_clamps target/xtensa: Tidy translate_bb target/sparc: Avoid tcg_const_{tl,i32} target/s390x: Split out gen_ri2 target/riscv: Avoid tcg_const_* target/microblaze: Avoid tcg_const_* throughout target/i386: Simplify POPF target/hexagon/idef-parser: Use gen_constant for gen_extend_tcg_width_op target/hexagon/idef-parser: Use gen_tmp for gen_rvalue_pred target/hexagon/idef-parser: Use gen_tmp for gen_pred_assign target/hexagon/idef-parser: Use gen_tmp for LPCFG target/hexagon: Use tcg_constant_* for gen_constant_from_imm docs/devel/tcg-ops: Drop recommendation to free temps tracing: remove transform.py include/exec/gen-icount: Drop tcg_temp_free in gen_tb_start target/tricore: Drop tcg_temp_free ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
2f2e911d |
| 24-Feb-2023 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Remove tcg_check_temp_count, tcg_clear_temp_count
Since all temps allocated by guest front-ends are now TEMP_TB, and we don't recycle TEMP_TB, there's no point in requiring that the front-ends
tcg: Remove tcg_check_temp_count, tcg_clear_temp_count
Since all temps allocated by guest front-ends are now TEMP_TB, and we don't recycle TEMP_TB, there's no point in requiring that the front-ends free the temps at all. Begin by dropping the inner-most checks that all temps have been freed.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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Revision tags: v7.0.0, v6.2.0, v6.1.0 |
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#
3470867b |
| 18-Feb-2021 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Decode the operand to INDEX_op_mb in dumps
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
968f305e |
| 03-Mar-2023 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Merge two sequential labels
Remove the first label and redirect all uses to the second.
Tested-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Taylor Simpson <tsimpson@quicinc.com> Sign
tcg: Merge two sequential labels
Remove the first label and redirect all uses to the second.
Tested-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Taylor Simpson <tsimpson@quicinc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
f85b1fc4 |
| 03-Mar-2023 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Link branches to the labels
This allows us to easily find all branches that use a label. Since 'refs' is only tested vs zero, remove it and test for an empty list instead. Drop the use of bitf
tcg: Link branches to the labels
This allows us to easily find all branches that use a label. Since 'refs' is only tested vs zero, remove it and test for an empty list instead. Drop the use of bitfields, which had been used to pack refs into a single 32-bit word.
Reviewed-by: Taylor Simpson <tsimpson@quicinc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
533206f0 |
| 03-Mar-2023 |
Richard W.M. Jones <rjones@redhat.com> |
tcg: Include "qemu/timer.h" for profile_getclock
When CONFIG_PROFILER is set there are various undefined references to profile_getclock. Include the header which defines this function.
For example
tcg: Include "qemu/timer.h" for profile_getclock
When CONFIG_PROFILER is set there are various undefined references to profile_getclock. Include the header which defines this function.
For example:
../tcg/tcg.c: In function ‘tcg_gen_code’: ../tcg/tcg.c:4905:51: warning: implicit declaration of function ‘profile_getclock’ [-Wimplicit-function-declaration] 4905 | qatomic_set(&prof->opt_time, prof->opt_time - profile_getclock()); | ^~~~~~~~~~~~~~~~
Signed-off-by: Richard W.M. Jones <rjones@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230303084948.3351546-1-rjones@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
a2b5f8b8 |
| 01-Mar-2023 |
Peter Maydell <peter.maydell@linaro.org> |
Merge tag 'pull-tcg-20230301' of https://gitlab.com/rth7680/qemu into staging
helper-head: Add fpu/softfloat-types.h softmmu: Use memmove in flatview_write_continue tcg: Add sign param to probe_acce
Merge tag 'pull-tcg-20230301' of https://gitlab.com/rth7680/qemu into staging
helper-head: Add fpu/softfloat-types.h softmmu: Use memmove in flatview_write_continue tcg: Add sign param to probe_access_flags, probe_access_full tcg: Convert TARGET_TB_PCREL to CF_PCREL tcg: Simplify temporary lifetimes for translators
# -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmP/jWUdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV9TcQf7B7+K/lrWvUVhZ4By # 7zrNIJKGwsxuQhGq9mS2Nx9ds9es5mS8SQT1ieNG6a51n6Gq8S2B8yFCRFdlDZWD # /QrMSjxrs+4c6pNHZu4v20Huy/VW0y004eYdGc8Lu5cXTDpy1mUZ2PrZYlWNQEVY # 4Ts5rTWdSZHRU1+dbB8MTWlml9//++TPB+ZvzqSb8jnRJfw4z7ijVJjUEEb93gQg # 8S3JiPU6d1ZzoXzGMK7Wd0MMi4pQUZkaX1HOpzvmQXjeErSP87CZvvji/Cucm8iW # rJ4U7t99nmZDqG9W1zdZfYfKNp4nLlfVldQWFVIx45awSPS0mCzrmeBT5NHyrxYK # 4OtuNQ== # =vzqE # -----END PGP SIGNATURE----- # gpg: Signature made Wed 01 Mar 2023 17:37:41 GMT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* tag 'pull-tcg-20230301' of https://gitlab.com/rth7680/qemu: (62 commits) tcg: Update docs/devel/tcg-ops.rst for temporary changes tcg: Remove tcg_temp_local_new_*, tcg_const_local_* exec/gen-icount: Don't use tcg_temp_local_new_i32 target/xtensa: Don't use tcg_temp_local_new_* target/ppc: Don't use tcg_temp_local_new target/mips: Don't use tcg_temp_local_new target/i386: Don't use tcg_temp_local_new target/hppa: Don't use tcg_temp_local_new target/hexagon/idef-parser: Drop gen_tmp_local target/hexagon: Don't use tcg_temp_local_new_* target/cris: Don't use tcg_temp_local_new target/arm: Don't use tcg_temp_local_new_* target/arm: Drop copies in gen_sve_{ldr,str} tcg: Change default temp lifetime to TEMP_TB tcg: Don't re-use TEMP_TB temporaries accel/tcg/plugin: Tidy plugin_gen_disable_mem_helpers accel/tcg/plugin: Use tcg_temp_ebb_* tcg: Use tcg_constant_ptr in do_dup tcg: Use tcg_temp_ebb_new_* in tcg/ tcg: Add tcg_temp_ebb_new_{i32,i64,ptr} ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
438e685b |
| 29-Jan-2023 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Remove tcg_temp_local_new_*, tcg_const_local_*
These symbols are now unused.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.
tcg: Remove tcg_temp_local_new_*, tcg_const_local_*
These symbols are now unused.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
e1c08b00 |
| 29-Jan-2023 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Don't re-use TEMP_TB temporaries
Reusing TEMP_TB interferes with detecting whether the temp can be adjusted to TEMP_EBB.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richar
tcg: Don't re-use TEMP_TB temporaries
Reusing TEMP_TB interferes with detecting whether the temp can be adjusted to TEMP_EBB.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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