| 419bafa5 | 10-Mar-2009 |
aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> |
tcg-arm: fix qemu_ld64
Emulating fldl on arm doesn't seem to work too well. It's the way
qemu_ld64 is translated to arm instructions.
tcg_out_ld32_12(s, COND_AL, data_reg, addr_reg, 0);
tcg-arm: fix qemu_ld64
Emulating fldl on arm doesn't seem to work too well. It's the way
qemu_ld64 is translated to arm instructions.
tcg_out_ld32_12(s, COND_AL, data_reg, addr_reg, 0);
tcg_out_ld32_12(s, COND_AL, data_reg2, addr_reg, 4);
Consider case where data_reg==0, data_reg2==1, and addr_reg==0. First load
overwrited addr_reg. So let's put an if (data_ref==addr_reg).
(Pablo Virolainen)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6808 c046a42c-6fe2-441c-8c8c-71466251a162
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| 0c9c3a9e | 01-Dec-2008 |
balrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162> |
arm: Don't potentially overwrite input registers in add2, sub2.
According to malc TCG will often genereate an add2/sub2/mul2 with low
half of the output in the same register as high half of one of t
arm: Don't potentially overwrite input registers in add2, sub2.
According to malc TCG will often genereate an add2/sub2/mul2 with low
half of the output in the same register as high half of one of the
inputs, so account for that.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5847 c046a42c-6fe2-441c-8c8c-71466251a162
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| fe33867b | 30-Nov-2008 |
balrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162> |
Don't rely on ARM tcg_out_goto() generating just a single insn.
Otherwise when tb_exit generates a jump beyond the pc-relative range,
tcg_out_goto() spans two/three instructions and we load the tb r
Don't rely on ARM tcg_out_goto() generating just a single insn.
Otherwise when tb_exit generates a jump beyond the pc-relative range,
tcg_out_goto() spans two/three instructions and we load the tb return
value from a wrong address. This is #ifdefed out currently because
we take care for the jumps to be local.
Problem spotted by Steffen Liebergeld.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5845 c046a42c-6fe2-441c-8c8c-71466251a162
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| e936243a | 23-May-2008 |
balrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162> |
A branch insn must not overwrite the branch target before relocation.
When a branch to label is translated it generates a reloc that is filled in
when the label is translated. However, when handlin
A branch insn must not overwrite the branch target before relocation.
When a branch to label is translated it generates a reloc that is filled in
when the label is translated. However, when handling an exception and
searching for the pc we abort the translation early and we sometimes
translate the branch but not the corresponding label and so no relocation
is done. When the block is executed again the branch points to no-where.
It seems tcg/sparc/ is going to suffer from the same issue.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4547 c046a42c-6fe2-441c-8c8c-71466251a162
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| 225b4376 | 23-May-2008 |
balrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162> |
Fix qemu_ld/st for mem_index > 0 on arm host.
offsetof(CPUState, tlb_table[mem_index][0].addr_read) with mem_index > 0
was larger than max immediate offset for ldr and str (12-bit) so insert an
addi
Fix qemu_ld/st for mem_index > 0 on arm host.
offsetof(CPUState, tlb_table[mem_index][0].addr_read) with mem_index > 0
was larger than max immediate offset for ldr and str (12-bit) so insert an
additional insn to add the mem_index offset.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4542 c046a42c-6fe2-441c-8c8c-71466251a162
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