target/sparc: Use DYNAMIC_PC_LOOKUP for JMPL

This is for a plain indirect branch with no other side effects.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson

target/sparc: Use DYNAMIC_PC_LOOKUP for JMPL

This is for a plain indirect branch with no other side effects.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230628071202.230991-7-richard.henderson@linaro.org>
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>

show more ...

target/sparc: Use DYNAMIC_PC_LOOKUP for conditional branches

When resolving JUMP_PC, we know this is for a plain branch
with no other side effects.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linar

target/sparc: Use DYNAMIC_PC_LOOKUP for conditional branches

When resolving JUMP_PC, we know this is for a plain branch
with no other side effects.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230628071202.230991-6-richard.henderson@linaro.org>
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>

show more ...

target/sparc: Introduce DYNAMIC_PC_LOOKUP

Create a new artificial "next pc" which also indicates
that nothing has changed within the cpu state which
requires returning to the main loop.

Pipe this n

target/sparc: Introduce DYNAMIC_PC_LOOKUP

Create a new artificial "next pc" which also indicates
that nothing has changed within the cpu state which
requires returning to the main loop.

Pipe this new value though all pc/npc checks.
Do not produce this new value yet.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230628071202.230991-5-richard.henderson@linaro.org>
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>

show more ...

target/sparc: Drop inline markers from translate.c

Let the compiler decide about inlining.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderso

target/sparc: Drop inline markers from translate.c

Let the compiler decide about inlining.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230628071202.230991-4-richard.henderson@linaro.org>
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>

show more ...

target/sparc: Fix npc comparison in sparc_tr_insn_start

During translation, npc == address, DYNAMIC_PC, or JUMP_PC.
It is only the encoding between here and sparc_restore_state_to_opc
that considers

target/sparc: Fix npc comparison in sparc_tr_insn_start

During translation, npc == address, DYNAMIC_PC, or JUMP_PC.
It is only the encoding between here and sparc_restore_state_to_opc
that considers JUMP_PC to be a bit within a larger value.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230628071202.230991-3-richard.henderson@linaro.org>
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>

show more ...

target/sparc: Use tcg_gen_lookup_and_goto_ptr in gen_goto_tb

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <2023

target/sparc: Use tcg_gen_lookup_and_goto_ptr in gen_goto_tb

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230628071202.230991-2-richard.henderson@linaro.org>
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>

show more ...

Merge tag 'pull-tcg-20230605' of https://gitlab.com/rth7680/qemu into staging

Build tcg/ once for system and once for user.
Unmap perf_marker.
Remove left over _link_error() definitions.

# -----BEG

Merge tag 'pull-tcg-20230605' of https://gitlab.com/rth7680/qemu into staging

Build tcg/ once for system and once for user.
Unmap perf_marker.
Remove left over _link_error() definitions.

# -----BEGIN PGP SIGNATURE-----
#
# iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmR+QekdHHJpY2hhcmQu
# aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV8NJwf+PE6ShfN+N65hwt0w
# mgIrWNadgnXezEyaUdEuzLre9Ln9uD9Are948xIGPTVoLyr2wEr+Ma9dFI+GpTHY
# 8C0b5v0SfHBBIK+wJb7VNcEdssRXVTcpikmmYv9IRpFTT8349bCdvJhuwojU5cyx
# NGgq9ydJ/dEUDtmVU6EnOyLCDSHg2mc+KPVWhjXaVbVPTyP6Xmb0BwSSUt1t5NQK
# Zw7E6G4z7QYXa7GNPTtXSWzTH3y9bSLQNj3jzHfJ6DPW23zxhFjCPhJYl1ecOHVF
# pxXEEIjieHQxdlm3kg+tcCoZSJ6OXESNzu2D8zk8Kf6xJjMItTQOOuokWM6mBX4y
# VbQoXg==
# =8vrl
# -----END PGP SIGNATURE-----
# gpg: Signature made Mon 05 Jun 2023 01:13:29 PM PDT
# gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg: issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [ultimate]

* tag 'pull-tcg-20230605' of https://gitlab.com/rth7680/qemu: (52 commits)
tcg/tcg-op-vec: Remove left over _link_error() definitions
accel/tcg: Unmap perf_marker
tcg: Build once for system and once for user-only
exec/poison: Do not poison CONFIG_SOFTMMU
plugins: Drop unused headers from exec/plugin-gen.h
plugins: Move plugin_insn_append to translator.c
tcg: Remove target-specific headers from tcg.[ch]
tcg: Move env defines out of NEED_CPU_H in helper-head.h
tcg: Fix PAGE/PROT confusion
accel/tcg: Tidy includes for translator.[ch]
target/arm: Add missing include of exec/exec-all.h
target/*: Add missing includes of exec/translation-block.h
target/mips: Tidy helpers for translation
target/arm: Tidy helpers for translation
accel/tcg: Move translator_fake_ldb out of line
target/ppc: Inline gen_icount_io_start()
accel/tcg: Introduce translator_io_start
accel/tcg: Move most of gen-icount.h into translator.c
include/exec: Remove CODE_GEN_AVG_BLOCK_SIZE
tcg: Spit out exec/translation-block.h
...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

show more ...

accel/tcg: Introduce translator_io_start

New wrapper around gen_io_start which takes care of the USE_ICOUNT
check, as well as marking the DisasContext to end the TB.
Remove exec/gen-icount.h.

Revie

accel/tcg: Introduce translator_io_start

New wrapper around gen_io_start which takes care of the USE_ICOUNT
check, as well as marking the DisasContext to end the TB.
Remove exec/gen-icount.h.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

show more ...

tcg: Pass TCGHelperInfo to tcg_gen_callN

In preparation for compiling tcg/ only once, eliminate
the all_helpers array. Instantiate the info structs for
the generic helpers in accel/tcg/, and the st

tcg: Pass TCGHelperInfo to tcg_gen_callN

In preparation for compiling tcg/ only once, eliminate
the all_helpers array. Instantiate the info structs for
the generic helpers in accel/tcg/, and the structs for
the target-specific helpers in each translate.c.

Since we don't see all of the info structs at startup,
initialize at first use, using g_once_init_* to make
sure we don't race while doing so.

Reviewed-by: Anton Johansson <anjo@rev.ng>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

show more ...

Merge tag 'pull-tcg-20230523-3' of https://gitlab.com/rth7680/qemu into staging

util: Host cpu detection for x86 and aa64
util: Use cpu detection for bufferiszero
migration: Use cpu detection for xb

Merge tag 'pull-tcg-20230523-3' of https://gitlab.com/rth7680/qemu into staging

util: Host cpu detection for x86 and aa64
util: Use cpu detection for bufferiszero
migration: Use cpu detection for xbzrle
tcg: Replace and remove cpu_atomic_{ld,st}o*
host/include: Split qemu/atomic128.h
tcg: Remove DEBUG_DISAS
tcg: Remove USE_TCG_OPTIMIZATIONS

# -----BEGIN PGP SIGNATURE-----
#
# iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmRtbwAdHHJpY2hhcmQu
# aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV8xlgf7B/RnVG7u7Hjndr6h
# fH07ujjElAivs+H05S0GGbQYpSNlqVv8PzXT2olJTAe15ryb537dCkqxyKW53vgb
# pUWzZf9Zy8XfN48W5V91dSKQE3gm5wBlOM6LI85F8XrIQyjZqkHti+rw3GxsamNL
# 8n2euOR0vx/jculBRxvZUAJDzb/0shN583mC5+wX/KInCHiNmMC6sCggyd5bpFJZ
# 1wqWwrUCqJ0KAAYKd9WrIKt6QwAX3kUDiBQPa1g+psBjZ1CYQ4lqZZn9uYQ4hEtG
# yBnT0ER2LOBQaKXJ0BrdG5c/mUNX7WkLBDTb+QjGGkfPc/bHIirXqeFzuyrXahg8
# kY155w==
# =XH8Z
# -----END PGP SIGNATURE-----
# gpg: Signature made Tue 23 May 2023 06:57:20 PM PDT
# gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg: issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [ultimate]

* tag 'pull-tcg-20230523-3' of https://gitlab.com/rth7680/qemu: (28 commits)
tcg: Remove USE_TCG_OPTIMIZATIONS
tcg: Remove DEBUG_DISAS
qemu/atomic128: Add runtime test for FEAT_LSE2
qemu/atomic128: Improve cmpxchg fallback for atomic16_set
tcg: Split out tcg/debug-assert.h
accel/tcg: Correctly use atomic128.h in ldst_atomicity.c.inc
qemu/atomic128: Split atomic16_read
accel/tcg: Eliminate #if on HAVE_ATOMIC128 and HAVE_CMPXCHG128
accel/tcg: Remove prot argument to atomic_mmu_lookup
accel/tcg: Remove cpu_atomic_{ld,st}o_*_mmu
target/s390x: Always use cpu_atomic_cmpxchgl_be_mmu in do_csst
target/s390x: Use cpu_{ld,st}*_mmu in do_csst
accel/tcg: Unify cpu_{ld,st}*_{be,le}_mmu
target/s390x: Use tcg_gen_qemu_{ld,st}_i128 for LPQ, STPQ
target/ppc: Use tcg_gen_qemu_{ld,st}_i128 for LQARX, LQ, STQ
include/qemu: Move CONFIG_ATOMIC128_OPT handling to atomic128.h
meson: Fix detect atomic128 support with optimization
include/host: Split out atomic128-ldst.h
include/host: Split out atomic128-cas.h
util: Add cpuinfo-aarch64.c
...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

show more ...

tcg: Remove DEBUG_DISAS

This had been set since the beginning, is never undefined,
and it would seem to be harmful to debugging to do so.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Sig

tcg: Remove DEBUG_DISAS

This had been set since the beginning, is never undefined,
and it would seem to be harmful to debugging to do so.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

show more ...

Merge tag 'pull-tcg-20230505' of https://gitlab.com/rth7680/qemu into staging

softfloat: Fix the incorrect computation in float32_exp2
tcg: Remove compatability helpers for qemu ld/st
target/alpha:

Merge tag 'pull-tcg-20230505' of https://gitlab.com/rth7680/qemu into staging

softfloat: Fix the incorrect computation in float32_exp2
tcg: Remove compatability helpers for qemu ld/st
target/alpha: Remove TARGET_ALIGNED_ONLY
target/hppa: Remove TARGET_ALIGNED_ONLY
target/sparc: Remove TARGET_ALIGNED_ONLY
tcg: Cleanups preparing to unify calls to qemu_ld/st helpers

# -----BEGIN PGP SIGNATURE-----
#
# iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmRVc9UdHHJpY2hhcmQu
# aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV9OiAgAgwc6wFOzFtSnYrvH
# b9YgcJLPX8urgx9g1Exv553hbVtt2J0lsLAhlgwKpms3Os4p6znKhUWcGosHFixO
# eBQFqcS22Cu/ZM2s6299GOGDpxCpjx0/bX7JJTjW805SdSgDAuEUIbKe0ZqQT5tx
# ++F9is2+plp95/BeQz2+hbkbbpdktUkkk288Adoz3KRHqt/zd8cer0WrqR2uVAuX
# swpEluwtCfaewc0iPcNjlp9rLzO882wCFm0RG1EC2j9NHtq8O8xyamM9PPEaRXLv
# MiMA2nB6hsGMz33Wuec8cZTMaCLB+Oqhbq7eYPbCA4SmJBE3V9Rgc7GL4B7yCsyI
# OXSK+Q==
# =GIXd
# -----END PGP SIGNATURE-----
# gpg: Signature made Fri 05 May 2023 10:23:33 PM BST
# gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg: issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [ultimate]

* tag 'pull-tcg-20230505' of https://gitlab.com/rth7680/qemu: (42 commits)
tcg: Widen helper_*_st[bw]_mmu val arguments
tcg: Introduce arg_slot_stk_ofs
tcg: Replace REG_P with arg_loc_reg_p
tcg: Move TCGLabelQemuLdst to tcg.c
tcg/sparc64: Pass TCGType to tcg_out_qemu_{ld,st}
tcg/sparc64: Drop is_64 test from tcg_out_qemu_ld data return
tcg/s390x: Introduce HostAddress
tcg/s390x: Pass TCGType to tcg_out_qemu_{ld,st}
tcg/riscv: Rationalize args to tcg_out_qemu_{ld,st}
tcg/riscv: Require TCG_TARGET_REG_BITS == 64
tcg/ppc: Introduce HostAddress
tcg/ppc: Rationalize args to tcg_out_qemu_{ld,st}
tcg/mips: Rationalize args to tcg_out_qemu_{ld,st}
tcg/loongarch64: Introduce HostAddress
tcg/loongarch64: Rationalize args to tcg_out_qemu_{ld,st}
tcg/arm: Introduce HostAddress
tcg/arm: Rationalize args to tcg_out_qemu_{ld,st}
tcg/aarch64: Introduce HostAddress
tcg/aarch64: Rationalize args to tcg_out_qemu_{ld,st}
tcg/i386: Introduce tcg_out_testi
...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

show more ...

target/sparc: Use MO_ALIGN where required

Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

target/sparc: Finish conversion to tcg_gen_qemu_{ld, st}_*

Convert away from the old interface with the implicit
MemOp argument.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Revi

target/sparc: Finish conversion to tcg_gen_qemu_{ld, st}_*

Convert away from the old interface with the implicit
MemOp argument.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Message-Id: <20230502135741.1158035-8-richard.henderson@linaro.org>

show more ...

Merge tag 'pull-tcg-20230313' of https://gitlab.com/rth7680/qemu into staging

accel/tcg: Fix NB_MMU_MODES to 16
Balance of the target/ patchset which eliminates tcg_temp_free
Balance of the target/

Merge tag 'pull-tcg-20230313' of https://gitlab.com/rth7680/qemu into staging

accel/tcg: Fix NB_MMU_MODES to 16
Balance of the target/ patchset which eliminates tcg_temp_free
Balance of the target/ patchset which eliminates tcg_const

# -----BEGIN PGP SIGNATURE-----
#
# iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmQPcb0dHHJpY2hhcmQu
# aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV885AgAjDbg1soRBy0THf0X
# CVXmQ4yYyUKAonZBL8Abt9yX01BhLFqEsrju3HiaLNOM9DbwWQ4gdvSrtAZ/K2YG
# d6EvC+rJe79pr58MEEhqO4OO1ymp52amRHtEXva4vcKRNuM9WF5by/Hz2PsZyenG
# ysaLBdddooA9SJeL7xYBMpKWFgUm3C8NzfaRfCBVcG94er9u8RUi0kx+drmOLw0g
# vZ3Hekvi2I8Y5mWqvHeAIOsr8Md9PO3ezWxEteE4qsPNTTRfVD93oSGe9nNCYZTX
# wWU51Vfv9GB6hOylAfMRIeCmkjks/gqLOGElsh1MaVovNDTXS5IKV/HgaLaocJHV
# 2P81uQ==
# =FpIY
# -----END PGP SIGNATURE-----
# gpg: Signature made Mon 13 Mar 2023 18:55:57 GMT
# gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg: issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F

* tag 'pull-tcg-20230313' of https://gitlab.com/rth7680/qemu: (91 commits)
tcg: Drop tcg_const_*
tcg: Drop tcg_const_*_vec
target/tricore: Use min/max for saturate
target/ppc: Avoid tcg_const_* in translate.c
target/ppc: Fix gen_tlbsx_booke206
target/ppc: Rewrite trans_ADDG6S
target/ppc: Avoid tcg_const_* in power8-pmu-regs.c.inc
target/ppc: Avoid tcg_const_* in fp-impl.c.inc
target/ppc: Avoid tcg_const_* in vsx-impl.c.inc
target/ppc: Avoid tcg_const_* in xxeval
target/ppc: Avoid tcg_const_* in vmx-impl.c.inc
target/ppc: Avoid tcg_const_i64 in do_vcntmb
target/m68k: Use tcg_constant_i32 in gen_ea_mode
target/arm: Avoid tcg_const_ptr in handle_rev
target/arm: Avoid tcg_const_ptr in handle_vec_simd_sqshrn
target/arm: Avoid tcg_const_ptr in disas_simd_zip_trn
target/arm: Avoid tcg_const_* in translate-mve.c
target/arm: Avoid tcg_const_ptr in gen_sve_{ldr,str}
target/arm: Improve trans_BFCI
target/arm: Create gen_set_rmode, gen_restore_rmode
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

tcg/sparc: Avoid tcg_const_tl in gen_edge

Push tcg_constant_tl into the shift argument directly.
Since t1 no longer exists as a temp, replace with lo1,
whose last use was just above.

Reviewed-by: P

tcg/sparc: Avoid tcg_const_tl in gen_edge

Push tcg_constant_tl into the shift argument directly.
Since t1 no longer exists as a temp, replace with lo1,
whose last use was just above.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

show more ...

Merge tag 'pull-tcg-20230305' of https://gitlab.com/rth7680/qemu into staging

tcg: Merge two sequential labels
accel/tcg: Retain prot flags from tlb_fill
accel/tcg: Honor TLB_DISCARD_WRITE in atomic

Merge tag 'pull-tcg-20230305' of https://gitlab.com/rth7680/qemu into staging

tcg: Merge two sequential labels
accel/tcg: Retain prot flags from tlb_fill
accel/tcg: Honor TLB_DISCARD_WRITE in atomic_mmu_lookup
accel/tcg: Honor TLB_WATCHPOINTS in atomic_mmu_lookup
target/sparc: Use tlb_set_page_full
include/qemu/cpuid: Introduce xgetbv_low
tcg/i386: Mark Win64 call-saved vector regs as reserved
tcg: Decode the operand to INDEX_op_mb in dumps

Portion of the target/ patchset which eliminates use of tcg_temp_free*
Portion of the target/ patchset which eliminates use of tcg_const*

# -----BEGIN PGP SIGNATURE-----
#
# iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmQFNegdHHJpY2hhcmQu
# aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV9WsQf+Ljs3WA5lvMPlpaSn
# Li35ay/A1f2cU6FYspl81su4/c7Ft9Q8rkPF4K1n1rwuvqR91G25WTQIrw8NFPXZ
# VU9GNGQc1qIVYO/hAH3fvgDmPxUF+tJDgT/BTNc1ldy6/v7QM3GWcEy8+O3H9S+K
# uj6vIuWke0ukq6ZGmSAZnXEaJFq3HU26mcP4KxDxfIUcezMtDVp6QevqzVxM65aa
# pUDh3qtsLGOxIYwthvu6avMQXORBhSB75awCuYH4QPJRpr3ahigcGsCr2gdVAQ8p
# R7BbpUUdK5Huos971oouJrt5FwwbVgGEx78eF27sl0H8QMoNhsfyn6PcN8nPENLJ
# MZYd+w==
# =8goQ
# -----END PGP SIGNATURE-----
# gpg: Signature made Mon 06 Mar 2023 00:38:00 GMT
# gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg: issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F

* tag 'pull-tcg-20230305' of https://gitlab.com/rth7680/qemu: (84 commits)
target/xtensa: Avoid tcg_const_i32
target/xtensa: Split constant in bit shift
target/xtensa: Use tcg_gen_subfi_i32 in translate_sll
target/xtensa: Avoid tcg_const_i32 in translate_l32r
target/xtensa: Tidy translate_clamps
target/xtensa: Tidy translate_bb
target/sparc: Avoid tcg_const_{tl,i32}
target/s390x: Split out gen_ri2
target/riscv: Avoid tcg_const_*
target/microblaze: Avoid tcg_const_* throughout
target/i386: Simplify POPF
target/hexagon/idef-parser: Use gen_constant for gen_extend_tcg_width_op
target/hexagon/idef-parser: Use gen_tmp for gen_rvalue_pred
target/hexagon/idef-parser: Use gen_tmp for gen_pred_assign
target/hexagon/idef-parser: Use gen_tmp for LPCFG
target/hexagon: Use tcg_constant_* for gen_constant_from_imm
docs/devel/tcg-ops: Drop recommendation to free temps
tracing: remove transform.py
include/exec/gen-icount: Drop tcg_temp_free in gen_tb_start
target/tricore: Drop tcg_temp_free
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

target/sparc: Avoid tcg_const_{tl,i32}

All remaining uses are strictly read-only.

Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@l

target/sparc: Avoid tcg_const_{tl,i32}

All remaining uses are strictly read-only.

Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

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target/sparc: Drop tcg_temp_free

Translators are no longer required to free tcg temporaries.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@iland

target/sparc: Drop tcg_temp_free

Translators are no longer required to free tcg temporaries.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

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target/sparc: Drop free_compare

Translators are no longer required to free tcg temporaries.
Remove the g1 and g2 members of DisasCompare, as they were
used to track which temps needed to be freed.

target/sparc: Drop free_compare

Translators are no longer required to free tcg temporaries.
Remove the g1 and g2 members of DisasCompare, as they were
used to track which temps needed to be freed.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

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target/sparc: Remove egress label in disas_sparc_context

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Hende

target/sparc: Remove egress label in disas_sparc_context

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

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target/sparc: Drop get_temp_i32

Translators are no longer required to free tcg temporaries,
therefore there's no need to record temps for later freeing.
Replace the few uses with tcg_temp_new_i32.

target/sparc: Drop get_temp_i32

Translators are no longer required to free tcg temporaries,
therefore there's no need to record temps for later freeing.
Replace the few uses with tcg_temp_new_i32.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

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target/sparc: Drop get_temp_tl

Translators are no longer required to free tcg temporaries,
therefore there's no need to record temps for later freeing.
Replace the few uses with tcg_temp_new.

Revie

target/sparc: Drop get_temp_tl

Translators are no longer required to free tcg temporaries,
therefore there's no need to record temps for later freeing.
Replace the few uses with tcg_temp_new.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

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Merge tag 'pull-tcg-20230301' of https://gitlab.com/rth7680/qemu into staging

helper-head: Add fpu/softfloat-types.h
softmmu: Use memmove in flatview_write_continue
tcg: Add sign param to probe_acce

Merge tag 'pull-tcg-20230301' of https://gitlab.com/rth7680/qemu into staging

helper-head: Add fpu/softfloat-types.h
softmmu: Use memmove in flatview_write_continue
tcg: Add sign param to probe_access_flags, probe_access_full
tcg: Convert TARGET_TB_PCREL to CF_PCREL
tcg: Simplify temporary lifetimes for translators

# -----BEGIN PGP SIGNATURE-----
#
# iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmP/jWUdHHJpY2hhcmQu
# aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV9TcQf7B7+K/lrWvUVhZ4By
# 7zrNIJKGwsxuQhGq9mS2Nx9ds9es5mS8SQT1ieNG6a51n6Gq8S2B8yFCRFdlDZWD
# /QrMSjxrs+4c6pNHZu4v20Huy/VW0y004eYdGc8Lu5cXTDpy1mUZ2PrZYlWNQEVY
# 4Ts5rTWdSZHRU1+dbB8MTWlml9//++TPB+ZvzqSb8jnRJfw4z7ijVJjUEEb93gQg
# 8S3JiPU6d1ZzoXzGMK7Wd0MMi4pQUZkaX1HOpzvmQXjeErSP87CZvvji/Cucm8iW
# rJ4U7t99nmZDqG9W1zdZfYfKNp4nLlfVldQWFVIx45awSPS0mCzrmeBT5NHyrxYK
# 4OtuNQ==
# =vzqE
# -----END PGP SIGNATURE-----
# gpg: Signature made Wed 01 Mar 2023 17:37:41 GMT
# gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg: issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F

* tag 'pull-tcg-20230301' of https://gitlab.com/rth7680/qemu: (62 commits)
tcg: Update docs/devel/tcg-ops.rst for temporary changes
tcg: Remove tcg_temp_local_new_*, tcg_const_local_*
exec/gen-icount: Don't use tcg_temp_local_new_i32
target/xtensa: Don't use tcg_temp_local_new_*
target/ppc: Don't use tcg_temp_local_new
target/mips: Don't use tcg_temp_local_new
target/i386: Don't use tcg_temp_local_new
target/hppa: Don't use tcg_temp_local_new
target/hexagon/idef-parser: Drop gen_tmp_local
target/hexagon: Don't use tcg_temp_local_new_*
target/cris: Don't use tcg_temp_local_new
target/arm: Don't use tcg_temp_local_new_*
target/arm: Drop copies in gen_sve_{ldr,str}
tcg: Change default temp lifetime to TEMP_TB
tcg: Don't re-use TEMP_TB temporaries
accel/tcg/plugin: Tidy plugin_gen_disable_mem_helpers
accel/tcg/plugin: Use tcg_temp_ebb_*
tcg: Use tcg_constant_ptr in do_dup
tcg: Use tcg_temp_ebb_new_* in tcg/
tcg: Add tcg_temp_ebb_new_{i32,i64,ptr}
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

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accel/tcg: Pass max_insn to gen_intermediate_code by pointer

In preparation for returning the number of insns generated
via the same pointer. Adjust only the prototypes so far.

Reviewed-by: Philip

accel/tcg: Pass max_insn to gen_intermediate_code by pointer

In preparation for returning the number of insns generated
via the same pointer. Adjust only the prototypes so far.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

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