target/microblaze: mbar: Add support for data-access barriers

Add support for data-access barriers.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alis

target/microblaze: mbar: Add support for data-access barriers

Add support for data-access barriers.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>

show more ...

target/microblaze: mbar: Move LOG_DIS to before sleep

Move LOG_DIS log to before sleeping handling so that it logs
for sleep instructions aswell.

Reviewed-by: Richard Henderson <richard.henderson@l

target/microblaze: mbar: Move LOG_DIS to before sleep

Move LOG_DIS log to before sleeping handling so that it logs
for sleep instructions aswell.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>

show more ...

target/microblaze: mbar: Transfer dc->rd to mbar_imm

Transfer dc->rd to mbar_imm to improve the readability when
comparing to the specs.

No functional change.

Reviewed-by: Richard Henderson <richa

target/microblaze: mbar: Transfer dc->rd to mbar_imm

Transfer dc->rd to mbar_imm to improve the readability when
comparing to the specs.

No functional change.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>

show more ...

Merge remote-tracking branch 'remotes/edgar/tags/edgar/xilinx-next-2020-05-14.for-upstream' into staging

Upstream

# gpg: Signature made Thu 14 May 2020 15:04:44 BST
# gpg: using RSA

Merge remote-tracking branch 'remotes/edgar/tags/edgar/xilinx-next-2020-05-14.for-upstream' into staging

Upstream

# gpg: Signature made Thu 14 May 2020 15:04:44 BST
# gpg: using RSA key AC44FEDC14F7F1EBEDBF415129C596780F6BCA83
# gpg: Good signature from "Edgar E. Iglesias (Xilinx key) <edgar.iglesias@xilinx.com>" [unknown]
# gpg: aka "Edgar E. Iglesias <edgar.iglesias@gmail.com>" [full]
# Primary key fingerprint: AC44 FEDC 14F7 F1EB EDBF 4151 29C5 9678 0F6B CA83

* remotes/edgar/tags/edgar/xilinx-next-2020-05-14.for-upstream:
target/microblaze: monitor: Increase the number of registers reported
target/microblaze: gdb: Fix incorrect SReg reporting
target/microblaze: gdb: Extend the number of registers presented to GDB
target/microblaze: Fix FPU2 instruction check
target/microblaze: Add MFS Rd,EDR translation
MAINTAINERS: Add myself as streams maintainer
hw/dma/xilinx_axidma: s2mm: Support stream fragments
hw/dma/xilinx_axidma: mm2s: Stream descriptor by descriptor
hw/net/xilinx_axienet: Handle fragmented packets from DMA
hw/core: stream: Add an end-of-packet flag
hw/dma/xilinx_axidma: Add DMA memory-region property
hw/net/xilinx_axienet: Remove unncessary cast
hw/net/xilinx_axienet: Cleanup stream->push assignment
hw/net/xilinx_axienet: Auto-clear PHY Autoneg

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

target/microblaze: monitor: Increase the number of registers reported

Increase the number of registers reported to match GDB.

Registers that aren't modeled are reported as 0.

Signed-off-by: Joe Ko

target/microblaze: monitor: Increase the number of registers reported

Increase the number of registers reported to match GDB.

Registers that aren't modeled are reported as 0.

Signed-off-by: Joe Komlodi <komlodi@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-Id: <1589393329-223076-4-git-send-email-komlodi@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>

show more ...

target/microblaze: Fix FPU2 instruction check

The check to see if we can use FPU2 instructions would return 0 if
cfg.use_fpu == 2, rather than returning the PVR2_USE_FPU2_MASK.

This would cause all

target/microblaze: Fix FPU2 instruction check

The check to see if we can use FPU2 instructions would return 0 if
cfg.use_fpu == 2, rather than returning the PVR2_USE_FPU2_MASK.

This would cause all FPU2 instructions (fsqrt, flt, fint) to not be used.

Signed-off-by: Joe Komlodi <komlodi@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-Id: <1589219346-106769-2-git-send-email-komlodi@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>

show more ...

target/microblaze: Add MFS Rd,EDR translation

This is to fix cpu-abort with 'qemu: fatal: unknown mfs reg d'
(in the default case) when microblaze guest issues 'MFS Rd,EDR'
instruction.

Since embed

target/microblaze: Add MFS Rd,EDR translation

This is to fix cpu-abort with 'qemu: fatal: unknown mfs reg d'
(in the default case) when microblaze guest issues 'MFS Rd,EDR'
instruction.

Since embeddedsw release 2019.2, XPlm_ExceptionHandler() issues
the instruction on exception, and microblaze model aborts when
PLM firmware guest encounters an exception.

Signed-off-by: Tong Ho <tong.ho@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Luc Michel <luc.michel@greensocs.com>
Message-Id: <20200512143649.21655-2-edgar.iglesias@gmail.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>

show more ...

Merge remote-tracking branch 'remotes/edgar/tags/edgar/xilinx-next-2020-04-30.for-upstream' into staging

For upstream

# gpg: Signature made Thu 30 Apr 2020 11:14:13 BST
# gpg: using

Merge remote-tracking branch 'remotes/edgar/tags/edgar/xilinx-next-2020-04-30.for-upstream' into staging

For upstream

# gpg: Signature made Thu 30 Apr 2020 11:14:13 BST
# gpg: using RSA key AC44FEDC14F7F1EBEDBF415129C596780F6BCA83
# gpg: Good signature from "Edgar E. Iglesias (Xilinx key) <edgar.iglesias@xilinx.com>" [unknown]
# gpg: aka "Edgar E. Iglesias <edgar.iglesias@gmail.com>" [full]
# Primary key fingerprint: AC44 FEDC 14F7 F1EB EDBF 4151 29C5 9678 0F6B CA83

* remotes/edgar/tags/edgar/xilinx-next-2020-04-30.for-upstream:
target/microblaze: Add the pvr-user2 property
target/microblaze: Add the pvr-user1 property
target/microblaze: Add the unaligned-exceptions property
target/microblaze: Add the div-zero-exception property
target/microblaze: Add the ill-opcode-exception property
target/microblaze: Add the opcode-0x0-illegal CPU property

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

target/microblaze: Add the unaligned-exceptions property

Add the unaligned-exceptions property to control if the core
traps unaligned memory accesses.

Reviewed-by: Alistair Francis <alistair.franci

target/microblaze: Add the unaligned-exceptions property

Add the unaligned-exceptions property to control if the core
traps unaligned memory accesses.

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Luc Michel <luc.michel@greensocs.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>

show more ...

target/microblaze: Add the ill-opcode-exception property

Add the ill-opcode-exception property to control if illegal
instructions will raise exceptions.

Reviewed-by: Alistair Francis <alistair.fran

target/microblaze: Add the ill-opcode-exception property

Add the ill-opcode-exception property to control if illegal
instructions will raise exceptions.

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Luc Michel <luc.michel@greensocs.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>

show more ...

target/microblaze: Add the opcode-0x0-illegal CPU property

Add the opcode-0x0-illegal CPU property to control if the core
should trap opcode zero as illegal.

Reviewed-by: Alistair Francis <alistair

target/microblaze: Add the opcode-0x0-illegal CPU property

Add the opcode-0x0-illegal CPU property to control if the core
should trap opcode zero as illegal.

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Luc Michel <luc.michel@greensocs.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>

show more ...

Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20200115' into staging

Add cpu_{ld,st}*_mmuidx_ra
Remove MMU_MODE*_SUFFIX
Move tcg headers under include/

# gpg: Signature made Thu 16 Jan 20

Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20200115' into staging

Add cpu_{ld,st}*_mmuidx_ra
Remove MMU_MODE*_SUFFIX
Move tcg headers under include/

# gpg: Signature made Thu 16 Jan 2020 01:36:41 GMT
# gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg: issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F

* remotes/rth/tags/pull-tcg-20200115: (34 commits)
MAINTAINERS: Replace Claudio Fontana for tcg/aarch64
configure: Remove tcg/ from the preprocessor include search list
tcg: Move TCG headers to include/tcg/
tcg: Search includes in the parent source directory
tcg: Search includes from the project root source directory
cputlb: Expand cpu_ldst_template.h in cputlb.c
cputlb: Remove support for MMU_MODE*_SUFFIX
target/ppc: Use cpu_*_mmuidx_ra instead of MMU_MODE*_SUFFIX
target/s390x: Use cpu_*_mmuidx_ra instead of MMU_MODE*_SUFFIX
target/mips: Use cpu_*_mmuidx_ra instead of MMU_MODE*_SUFFIX
target/m68k: Use cpu_*_mmuidx_ra instead of MMU_MODE{0,1}_SUFFIX
target/xtensa: Remove MMU_MODE{0,1,2,3}_SUFFIX
target/unicore32: Remove MMU_MODE{0,1}_SUFFIX
target/sh4: Remove MMU_MODE{0,1}_SUFFIX
target/microblaze: Remove MMU_MODE{0,1,2}_SUFFIX
target/i386: Remove MMU_MODE{0,1,2}_SUFFIX
target/cris: Remove MMU_MODE{0,1}_SUFFIX
target/alpha: Remove MMU_MODE{0,1}_SUFFIX
target/nios2: Remove MMU_MODE{0,1}_SUFFIX
cputlb: Expand cpu_ldst_useronly_template.h in user-exec.c
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

tcg: Search includes from the project root source directory

We currently search both the root and the tcg/ directories for tcg
files:

$ git grep '#include "tcg/' | wc -l
28

$ git grep '#incl

tcg: Search includes from the project root source directory

We currently search both the root and the tcg/ directories for tcg
files:

$ git grep '#include "tcg/' | wc -l
28

$ git grep '#include "tcg[^/]' | wc -l
94

To simplify the preprocessor search path, unify by expliciting the
tcg/ directory.

Patch created mechanically by running:

$ for x in \
tcg.h tcg-mo.h tcg-op.h tcg-opc.h \
tcg-op-gvec.h tcg-gvec-desc.h; do \
sed -i "s,#include \"$x\",#include \"tcg/$x\"," \
$(git grep -l "#include \"$x\""); \
done

Acked-by: David Gibson <david@gibson.dropbear.id.au> (ppc parts)
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Stefan Weil <sw@weilnetz.de>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20200101112303.20724-2-philmd@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

show more ...

Merge remote-tracking branch 'remotes/stsquad/tags/pull-tesing-and-misc-191219-1' into staging

Various testing and logging updates

- test tci with Travis
- enable multiarch testing in Travis

Merge remote-tracking branch 'remotes/stsquad/tags/pull-tesing-and-misc-191219-1' into staging

Various testing and logging updates

- test tci with Travis
- enable multiarch testing in Travis
- default to out-of-tree builds
- make changing logfile safe via RCU
- remove redundant tests
- remove gtester test from docker
- convert DEBUG_MMAP to tracepoints
- remove hand rolled glob function
- trigger tcg re-configure when needed

# gpg: Signature made Thu 19 Dec 2019 08:24:08 GMT
# gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44
# gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [full]
# Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44

* remotes/stsquad/tags/pull-tesing-and-misc-191219-1: (25 commits)
tests/tcg: ensure we re-configure if configure.sh is updated
trace: replace hand-crafted pattern_glob with g_pattern_match_simple
linux-user: convert target_munmap debug to a tracepoint
linux-user: log page table changes under -d page
linux-user: add target_mmap_complete tracepoint
linux-user: convert target_mmap debug to tracepoint
linux-user: convert target_mprotect debug to tracepoint
travis.yml: Remove the redundant clang-with-MAIN_SOFTMMU_TARGETS entry
docker: gtester is no longer used
Added tests for close and change of logfile.
Add use of RCU for qemu_logfile.
qemu_log_lock/unlock now preserves the qemu_logfile handle.
Add a mutex to guarantee single writer to qemu_logfile handle.
Cleaned up flow of code in qemu_set_log(), to simplify and clarify.
Fix double free issue in qemu_set_log_filename().
ci: build out-of-tree
travis.yml: Enable builds on arm64, ppc64le and s390x
tests/test-util-filemonitor: Skip test on non-x86 Travis containers
tests/hd-geo-test: Skip test when images can not be created
iotests: Skip test 079 if it is not possible to create large files
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

qemu_log_lock/unlock now preserves the qemu_logfile handle.

qemu_log_lock() now returns a handle and qemu_log_unlock() receives a
handle to unlock. This allows for changing the handle during loggin

qemu_log_lock/unlock now preserves the qemu_logfile handle.

qemu_log_lock() now returns a handle and qemu_log_unlock() receives a
handle to unlock. This allows for changing the handle during logging
and ensures the lock() and unlock() are for the same file.

Also in target/tilegx/translate.c removed the qemu_log_lock()/unlock()
calls (and the log("\n")), since the translator can longjmp out of the
loop if it attempts to translate an instruction in an inaccessible page.

Signed-off-by: Robert Foley <robert.foley@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20191118211528.3221-5-robert.foley@linaro.org>

show more ...

Merge remote-tracking branch 'remotes/edgar/tags/edgar/xilinx-next-2019-11-12.for-upstream' into staging

For upstream

# gpg: Signature made Tue 12 Nov 2019 15:41:43 GMT
# gpg: using

Merge remote-tracking branch 'remotes/edgar/tags/edgar/xilinx-next-2019-11-12.for-upstream' into staging

For upstream

# gpg: Signature made Tue 12 Nov 2019 15:41:43 GMT
# gpg: using RSA key AC44FEDC14F7F1EBEDBF415129C596780F6BCA83
# gpg: Good signature from "Edgar E. Iglesias (Xilinx key) <edgar.iglesias@xilinx.com>" [unknown]
# gpg: aka "Edgar E. Iglesias <edgar.iglesias@gmail.com>" [full]
# Primary key fingerprint: AC44 FEDC 14F7 F1EB EDBF 4151 29C5 9678 0F6B CA83

* remotes/edgar/tags/edgar/xilinx-next-2019-11-12.for-upstream:
target/microblaze: Plug temp leak around eval_cond_jmp()
target/microblaze: Plug temp leaks with delay slot setup
target/microblaze: Plug temp leaks for loads/stores

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

target/microblaze: Plug temp leak around eval_cond_jmp()

Plug temp leak around eval_cond_jmp().

Reviewed-by: Luc Michel <luc.michel@greensocs.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat

target/microblaze: Plug temp leak around eval_cond_jmp()

Plug temp leak around eval_cond_jmp().

Reviewed-by: Luc Michel <luc.michel@greensocs.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>

show more ...

target/microblaze: Plug temp leaks with delay slot setup

Plug temp leaks with delay slot setup.

Reviewed-by: Luc Michel <luc.michel@greensocs.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat

target/microblaze: Plug temp leaks with delay slot setup

Plug temp leaks with delay slot setup.

Reviewed-by: Luc Michel <luc.michel@greensocs.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>

show more ...

target/microblaze: Plug temp leaks for loads/stores

Simplify endian reversion of address also plugging TCG temp
leaks for loads/stores.

Suggested-by: Richard Henderson <richard.henderson@linaro.org

target/microblaze: Plug temp leaks for loads/stores

Simplify endian reversion of address also plugging TCG temp
leaks for loads/stores.

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Luc Michel <luc.michel@greensocs.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>

show more ...

Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20190903' into staging

Allow page table bit to swap endianness.
Reorganize watchpoints out of i/o path.
Return host address from probe_write /

Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20190903' into staging

Allow page table bit to swap endianness.
Reorganize watchpoints out of i/o path.
Return host address from probe_write / probe_access.

# gpg: Signature made Tue 03 Sep 2019 16:47:50 BST
# gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg: issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F

* remotes/rth/tags/pull-tcg-20190903: (36 commits)
tcg: Factor out probe_write() logic into probe_access()
tcg: Make probe_write() return a pointer to the host page
s390x/tcg: Pass a size to probe_write() in do_csst()
hppa/tcg: Call probe_write() also for CONFIG_USER_ONLY
mips/tcg: Call probe_write() for CONFIG_USER_ONLY as well
tcg: Enforce single page access in probe_write()
tcg: Factor out CONFIG_USER_ONLY probe_write() from s390x code
s390x/tcg: Fix length calculation in probe_write_access()
s390x/tcg: Use guest_addr_valid() instead of h2g_valid() in probe_write_access()
tcg: Check for watchpoints in probe_write()
cputlb: Handle watchpoints via TLB_WATCHPOINT
cputlb: Remove double-alignment in store_helper
cputlb: Fix size operand for tlb_fill on unaligned store
exec: Factor out cpu_watchpoint_address_matches
cputlb: Fold TLB_RECHECK into TLB_INVALID_MASK
exec: Factor out core logic of check_watchpoint()
exec: Move user-only watchpoint stubs inline
target/sparc: sun4u Invert Endian TTE bit
target/sparc: Add TLB entry with attributes
cputlb: Byte swap memory transaction attribute
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

tcg: TCGMemOp is now accelerator independent MemOp

Preparation for collapsing the two byte swaps, adjust_endianness and
handle_bswap, along the I/O path.

Target dependant attributes are conditional

tcg: TCGMemOp is now accelerator independent MemOp

Preparation for collapsing the two byte swaps, adjust_endianness and
handle_bswap, along the I/O path.

Target dependant attributes are conditionalized upon NEED_CPU_H.

Signed-off-by: Tony Nguyen <tony.nguyen@bt.com>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: Cornelia Huck <cohuck@redhat.com>
Message-Id: <81d9cd7d7f5aaadfa772d6c48ecee834e9cf7882.1566466906.git.tony.nguyen@bt.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

show more ...

Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging

* New KVM PV features (Marcelo, Wanpeng)
* valgrind fixes (Andrey)
* Remove clock reset notifiers (David)
* KConfig and

Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging

* New KVM PV features (Marcelo, Wanpeng)
* valgrind fixes (Andrey)
* Remove clock reset notifiers (David)
* KConfig and Makefile cleanups (Paolo)
* Replay and icount improvements (Pavel)
* x86 FP fixes (Peter M.)
* TCG locking assertions (Roman)
* x86 support for mmap-ed -kernel/-initrd (Stefano)
* Other cleanups (Wei Yang, Yan Zhao, Tony)
* LSI fix for infinite loop (Prasad)
* ARM migration fix (Catherine)
* AVX512_BF16 feature (Jing)

# gpg: Signature made Tue 20 Aug 2019 19:00:54 BST
# gpg: using RSA key BFFBD25F78C7AE83
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1
# Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83

* remotes/bonzini/tags/for-upstream: (33 commits)
x86: Intel AVX512_BF16 feature enabling
scsi: lsi: exit infinite loop while executing script (CVE-2019-12068)
test-bitmap: test set 1 bit case for bitmap_set
migration: do not rom_reset() during incoming migration
HACKING: Document 'struct' keyword usage
kvm: vmxcap: Enhance with latest features
cpus-common: nuke finish_safe_work
icount: remove unnecessary gen_io_end calls
icount: clean up cpu_can_io at the entry to the block
replay: rename step-related variables and functions
replay: refine replay-time module
replay: fix replay shutdown
util/qemu-timer: refactor deadline calculation for external timers
replay: document development rules
replay: add missing fix for internal function
timer: last, remove last bits of last
replay: Remove host_clock_last
timer: Remove reset notifiers
mc146818rtc: Remove reset notifiers
memory: fix race between TCG and accesses to dirty bitmap
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

icount: remove unnecessary gen_io_end calls

Prior patch resets can_do_io flag at the TB entry. Therefore there is no
need in resetting this flag at the end of the block.
This patch removes redundant

icount: remove unnecessary gen_io_end calls

Prior patch resets can_do_io flag at the TB entry. Therefore there is no
need in resetting this flag at the end of the block.
This patch removes redundant gen_io_end calls.

Signed-off-by: Pavel Dovgalyuk <Pavel.Dovgaluk@ispras.ru>
Message-Id: <156404429499.18669.13404064982854123855.stgit@pasha-Precision-3630-Tower>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Pavel Dovgalyuk <pavel.dovgaluk@gmail.com>

show more ...

Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20190610' into staging

Move softmmu tlb into CPUNegativeOffsetState

# gpg: Signature made Mon 10 Jun 2019 15:07:55 BST
# gpg:

Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20190610' into staging

Move softmmu tlb into CPUNegativeOffsetState

# gpg: Signature made Mon 10 Jun 2019 15:07:55 BST
# gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg: issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F

* remotes/rth/tags/pull-tcg-20190610: (39 commits)
tcg/arm: Remove mostly unreachable tlb special case
tcg/arm: Use LDRD to load tlb mask+table
tcg/aarch64: Use LDP to load tlb mask+table
cpu: Remove CPU_COMMON
cpu: Move the softmmu tlb to CPUNegativeOffsetState
cpu: Move icount_decr to CPUNegativeOffsetState
cpu: Introduce CPUNegativeOffsetState
cpu: Introduce cpu_set_cpustate_pointers
cpu: Move ENV_OFFSET to exec/gen-icount.h
target/xtensa: Use env_cpu, env_archcpu
target/unicore32: Use env_cpu, env_archcpu
target/tricore: Use env_cpu
target/tilegx: Use env_cpu
target/sparc: Use env_cpu, env_archcpu
target/sh4: Use env_cpu, env_archcpu
target/s390x: Use env_cpu, env_archcpu
target/riscv: Use env_cpu, env_archcpu
target/ppc: Use env_cpu, env_archcpu
target/openrisc: Use env_cpu, env_archcpu
target/nios2: Use env_cpu, env_archcpu
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

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target/microblaze: Use env_cpu, env_archcpu

Cleanup in the boilerplate that each target must define.
Replace mb_env_get_cpu with env_archcpu. The combination
CPU(mb_env_get_cpu) should have used EN

target/microblaze: Use env_cpu, env_archcpu

Cleanup in the boilerplate that each target must define.
Replace mb_env_get_cpu with env_archcpu. The combination
CPU(mb_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.

Move cpu_mmu_index below the include of "exec/cpu-all.h",
so that the definition of env_archcpu is available.

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

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