#
f448397a |
| 11-Oct-2021 |
Taylor Simpson <tsimpson@quicinc.com> |
Hexagon (target/hexagon) more tcg_constant_*
Change additional tcg_const_tl to tcg_constant_tl
Note that gen_pred_cancal had slot_mask initialized with tcg_const_tl. However, it is not constant thr
Hexagon (target/hexagon) more tcg_constant_*
Change additional tcg_const_tl to tcg_constant_tl
Note that gen_pred_cancal had slot_mask initialized with tcg_const_tl. However, it is not constant throughout, so we initialize it with tcg_temp_new and replace the first use with the constant value.
Inspired-by: Richard Henderson <richard.henderson@linaro.org> Inspired-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
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#
ca61fa4b |
| 06-Oct-2021 |
Richard Henderson <richard.henderson@linaro.org> |
Merge remote-tracking branch 'remotes/quic/tags/pull-hex-20211006' into staging
Change from Philippe - Use tcg_constant_* Change from Philippe - Remove unused TCG temp Change from Taylor - Probe the
Merge remote-tracking branch 'remotes/quic/tags/pull-hex-20211006' into staging
Change from Philippe - Use tcg_constant_* Change from Philippe - Remove unused TCG temp Change from Taylor - Probe the stores in a packet at start of commit
# gpg: Signature made Wed 06 Oct 2021 08:44:13 AM PDT # gpg: using RSA key 7B0244FB12DE4422 # gpg: Good signature from "Taylor Simpson (Rock on) <tsimpson@quicinc.com>" [marginal] # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: 3635 C788 CE62 B91F D4C5 9AB4 7B02 44FB 12DE 4422
* remotes/quic/tags/pull-hex-20211006: target/hexagon: Use tcg_constant_* target/hexagon: Remove unused TCG temporary from predicated loads Hexagon (target/hexagon) probe the stores in a packet at start of commit
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
23803bbe |
| 02-Oct-2021 |
Philippe Mathieu-Daudé <f4bug@amsat.org> |
target/hexagon: Use tcg_constant_*
Replace uses of tcg_const_* with the allocate and free close together.
Inspired-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Richard Henderso
target/hexagon: Use tcg_constant_*
Replace uses of tcg_const_* with the allocate and free close together.
Inspired-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Taylor Simpson <tsimpson@quicinc.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211003004750.3608983-3-f4bug@amsat.org>
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f844f745 |
| 02-Oct-2021 |
Philippe Mathieu-Daudé <f4bug@amsat.org> |
target/hexagon: Remove unused TCG temporary from predicated loads
The gen_pred_cancel() function, introduced in commit a646e99cb90 (Hexagon macros) doesn't use the 'one' TCG temporary; remove it.
R
target/hexagon: Remove unused TCG temporary from predicated loads
The gen_pred_cancel() function, introduced in commit a646e99cb90 (Hexagon macros) doesn't use the 'one' TCG temporary; remove it.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Taylor Simpson <tsimpson@quicinc.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211003004750.3608983-2-f4bug@amsat.org>
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#
d940d468 |
| 30-Jun-2021 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/quic/tags/pull-hex-20210629' into staging
Fixes for bugs found by inspection and internal testing Tests added to tests/tcg/hexagon/misc.c
# gpg: Signature made
Merge remote-tracking branch 'remotes/quic/tags/pull-hex-20210629' into staging
Fixes for bugs found by inspection and internal testing Tests added to tests/tcg/hexagon/misc.c
# gpg: Signature made Tue 29 Jun 2021 17:50:16 BST # gpg: using RSA key 7B0244FB12DE4422 # gpg: Good signature from "Taylor Simpson (Rock on) <tsimpson@quicinc.com>" [undefined] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 3635 C788 CE62 B91F D4C5 9AB4 7B02 44FB 12DE 4422
* remotes/quic/tags/pull-hex-20210629: Hexagon (target/hexagon) remove unused TCG variables Hexagon (target/hexagon) cleanup gen_store_conditional[48] functions Hexagon (target/hexagon) fix l2fetch instructions Hexagon (target/hexagon) fix bug in fLSBNEW*
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
88725336 |
| 01-Jun-2021 |
Taylor Simpson <tsimpson@quicinc.com> |
Hexagon (target/hexagon) cleanup gen_store_conditional[48] functions
Previously the store-conditional code was writing to hex_pred[prednum]. Then, the fGEN_TCG override was reading from there to the
Hexagon (target/hexagon) cleanup gen_store_conditional[48] functions
Previously the store-conditional code was writing to hex_pred[prednum]. Then, the fGEN_TCG override was reading from there to the destination variable so that the packet commit logic would handle it properly.
The correct implementation is to write to the destination variable and don't have the extra read in the override.
Remove the unused arguments from gen_store_conditional[48]
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <1622589584-22571-4-git-send-email-tsimpson@quicinc.com>
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#
07c0f653 |
| 01-Jun-2021 |
Taylor Simpson <tsimpson@quicinc.com> |
Hexagon (target/hexagon) fix bug in fLSBNEW*
Change fLSBNEW/fLSBNEW0/fLSBNEW1 from copy to "x & 1" Remove gen_logical_not function Clean up fLSBNEWNOT to use andi-1 followed by xori-1
Test cases ad
Hexagon (target/hexagon) fix bug in fLSBNEW*
Change fLSBNEW/fLSBNEW0/fLSBNEW1 from copy to "x & 1" Remove gen_logical_not function Clean up fLSBNEWNOT to use andi-1 followed by xori-1
Test cases added to tests/tcg/hexagon/misc.c
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <1622589584-22571-2-git-send-email-tsimpson@quicinc.com>
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#
15106f7d |
| 02-May-2021 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-hex-20210502' into staging
Minor cleanups. Finish the rest of the hexagon integer instructions.
# gpg: Signature made Sun 02 May 2021 15:3
Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-hex-20210502' into staging
Minor cleanups. Finish the rest of the hexagon integer instructions.
# gpg: Signature made Sun 02 May 2021 15:38:17 BST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* remotes/rth-gitlab/tags/pull-hex-20210502: (31 commits) Hexagon (target/hexagon) CABAC decode bin Hexagon (target/hexagon) load into shifted register instructions Hexagon (target/hexagon) load and unpack bytes instructions Hexagon (target/hexagon) bit reverse (brev) addressing Hexagon (target/hexagon) circular addressing Hexagon (target/hexagon) add A4_addp_c/A4_subp_c Hexagon (target/hexagon) add A6_vminub_RdP Hexagon (target/hexagon) add A5_ACS (vacsh) Hexagon (target/hexagon) add F2_sfinvsqrta Hexagon (target/hexagon) add F2_sfrecipa instruction Hexagon (target/hexagon) compile all debug code Hexagon (target/hexagon) move QEMU_GENERATE to only be on during macros.h Hexagon (target/hexagon) cleanup reg_field_info definition Hexagon (target/hexagon) cleanup ternary operators in semantics Hexagon (target/hexagon) use softfloat for float-to-int conversions Hexagon (target/hexagon) replace float32_mul_pow2 with float32_scalbn Hexagon (target/hexagon) use softfloat default NaN and tininess Hexagon (target/hexagon) change type of softfloat_roundingmodes Hexagon (target/hexagon) remove unused carry_from_add64 function Hexagon (target/hexagon) change variables from int to bool when appropriate ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
e628c015 |
| 08-Apr-2021 |
Taylor Simpson <tsimpson@quicinc.com> |
Hexagon (target/hexagon) CABAC decode bin
The following instruction is added S2_cabacdecbin Rdd32=decbin(Rss32,Rtt32)
Test cases added to tests/tcg/hexagon/misc.c
Signed-off-by: Tay
Hexagon (target/hexagon) CABAC decode bin
The following instruction is added S2_cabacdecbin Rdd32=decbin(Rss32,Rtt32)
Test cases added to tests/tcg/hexagon/misc.c
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <1617930474-31979-27-git-send-email-tsimpson@quicinc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
0d0b91a8 |
| 08-Apr-2021 |
Taylor Simpson <tsimpson@quicinc.com> |
Hexagon (target/hexagon) load and unpack bytes instructions
The following instructions are added L2_loadbzw2_io Rd32 = memubh(Rs32+#s11:1) L2_loadbzw4_io Rdd32 = memubh(Rs3
Hexagon (target/hexagon) load and unpack bytes instructions
The following instructions are added L2_loadbzw2_io Rd32 = memubh(Rs32+#s11:1) L2_loadbzw4_io Rdd32 = memubh(Rs32+#s11:1) L2_loadbsw2_io Rd32 = membh(Rs32+#s11:1) L2_loadbsw4_io Rdd32 = membh(Rs32+#s11:1)
L4_loadbzw2_ur Rd32 = memubh(Rt32<<#u2+#U6) L4_loadbzw4_ur Rdd32 = memubh(Rt32<<#u2+#U6) L4_loadbsw2_ur Rd32 = membh(Rt32<<#u2+#U6) L4_loadbsw4_ur Rdd32 = membh(Rt32<<#u2+#U6)
L4_loadbzw2_ap Rd32 = memubh(Re32=#U6) L4_loadbzw4_ap Rdd32 = memubh(Re32=#U6) L4_loadbsw2_ap Rd32 = membh(Re32=#U6) L4_loadbsw4_ap Rdd32 = membh(Re32=#U6)
L2_loadbzw2_pr Rd32 = memubh(Rx32++Mu2) L2_loadbzw4_pr Rdd32 = memubh(Rx32++Mu2) L2_loadbsw2_pr Rd32 = membh(Rx32++Mu2) L2_loadbsw4_pr Rdd32 = membh(Rx32++Mu2)
L2_loadbzw2_pbr Rd32 = memubh(Rx32++Mu2:brev) L2_loadbzw4_pbr Rdd32 = memubh(Rx32++Mu2:brev) L2_loadbsw2_pbr Rd32 = membh(Rx32++Mu2:brev) L2_loadbsw4_pbr Rdd32 = membh(Rx32++Mu2:brev)
L2_loadbzw2_pi Rd32 = memubh(Rx32++#s4:1) L2_loadbzw4_pi Rdd32 = memubh(Rx32++#s4:1) L2_loadbsw2_pi Rd32 = membh(Rx32++#s4:1) L2_loadbsw4_pi Rdd32 = membh(Rx32++#s4:1)
L2_loadbzw2_pci Rd32 = memubh(Rx32++#s4:1:circ(Mu2)) L2_loadbzw4_pci Rdd32 = memubh(Rx32++#s4:1:circ(Mu2)) L2_loadbsw2_pci Rd32 = membh(Rx32++#s4:1:circ(Mu2)) L2_loadbsw4_pci Rdd32 = membh(Rx32++#s4:1:circ(Mu2))
L2_loadbzw2_pcr Rd32 = memubh(Rx32++I:circ(Mu2)) L2_loadbzw4_pcr Rdd32 = memubh(Rx32++I:circ(Mu2)) L2_loadbsw2_pcr Rd32 = membh(Rx32++I:circ(Mu2)) L2_loadbsw4_pcr Rdd32 = membh(Rx32++I:circ(Mu2))
Test cases in tests/tcg/hexagon/load_unpack.c
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <1617930474-31979-25-git-send-email-tsimpson@quicinc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
af7f1821 |
| 08-Apr-2021 |
Taylor Simpson <tsimpson@quicinc.com> |
Hexagon (target/hexagon) bit reverse (brev) addressing
The following instructions are added L2_loadrub_pbr Rd32 = memub(Rx32++Mu2:brev) L2_loadrb_pbr Rd32 = memb(Rx32++Mu2
Hexagon (target/hexagon) bit reverse (brev) addressing
The following instructions are added L2_loadrub_pbr Rd32 = memub(Rx32++Mu2:brev) L2_loadrb_pbr Rd32 = memb(Rx32++Mu2:brev) L2_loadruh_pbr Rd32 = memuh(Rx32++Mu2:brev) L2_loadrh_pbr Rd32 = memh(Rx32++Mu2:brev) L2_loadri_pbr Rd32 = memw(Rx32++Mu2:brev) L2_loadrd_pbr Rdd32 = memd(Rx32++Mu2:brev) S2_storerb_pbr memb(Rx32++Mu2:brev).=.Rt32 S2_storerh_pbr memh(Rx32++Mu2:brev).=.Rt32 S2_storerf_pbr memh(Rx32++Mu2:brev).=.Rt.H32 S2_storeri_pbr memw(Rx32++Mu2:brev).=.Rt32 S2_storerd_pbr memd(Rx32++Mu2:brev).=.Rt32 S2_storerinew_pbr memw(Rx32++Mu2:brev).=.Nt8.new S2_storerbnew_pbr memw(Rx32++Mu2:brev).=.Nt8.new S2_storerhnew_pbr memw(Rx32++Mu2:brev).=.Nt8.new
Test cases in tests/tcg/hexagon/brev.c
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <1617930474-31979-24-git-send-email-tsimpson@quicinc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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46ef47e2 |
| 08-Apr-2021 |
Taylor Simpson <tsimpson@quicinc.com> |
Hexagon (target/hexagon) circular addressing
The following instructions are added L2_loadrub_pci Rd32 = memub(Rx32++#s4:0:circ(Mu2)) L2_loadrb_pci Rd32 = memb(Rx32++#s4:0:
Hexagon (target/hexagon) circular addressing
The following instructions are added L2_loadrub_pci Rd32 = memub(Rx32++#s4:0:circ(Mu2)) L2_loadrb_pci Rd32 = memb(Rx32++#s4:0:circ(Mu2)) L2_loadruh_pci Rd32 = memuh(Rx32++#s4:1:circ(Mu2)) L2_loadrh_pci Rd32 = memh(Rx32++#s4:1:circ(Mu2)) L2_loadri_pci Rd32 = memw(Rx32++#s4:2:circ(Mu2)) L2_loadrd_pci Rdd32 = memd(Rx32++#s4:3:circ(Mu2)) S2_storerb_pci memb(Rx32++#s4:0:circ(Mu2)) = Rt32 S2_storerh_pci memh(Rx32++#s4:1:circ(Mu2)) = Rt32 S2_storerf_pci memh(Rx32++#s4:1:circ(Mu2)) = Rt.H32 S2_storeri_pci memw(Rx32++#s4:2:circ(Mu2)) = Rt32 S2_storerd_pci memd(Rx32++#s4:3:circ(Mu2)) = Rtt32 S2_storerbnew_pci memb(Rx32++#s4:0:circ(Mu2)) = Nt8.new S2_storerhnew_pci memw(Rx32++#s4:1:circ(Mu2)) = Nt8.new S2_storerinew_pci memw(Rx32++#s4:2:circ(Mu2)) = Nt8.new L2_loadrub_pcr Rd32 = memub(Rx32++I:circ(Mu2)) L2_loadrb_pcr Rd32 = memb(Rx32++I:circ(Mu2)) L2_loadruh_pcr Rd32 = memuh(Rx32++I:circ(Mu2)) L2_loadrh_pcr Rd32 = memh(Rx32++I:circ(Mu2)) L2_loadri_pcr Rd32 = memw(Rx32++I:circ(Mu2)) L2_loadrd_pcr Rdd32 = memd(Rx32++I:circ(Mu2)) S2_storerb_pcr memb(Rx32++I:circ(Mu2)) = Rt32 S2_storerh_pcr memh(Rx32++I:circ(Mu2)) = Rt32 S2_storerf_pcr memh(Rx32++I:circ(Mu2)) = Rt32.H32 S2_storeri_pcr memw(Rx32++I:circ(Mu2)) = Rt32 S2_storerd_pcr memd(Rx32++I:circ(Mu2)) = Rtt32 S2_storerbnew_pcr memb(Rx32++I:circ(Mu2)) = Nt8.new S2_storerhnew_pcr memh(Rx32++I:circ(Mu2)) = Nt8.new S2_storerinew_pcr memw(Rx32++I:circ(Mu2)) = Nt8.new
Test cases in tests/tcg/hexagon/circ.c
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <1617930474-31979-23-git-send-email-tsimpson@quicinc.com> [rth: Squash <1619667142-29636-1-git-send-email-tsimpson@quicinc.com> removing gen_read_reg and gen_set_byte to avoid clang Werror.] Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
85511161 |
| 08-Apr-2021 |
Taylor Simpson <tsimpson@quicinc.com> |
Hexagon (target/hexagon) remove unused carry_from_add64 function
Suggested-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Rich
Hexagon (target/hexagon) remove unused carry_from_add64 function
Suggested-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <1617930474-31979-9-git-send-email-tsimpson@quicinc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
bb5643ff |
| 09-Mar-2021 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-hex-20210306' into staging
Add hexagon to include/exec/poison.h Two Coverity fixes for target/hexagon/
# gpg: Signature made Sun 07 Mar 20
Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-hex-20210306' into staging
Add hexagon to include/exec/poison.h Two Coverity fixes for target/hexagon/
# gpg: Signature made Sun 07 Mar 2021 01:37:05 GMT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* remotes/rth-gitlab/tags/pull-hex-20210306: target/hexagon/opcodes: Add missing varargs cleanup target/hexagon: Fix shift amount check in fASHIFTL/fLSHIFTR exec: Poison Hexagon target-specific definitions
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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66a1807b |
| 04-Mar-2021 |
Taylor Simpson <tsimpson@quicinc.com> |
target/hexagon: Fix shift amount check in fASHIFTL/fLSHIFTR
Fixes: a646e99cb90 ("Hexagon (target/hexagon) macros") Eliminate the following Coverity CIDs (Bad bit shift operation) 325227 3252
target/hexagon: Fix shift amount check in fASHIFTL/fLSHIFTR
Fixes: a646e99cb90 ("Hexagon (target/hexagon) macros") Eliminate the following Coverity CIDs (Bad bit shift operation) 325227 325292 325425 325526 325561 325564 325578 325637 325736 325748 325786 325815 325837
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Message-Id: <1614879425-9259-1-git-send-email-tsimpson@quicinc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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c79f01c9 |
| 18-Feb-2021 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-hex-20210218' into staging
Initial commit for the Qualcomm Hexagon processor.
# gpg: Signature made Thu 18 Feb 2021 16:26:52 GMT # gpg:
Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-hex-20210218' into staging
Initial commit for the Qualcomm Hexagon processor.
# gpg: Signature made Thu 18 Feb 2021 16:26:52 GMT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* remotes/rth-gitlab/tags/pull-hex-20210218: (35 commits) Hexagon build infrastructure Hexagon (tests/tcg/hexagon) TCG tests - floating point Hexagon (tests/tcg/hexagon) TCG tests - atomics/load/store/misc Hexagon (tests/tcg/hexagon) TCG tests - multiarch Hexagon (linux-user/hexagon) Linux user emulation Hexagon (target/hexagon) translation Hexagon (target/hexagon) TCG for floating point instructions Hexagon (target/hexagon) TCG for instructions with multiple definitions Hexagon (target/hexagon) TCG generation Hexagon (target/hexagon) instruction classes Hexagon (target/hexagon) macros Hexagon (target/hexagon) opcode data structures Hexagon (target/hexagon) generater phase 4 - decode tree Hexagon (target/hexagon) generator phase 3 - C preprocessor for decode tree Hexagon (target/hexagon) generator phase 2 - generate header files Hexagon (target/hexagon) generator phase 1 - C preprocessor for semantics Hexagon (target/hexagon/imported) arch import Hexagon (target/hexagon/fma_emu.[ch]) utility functions Hexagon (target/hexagon/conv_emu.[ch]) utility functions Hexagon (target/hexagon/arch.[ch]) utility functions ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
a646e99c |
| 07-Feb-2021 |
Taylor Simpson <tsimpson@quicinc.com> |
Hexagon (target/hexagon) macros
macros to interface with the generator macros referenced in instruction semantics
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Richard Henderson
Hexagon (target/hexagon) macros
macros to interface with the generator macros referenced in instruction semantics
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <1612763186-18161-25-git-send-email-tsimpson@quicinc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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