Merge remote-tracking branch 'remotes/alistair23/tags/pull-riscv-to-apply-20211022-2' into staging

Fourth RISC-V PR for QEMU 6.2

- Vector extension bug fixes
- Bit manipulation extension bug fix

Merge remote-tracking branch 'remotes/alistair23/tags/pull-riscv-to-apply-20211022-2' into staging

Fourth RISC-V PR for QEMU 6.2

- Vector extension bug fixes
- Bit manipulation extension bug fix
- Support vhost-user and numa mem options on all boards
- Rationalise XLEN and operand lengths
- Bump the OpenTitan FPGA support
- Remove the Ibex PLIC
- General code cleanup

# gpg: Signature made Fri 22 Oct 2021 06:36:10 AM PDT
# gpg: using RSA key F6C4AC46D4934868D3B8CE8F21E10D29DF977054
# gpg: Good signature from "Alistair Francis <alistair@alistair23.me>" [full]

* remotes/alistair23/tags/pull-riscv-to-apply-20211022-2: (33 commits)
hw/riscv: spike: Use MachineState::ram and MachineClass::default_ram_id
hw/riscv: sifive_u: Use MachineState::ram and MachineClass::default_ram_id
hw/riscv: sifive_e: Use MachineState::ram and MachineClass::default_ram_id
hw/riscv: shakti_c: Use MachineState::ram and MachineClass::default_ram_id
hw/riscv: opentitan: Use MachineState::ram and MachineClass::default_ram_id
hw/riscv: microchip_pfsoc: Use MachineState::ram and MachineClass::default_ram_id
hw/intc: sifive_plic: Cleanup the irq_request function
hw/intc: sifive_plic: Cleanup the realize function
hw/intc: sifive_plic: Move the properties
hw/intc: Remove the Ibex PLIC
hw/riscv: opentitan: Update to the latest build
target/riscv: Compute mstatus.sd on demand
target/riscv: Use riscv_csrrw_debug for cpu_dump
target/riscv: Use gen_shift*_per_ol for RVB, RVI
target/riscv: Use gen_unary_per_ol for RVB
target/riscv: Adjust trans_rev8_32 for riscv64
target/riscv: Use gen_arith_per_ol for RVM
target/riscv: Replace DisasContext.w with DisasContext.ol
target/riscv: Replace is_32bit with get_xl/get_xlen
target/riscv: Properly check SEW in amo_op
...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

show more ...

target/riscv: Split misa.mxl and misa.ext

The hw representation of misa.mxl is at the high bits of the
misa csr. Representing this in the same way inside QEMU
results in overly complex code trying

target/riscv: Split misa.mxl and misa.ext

The hw representation of misa.mxl is at the high bits of the
misa csr. Representing this in the same way inside QEMU
results in overly complex code trying to check that field.

Reviewed-by: LIU Zhiwei <zhiwei_liu@c-sky.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20211020031709.359469-4-richard.henderson@linaro.org
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>

show more ...

Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-6.2-20211021' into staging

ppc patch queue 2021-10-21

Here's the next batch of ppc target related patches for qemu-6.2.
Highlights are:
*

Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-6.2-20211021' into staging

ppc patch queue 2021-10-21

Here's the next batch of ppc target related patches for qemu-6.2.
Highlights are:
* Some fixes and minimal tests for old embedded ppc platforms
* The beginnings of PMU emulation in TCG from Daniel Barboza
* Some improvements to the pegasos2 platform
* A number of TCG bugfixes from the folks at the El Dorado Institute
* A few other assorted bugfixes and cleanups

# gpg: Signature made Wed 20 Oct 2021 09:19:04 PM PDT
# gpg: using RSA key 75F46586AE61A66CC44E87DC6C38CACA20D9B392
# gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" [full]
# gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" [unknown]
# gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" [full]
# gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" [full]

* remotes/dgibson/tags/ppc-for-6.2-20211021: (25 commits)
hw/ppc/ppc4xx_pci: Fix ppc4xx_pci_map_irq() for recent Linux kernels
target/ppc: adding user read/write functions for PMCs
target/ppc: add user read/write functions for MMCR2
target/ppc: add user read/write functions for MMCR0
target/ppc: add MMCR0 PMCC bits to hflags
target/ppc: Filter mtmsr[d] input before setting MSR
tests/acceptance: Add a test for the bamboo ppc board
ppc/pegasos2: Implement power-off RTAS function with VOF
ppc/pegasos2: Add constants for PCI config addresses
ppc/pegasos2: Access MV64361 registers via their memory region
ppc/pegasos2: Implement get-time-of-day RTAS function with VOF
ppc/pegasos2: Warn when using VOF but no kernel is specified
ppc/pegasos2: Restrict memory to 2 gigabytes
target/ppc: Fix XER access in monitor
linux-user: Fix XER access in ppc version of elf_core_copy_regs
target/ppc: Fix XER access in gdbstub
linux-user/ppc: Fix XER access in save/restore_user_regs
tests/acceptance: Add tests for the ppc405 boards
hw/ppc: Fix iothread locking in the 405 code
spapr/xive: Use xive_esb_rw() to trigger interrupts
...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

show more ...

linux-user: Fix XER access in ppc version of elf_core_copy_regs

env->xer doesn't hold some bits of XER, like OV and CA. To write the
complete register in the core dump we should read XER value with

linux-user: Fix XER access in ppc version of elf_core_copy_regs

env->xer doesn't hold some bits of XER, like OV and CA. To write the
complete register in the core dump we should read XER value with
cpu_read_xer.

Reported-by: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br>
Fixes: da91a00f191f ("target-ppc: Split out SO, OV, CA fields from XER")
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20211014223234.127012-4-matheus.ferst@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>

show more ...

Merge remote-tracking branch 'remotes/vivier/tags/linux-user-for-6.2-pull-request' into staging

Pull request linux-user 20211004

Move signal trampolines to new page

# gpg: Signature made Mon 04 Oc

Merge remote-tracking branch 'remotes/vivier/tags/linux-user-for-6.2-pull-request' into staging

Pull request linux-user 20211004

Move signal trampolines to new page

# gpg: Signature made Mon 04 Oct 2021 12:43:53 AM PDT
# gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C
# gpg: issuer "laurent@vivier.eu"
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
# gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full]
# gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full]

* remotes/vivier/tags/linux-user-for-6.2-pull-request: (26 commits)
tests/tcg/multiarch: Re-enable signals test for most guests
linux-user: Remove default for TARGET_ARCH_HAS_SIGTRAMP_PAGE
linux-user/xtensa: Implement setup_sigtramp
linux-user/sparc: Implement setup_sigtramp
linux-user/sh4: Implement setup_sigtramp
linux-user/s390x: Implement setup_sigtramp
linux-user/riscv: Implement setup_sigtramp
linux-user/ppc: Implement setup_sigtramp
linux-user/ppc: Simplify encode_trampoline
linux-user/openrisc: Implement setup_sigtramp
linux-user/nios2: Document non-use of setup_sigtramp
linux-user/mips: Implement setup_sigtramp
linux-user/mips: Tidy install_sigtramp
linux-user/microblaze: Implement setup_sigtramp
linux-user/m68k: Implement setup_sigtramp
linux-user/x86_64: Raise SIGSEGV if SA_RESTORER not set
linux-user/i386: Implement setup_sigtramp
linux-user/hppa: Document non-use of setup_sigtramp
linux-user/hexagon: Implement setup_sigtramp
linux-user/cris: Implement setup_sigtramp
...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

show more ...

linux-user: Remove default for TARGET_ARCH_HAS_SIGTRAMP_PAGE

All targets now define TARGET_ARCH_HAS_SIGTRAMP_PAGE.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Hende

linux-user: Remove default for TARGET_ARCH_HAS_SIGTRAMP_PAGE

All targets now define TARGET_ARCH_HAS_SIGTRAMP_PAGE.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210929130553.121567-26-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>

show more ...

linux-user: Add infrastructure for a signal trampoline page

Allocate a page to hold the signal trampoline(s).
Invoke a guest-specific hook to fill in the contents
of the page before marking it read-

linux-user: Add infrastructure for a signal trampoline page

Allocate a page to hold the signal trampoline(s).
Invoke a guest-specific hook to fill in the contents
of the page before marking it read-execute again.

Reviewed-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210929130553.121567-2-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>

show more ...

Merge remote-tracking branch 'remotes/vivier2/tags/linux-user-for-6.2-pull-request' into staging

Pull request linux-user 20210916

Code cleanup

# gpg: Signature made Thu 16 Sep 2021 16:11:58 BST
#

Merge remote-tracking branch 'remotes/vivier2/tags/linux-user-for-6.2-pull-request' into staging

Pull request linux-user 20210916

Code cleanup

# gpg: Signature made Thu 16 Sep 2021 16:11:58 BST
# gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C
# gpg: issuer "laurent@vivier.eu"
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
# gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full]
# gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full]
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C

* remotes/vivier2/tags/linux-user-for-6.2-pull-request:
linux-user: Check lock_user result for ip_mreq_source sockopts
linux-user: Drop unneeded includes from qemu.h
linux-user: Don't include gdbstub.h in qemu.h
linux-user: Split linux-user internals out of qemu.h
linux-user: Split safe-syscall macro into its own header
linux-user: Split mmap prototypes into user-mmap.h
linux-user: Split loader-related prototypes into loader.h
linux-user: Split signal-related prototypes into signal-common.h
linux-user: Split strace prototypes into strace.h
linux-user: Fix coding style nits in qemu.h

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

linux-user: Split linux-user internals out of qemu.h

qemu.h is included in various non-linux-user files (which
mostly want the TaskState struct and the functions for
doing usermode access to guest a

linux-user: Split linux-user internals out of qemu.h

qemu.h is included in various non-linux-user files (which
mostly want the TaskState struct and the functions for
doing usermode access to guest addresses like lock_user(),
unlock_user(), get_user*(), etc).

Split out the parts that are only used in linux-user itself
into a new user-internals.h. This leaves qemu.h with basically
three things:
* the definition of the TaskState struct
* the user-access functions and macros
* do_brk()
all of which are needed by code outside linux-user that
includes qemu.h.

The addition of all the extra #include lines was done with
sed -i '/include.*qemu\.h/a #include "user-internals.h"' $(git grep -l 'include.*qemu\.h' linux-user)
(and then undoing the change to fpa11.h).

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210908154405.15417-8-peter.maydell@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>

show more ...

linux-user: Split mmap prototypes into user-mmap.h

Split out the mmap prototypes into a new header user-mmap.h
which we only include where required.

Signed-off-by: Peter Maydell <peter.maydell@lina

linux-user: Split mmap prototypes into user-mmap.h

Split out the mmap prototypes into a new header user-mmap.h
which we only include where required.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210908154405.15417-6-peter.maydell@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>

show more ...

linux-user: Split loader-related prototypes into loader.h

Split guest-binary loader prototypes out into a new header
loader.h which we include only where required.

Signed-off-by: Peter Maydell <pet

linux-user: Split loader-related prototypes into loader.h

Split guest-binary loader prototypes out into a new header
loader.h which we include only where required.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210908154405.15417-5-peter.maydell@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>

show more ...

Merge remote-tracking branch 'remotes/vivier2/tags/linux-user-for-6.1-pull-request' into staging

linux-user pull request 20210806

Fix endianness and addresses in i386 linux-user target

# gpg: Sign

Merge remote-tracking branch 'remotes/vivier2/tags/linux-user-for-6.1-pull-request' into staging

linux-user pull request 20210806

Fix endianness and addresses in i386 linux-user target

# gpg: Signature made Fri 06 Aug 2021 10:16:32 BST
# gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C
# gpg: issuer "laurent@vivier.eu"
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
# gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full]
# gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full]
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C

* remotes/vivier2/tags/linux-user-for-6.1-pull-request:
linux-user/elfload: byteswap i386 registers when dumping core
linux-user: fix guest/host address mixup in i386 setup_rt_frame()

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

linux-user/elfload: byteswap i386 registers when dumping core

Core dumps from emulating x86_64 on big-endian hosts contain incorrect
register values.

Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.

linux-user/elfload: byteswap i386 registers when dumping core

Core dumps from emulating x86_64 on big-endian hosts contain incorrect
register values.

Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210803172013.148446-1-iii@linux.ibm.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>

show more ...

Merge remote-tracking branch 'remotes/vivier2/tags/linux-user-for-6.1-pull-request' into staging

linux-user pull request 20210708

Code and style cleanup
Add ppid in self/stat
ELF_HWCAP for RISC-V

Merge remote-tracking branch 'remotes/vivier2/tags/linux-user-for-6.1-pull-request' into staging

linux-user pull request 20210708

Code and style cleanup
Add ppid in self/stat
ELF_HWCAP for RISC-V

# gpg: Signature made Thu 08 Jul 2021 11:07:31 BST
# gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C
# gpg: issuer "laurent@vivier.eu"
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
# gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full]
# gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full]
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C

* remotes/vivier2/tags/linux-user-for-6.1-pull-request:
linux-user/syscall: Remove hardcoded tabs (code style)
linux-user/alpha: Remove hardcoded tabs (code style)
linux-user/mips: Handle TARGET_EWOULDBLOCK as TARGET_EAGAIN
linux-user/hppa: Handle TARGET_EWOULDBLOCK as TARGET_EAGAIN
linux-user/alpha: Handle TARGET_EWOULDBLOCK as TARGET_EAGAIN
linux-user: Fix style problems in linuxload.c
linux-user: fill ppid field in /proc/self/stat
linux-user/elfload: Implement ELF_HWCAP for RISC-V

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

linux-user/elfload: Implement ELF_HWCAP for RISC-V

Set I, M, A, F, D and C bit for hwcap if misa is set.

Signed-off-by: Kito Cheng <kito.cheng@sifive.com>
Reviewed-by: Richard Henderson <richard.he

linux-user/elfload: Implement ELF_HWCAP for RISC-V

Set I, M, A, F, D and C bit for hwcap if misa is set.

Signed-off-by: Kito Cheng <kito.cheng@sifive.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210706035015.122899-1-kito.cheng@sifive.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>

show more ...

Merge remote-tracking branch 'remotes/vivier2/tags/linux-user-for-6.1-pull-request' into staging

Linux-user pull request 20210621

# gpg: Signature made Mon 21 Jun 2021 12:03:53 BST
# gpg:

Merge remote-tracking branch 'remotes/vivier2/tags/linux-user-for-6.1-pull-request' into staging

Linux-user pull request 20210621

# gpg: Signature made Mon 21 Jun 2021 12:03:53 BST
# gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C
# gpg: issuer "laurent@vivier.eu"
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
# gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full]
# gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full]
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C

* remotes/vivier2/tags/linux-user-for-6.1-pull-request:
linux-user: Use public sigev_notify_thread_id member if available
linux-user: Fix incorrect use of feature-test-macros
linux-user: Check for ieee128 fpbits in PPC64 HWCAP2 feature list
tests/tcg/linux-test: Check that sigaction can query SIGKILL/SIGSTOP
linux-user: Let sigaction query SIGKILL/SIGSTOP
linux-user: Implement pivot_root
linux-user/trace-events: fix minor typo in format string
linux-user: Disable static assert involving __SIGRTMAX if it is missing
linux-user: Set CF_PARALLEL when mapping shared memory

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

Merge remote-tracking branch 'remotes/cohuck-gitlab/tags/s390x-20210621' into staging

s390x update:
- tcg: implement the vector enhancements facility and bump the
'qemu' cpu model to a stripped-do

Merge remote-tracking branch 'remotes/cohuck-gitlab/tags/s390x-20210621' into staging

s390x update:
- tcg: implement the vector enhancements facility and bump the
'qemu' cpu model to a stripped-down z14 GA2
- fix psw.mask handling in signals
- fix vfio-ccw sense data handling

# gpg: Signature made Mon 21 Jun 2021 10:53:00 BST
# gpg: using RSA key C3D0D66DC3624FF6A8C018CEDECF6B93C6F02FAF
# gpg: issuer "cohuck@redhat.com"
# gpg: Good signature from "Cornelia Huck <conny@cornelia-huck.de>" [unknown]
# gpg: aka "Cornelia Huck <huckc@linux.vnet.ibm.com>" [full]
# gpg: aka "Cornelia Huck <cornelia.huck@de.ibm.com>" [full]
# gpg: aka "Cornelia Huck <cohuck@kernel.org>" [unknown]
# gpg: aka "Cornelia Huck <cohuck@redhat.com>" [unknown]
# Primary key fingerprint: C3D0 D66D C362 4FF6 A8C0 18CE DECF 6B93 C6F0 2FAF

* remotes/cohuck-gitlab/tags/s390x-20210621: (37 commits)
s390x/css: Add passthrough IRB
s390x/css: Refactor IRB construction
s390x/css: Split out the IRB sense data
s390x/css: Introduce an ESW struct
linux-user/s390x: Save and restore psw.mask properly
target/s390x: Use s390_cpu_{set_psw, get_psw_mask} in gdbstub
target/s390x: Improve s390_cpu_dump_state vs cc_op
target/s390x: Do not modify cpu state in s390_cpu_get_psw_mask
target/s390x: Expose load_psw and get_psw_mask to cpu.h
configure: Check whether we can compile the s390-ccw bios with -msoft-float
s390x/cpumodel: Bump up QEMU model to a stripped-down IBM z14 GA2
s390x/tcg: We support Vector enhancements facility
linux-user: elf: s390x: Prepare for Vector enhancements facility
s390x/tcg: Implement VECTOR FP (MAXIMUM|MINIMUM)
s390x/tcg: Implement VECTOR FP NEGATIVE MULTIPLY AND (ADD|SUBTRACT)
s390x/tcg: Implement 32/128 bit for VECTOR FP MULTIPLY AND (ADD|SUBTRACT)
s390x/tcg: Implement 32/128 bit for VECTOR FP TEST DATA CLASS IMMEDIATE
s390x/tcg: Implement 32/128 bit for VECTOR FP PERFORM SIGN OPERATION
s390x/tcg: Implement 128 bit for VECTOR FP LOAD ROUNDED
s390x/tcg: Implement 64 bit for VECTOR FP LOAD LENGTHENED
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

linux-user: elf: s390x: Prepare for Vector enhancements facility

Let's check for S390_FEAT_VECTOR_ENH and set HWCAP_S390_VXRS_EXT
accordingly. Add all missing HWCAP defined in upstream Linux.

Cc: L

linux-user: elf: s390x: Prepare for Vector enhancements facility

Let's check for S390_FEAT_VECTOR_ENH and set HWCAP_S390_VXRS_EXT
accordingly. Add all missing HWCAP defined in upstream Linux.

Cc: Laurent Vivier <laurent@vivier.eu>
Acked-by: Laurent Vivier <laurent@vivier.eu>
Signed-off-by: David Hildenbrand <david@redhat.com>
Message-Id: <20210608092337.12221-25-david@redhat.com>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>

show more ...

linux-user: Check for ieee128 fpbits in PPC64 HWCAP2 feature list

glibc 2.34 is now checking for this in hwcaps at
runtime [1] and failing to run the binary if machine
does not support 128bit IEEE f

linux-user: Check for ieee128 fpbits in PPC64 HWCAP2 feature list

glibc 2.34 is now checking for this in hwcaps at
runtime [1] and failing to run the binary if machine
does not support 128bit IEEE fp

Fixes
Fatal glibc error: CPU lacks float128 support (POWER 9 or later required)

[1] https://sourceware.org/git/?p=glibc.git;a=commitdiff;h=d337345ce145e23c5f3a956f349d924fdf54ce2d;hp=eb24865637a271ab7dad13190330105eab0d478d

Signed-off-by: Khem Raj <raj.khem@gmail.com>
Cc: Florian Weimer <fweimer@redhat.com>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20210614191729.2981488-1-raj.khem@gmail.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>

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Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210603' into staging

target-arm queue:
* Some not-yet-enabled preliminaries for M-profile MVE support
* Consistently use "Cort

Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210603' into staging

target-arm queue:
* Some not-yet-enabled preliminaries for M-profile MVE support
* Consistently use "Cortex-Axx", not "Cortex Axx" in docs, comments
* docs: Fix installation of man pages with Sphinx 4.x
* Mark LDS{MIN,MAX} as signed operations
* Fix missing syndrome value for DAIF and PAC check exceptions
* Implement BFloat16 extensions
* Refactoring of hvf accelerator code in preparation for aarch64 support
* Fix some coverity nits in test code

# gpg: Signature made Thu 03 Jun 2021 16:58:02 BST
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20210603: (45 commits)
tests/unit/test-vmstate: Assert that dup() and mkstemp() succeed
tests/qtest/tpm-tests: Remove unnecessary NULL checks
tests/qtest/pflash-cfi02-test: Avoid potential integer overflow
tests/qtest/hd-geo-test: Fix checks on mkstemp() return value
tests/qtest/e1000e-test: Check qemu_recv() succeeded
tests/qtest/bios-tables-test: Check for dup2() failure
hvf: Simplify post reset/init/loadvm hooks
hvf: Introduce hvf vcpu struct
hvf: Remove hvf-accel-ops.h
hvf: Make synchronize functions static
hvf: Use cpu_synchronize_state()
hvf: Split out common code on vcpu init and destroy
hvf: Remove use of hv_uvaddr_t and hv_gpaddr_t
hvf: Make hvf_set_phys_mem() static
hvf: Move hvf internal definitions into common header
hvf: Move cpu functions into common directory
hvf: Move vcpu thread functions into common directory
hvf: Move assert_hvf_ok() into common directory
target/arm: Enable BFloat16 extensions
linux-user/aarch64: Enable hwcap bits for bfloat16
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

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linux-user/aarch64: Enable hwcap bits for bfloat16

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210525225817.400336-12-richard.henderson@linaro.org
Reviewed-by: Pete

linux-user/aarch64: Enable hwcap bits for bfloat16

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210525225817.400336-12-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

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Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210525' into staging

target-arm queue:
* Implement SVE2 emulation
* Implement integer matrix multiply accumulate
* Implement

Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210525' into staging

target-arm queue:
* Implement SVE2 emulation
* Implement integer matrix multiply accumulate
* Implement FEAT_TLBIOS
* Implement FEAT_TLBRANGE
* disas/libvixl: Protect C system header for C++ compiler
* Use correct SP in M-profile exception return
* AN524, AN547: Correct modelling of internal SRAMs
* hw/intc/arm_gicv3_cpuif: Fix EOIR write access check logic
* hw/arm/smmuv3: Another range invalidation fix

# gpg: Signature made Tue 25 May 2021 16:02:25 BST
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20210525: (114 commits)
target/arm: Enable SVE2 and related extensions
linux-user/aarch64: Enable hwcap bits for sve2 and related extensions
target/arm: Implement integer matrix multiply accumulate
target/arm: Implement aarch32 VSUDOT, VUSDOT
target/arm: Split decode of VSDOT and VUDOT
target/arm: Split out do_neon_ddda
target/arm: Fix decode for VDOT (indexed)
target/arm: Remove unused fpst from VDOT_scalar
target/arm: Split out do_neon_ddda_fpst
target/arm: Implement aarch64 SUDOT, USDOT
target/arm: Implement SVE2 fp multiply-add long
target/arm: Move endian adjustment macros to vec_internal.h
target/arm: Implement SVE2 bitwise shift immediate
target/arm: Implement 128-bit ZIP, UZP, TRN
target/arm: Implement SVE2 LD1RO
target/arm: Tidy do_ldrq
target/arm: Share table of sve load functions
target/arm: Implement SVE2 FLOGB
target/arm: Implement SVE2 FCVTXNT, FCVTX
target/arm: Implement SVE2 FCVTLT
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

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linux-user/aarch64: Enable hwcap bits for sve2 and related extensions

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id

linux-user/aarch64: Enable hwcap bits for sve2 and related extensions

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210525010358.152808-92-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

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Merge remote-tracking branch 'remotes/vivier2/tags/linux-user-for-6.1-pull-request' into staging

linux-user pull request 20210517

- alpha sigaction fixes/cleanups
- s390x sigaction fixes/cleanup
-

Merge remote-tracking branch 'remotes/vivier2/tags/linux-user-for-6.1-pull-request' into staging

linux-user pull request 20210517

- alpha sigaction fixes/cleanups
- s390x sigaction fixes/cleanup
- sparc sigaction fixes/cleanup
- s390x core dumping support
- core dump fix (app name)
- arm fpa11 fix and cleanup
- strace fixes (unshare(), llseek())
- fix copy_file_range()
- use GDateTime
- Remove dead code

# gpg: Signature made Tue 18 May 2021 06:31:12 BST
# gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C
# gpg: issuer "laurent@vivier.eu"
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
# gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full]
# gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full]
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C

* remotes/vivier2/tags/linux-user-for-6.1-pull-request: (59 commits)
linux-user/elfload: add s390x core dumping support
linux-user/elfload: fix filling psinfo->pr_psargs
linux-user: Tidy TARGET_NR_rt_sigaction
linux-user/alpha: Share code for TARGET_NR_sigaction
linux-user/alpha: Define TARGET_ARCH_HAS_KA_RESTORER
linux-user: Honor TARGET_ARCH_HAS_SA_RESTORER in do_syscall
linux-user: Pass ka_restorer to do_sigaction
linux-user/alpha: Rename the sigaction restorer field
linux-user/alpha: Fix rt sigframe return
linux-user: use GDateTime for formatting timestamp for core file
linux-user: Fix erroneous conversion in copy_file_range
linux-user: Add copy_file_range to strace.list
linux-user/s390x: Handle vector regs in signal stack
linux-user/s390x: Clean up signal.c
linux-user/s390x: Add build asserts for sigset sizes
linux-user/s390x: Fix frame_addr corruption in setup_frame
linux-user/s390x: Add stub sigframe argument for last_break
linux-user/s390x: Set psw.mask properly for the signal handler
linux-user/s390x: Clean up single-use gotos in signal.c
linux-user/s390x: Tidy save_sigregs
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

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linux-user/elfload: add s390x core dumping support

Provide the following definitions required by the common code:

* ELF_NREG: with the value of sizeof(s390_regs) / sizeof(long).
* target_elf_gregse

linux-user/elfload: add s390x core dumping support

Provide the following definitions required by the common code:

* ELF_NREG: with the value of sizeof(s390_regs) / sizeof(long).
* target_elf_gregset_t: define it like all the other arches do.
* elf_core_copy_regs(): similar to kernel's s390_regs_get().
* USE_ELF_CORE_DUMP.
* ELF_EXEC_PAGESIZE.

Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
Message-Id: <20210413205608.22587-1-iii@linux.ibm.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>

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