Revision tags: ppc-for-2.12-20180111, ppc-for-2.12-20180108, ppc-for-2.12-20180103, ppc-for-2.12-20171219, v2.10.2 |
|
#
371e94ba |
| 18-Dec-2017 |
Philippe Mathieu-Daudé <f4bug@amsat.org> |
hw/pci-host/xilinx: QOM'ify the AXI-PCIe host bridge
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@r
hw/pci-host/xilinx: QOM'ify the AXI-PCIe host bridge
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Marcel Apfelbaum <marcel@redhat.com>
show more ...
|
Revision tags: ppc-for-2.12-20171215, v2.11.0, v2.11.0-rc5, v2.11.0-rc4, ppc-for-2.11-20171205, ppc-for-2.11-20171204, v2.11.0-rc3 |
|
#
1115ff6d |
| 29-Nov-2017 |
David Gibson <david@gibson.dropbear.id.au> |
pci: Rename root bus initialization functions for clarity
pci_bus_init(), pci_bus_new_inplace(), pci_bus_new() and pci_register_bus() are misleadingly named. They're not used for initializing *any*
pci: Rename root bus initialization functions for clarity
pci_bus_init(), pci_bus_new_inplace(), pci_bus_new() and pci_register_bus() are misleadingly named. They're not used for initializing *any* PCI bus, but only for a root PCI bus.
Non-root buses - i.e. ones under a logical PCI to PCI bridge - are instead created with a direct qbus_create_inplace() (see pci_bridge_initfn()).
This patch renames the functions to make it clear they're only used for a root bus.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Marcel Apfelbaum <marcel@redhat.com> Reviewed-by: Peter Xu <peterx@redhat.com>
show more ...
|
Revision tags: ppc-for-2.11-20171127, ppc-for-2.11-20171122, v2.11.0-rc2, ppc-for-2.11-20171120, v2.11.0-rc1, ppc-for-2.11-20171114, ppc-for-2.11-20171108, v2.11.0-rc0, ppc-for-2.11-20171017 |
|
#
c5bbcaa4 |
| 16-Oct-2017 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging
pc, pci, virtio: fixes, features
A bunch of fixes all over the place. A new vmcore device - the user interface around it is
Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging
pc, pci, virtio: fixes, features
A bunch of fixes all over the place. A new vmcore device - the user interface around it is still somewhat controversial, but I feel most of the code is fine, suggestions can be addressed by adding patches on top.
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
# gpg: Signature made Sun 15 Oct 2017 04:02:23 BST # gpg: using RSA key 0x281F0DB8D28D5469 # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469
* remotes/mst/tags/for_upstream: (26 commits) tests/pxe: Test more NICs when running in SPEED=slow mode pc: remove useless hot_add_cpu initialisation isapc: Remove unnecessary migration compatibility code virtio-pci: Replace modern_as with direct access to modern_bar virtio: fix descriptor counting in virtqueue_pop hw/gen_pcie_root_port: make IO RO 0 on IO disabled pci: Validate interfaces on base_class_init xen/pt: Mark TYPE_XEN_PT_DEVICE as hybrid pci: Add INTERFACE_CONVENTIONAL_PCI_DEVICE to Conventional PCI devices pci: Add INTERFACE_PCIE_DEVICE to all PCIe devices pci: Add interface names to hybrid PCI devices pci: conventional-pci-device and pci-express-device interfaces PCI: PCIe access should always be little endian virtio/pci/migration: Convert to VMState hw/pci-bridge/pcie_pci_bridge: properly handle MSI unavailability case pci: allow 32-bit PCI IO accesses to pass through the PCI bridge virtio/vhost: reset dev->log after syncing MAINTAINERS: add Dump maintainers scripts/dump-guest-memory.py: add vmcoreinfo kdump: set vmcoreinfo location ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
show more ...
|
Revision tags: v2.10.1 |
|
#
71d78767 |
| 27-Sep-2017 |
Eduardo Habkost <ehabkost@redhat.com> |
pci: Add INTERFACE_PCIE_DEVICE to all PCIe devices
Change all devices that set is_express=1 to implement INTERFACE_PCIE_DEVICE.
Cc: Keith Busch <keith.busch@intel.com> Cc: Kevin Wolf <kwolf@redhat.
pci: Add INTERFACE_PCIE_DEVICE to all PCIe devices
Change all devices that set is_express=1 to implement INTERFACE_PCIE_DEVICE.
Cc: Keith Busch <keith.busch@intel.com> Cc: Kevin Wolf <kwolf@redhat.com> Cc: Max Reitz <mreitz@redhat.com> Cc: Dmitry Fleytman <dmitry@daynix.com> Cc: Jason Wang <jasowang@redhat.com> Cc: "Michael S. Tsirkin" <mst@redhat.com> Cc: Marcel Apfelbaum <marcel@redhat.com> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Hannes Reinecke <hare@suse.com> Cc: qemu-block@nongnu.org Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Marcel Apfelbaum <marcel@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
show more ...
|
Revision tags: ppc-for-2.11-20170927, ppc-for-2.11-20170915, ppc-for-2.11-20170908, v2.9.1, v2.10.0, v2.10.0-rc4, ppc-for-2.10-20170823, ppc-for-2.10-20170822, v2.10.0-rc3, ppc-for-2.10-20170809, v2.10.0-rc2, v2.10.0-rc1, ppc-for-2.10-20170731, v2.10.0-rc0, ppc-for-2.10-20170725, ppc-for-2.10-20170717, ppc-for-2.10-20170714, ppc-for-2.10-20170711 |
|
#
1cfe48c1 |
| 07-Jul-2017 |
Peter Maydell <peter.maydell@linaro.org> |
memory: Rename memory_region_init_ram() to memory_region_init_ram_nomigrate()
Rename memory_region_init_ram() to memory_region_init_ram_nomigrate(). This leaves the way clear for us to provide a mem
memory: Rename memory_region_init_ram() to memory_region_init_ram_nomigrate()
Rename memory_region_init_ram() to memory_region_init_ram_nomigrate(). This leaves the way clear for us to provide a memory_region_init_ram() which does handle migration.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-id: 1499438577-7674-4-git-send-email-peter.maydell@linaro.org
show more ...
|
Revision tags: ppc-for-2.10-20170630 |
|
#
84e3d072 |
| 22-Jun-2017 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2017-06-09-v2' into staging
QAPI patches for 2017-06-09
# gpg: Signature made Tue 20 Jun 2017 13:31:39 BST # gpg: using RS
Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2017-06-09-v2' into staging
QAPI patches for 2017-06-09
# gpg: Signature made Tue 20 Jun 2017 13:31:39 BST # gpg: using RSA key 0x3870B400EB918653 # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653
* remotes/armbru/tags/pull-qapi-2017-06-09-v2: (41 commits) tests/qdict: check more get_try_int() cases console: use get_uint() for "head" property i386/cpu: use get_uint() for "min-level"/"min-xlevel" properties numa: use get_uint() for "size" property pnv-core: use get_uint() for "core-pir" property pvpanic: use get_uint() for "ioport" property auxbus: use get_uint() for "addr" property arm: use get_uint() for "mp-affinity" property xen: use get_uint() for "max-ram-below-4g" property pc: use get_uint() for "hpet-intcap" property pc: use get_uint() for "apic-id" property pc: use get_uint() for "iobase" property acpi: use get_uint() for "pci-hole*" properties acpi: use get_uint() for various acpi properties acpi: use get_uint() for "acpi-pcihp-io*" properties platform-bus: use get_uint() for "addr" property bcm2835_fb: use {get, set}_uint() for "vcram-size" and "vcram-base" aspeed: use {set, get}_uint() for "ram-size" property pcihp: use get_uint() for "bsel" property pc-dimm: make "size" property uint64 ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
show more ...
|
Revision tags: ppc-for-2.10-20170609 |
|
#
446de8b6 |
| 07-Jun-2017 |
Marc-André Lureau <marcandre.lureau@redhat.com> |
qdev: Use appropriate getter/setters type
Based on the underlying type of the data accessed, use the appropriate getters/setters:
* AcpiPmInfo members s3_disabled, s4_disabled are bool, member s4_v
qdev: Use appropriate getter/setters type
Based on the underlying type of the data accessed, use the appropriate getters/setters:
* AcpiPmInfo members s3_disabled, s4_disabled are bool, member s4_val is an uint8_t
* Property ACPI_PCIHP_IO_PROP is defined with object_property_add_uint32_ptr()
* Property PCIE_HOST_MCFG_SIZE is implemented with visit_type_uint64()
* PCIDevice property "addr" is backed by PCIDevice member devfn, which is an int32_t
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20170607163635.17635-20-marcandre.lureau@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> [More verbose commit message] Signed-off-by: Markus Armbruster <armbru@redhat.com>
show more ...
|
Revision tags: ppc-for-2.10-20170606, ppc-for-2.10-20170525 |
|
#
897eee24 |
| 17-May-2017 |
Stefan Hajnoczi <stefanha@redhat.com> |
Merge remote-tracking branch 'ehabkost/tags/x86-and-machine-pull-request' into staging
x86 and machine queue, 2017-05-17
# gpg: Signature made Wed 17 May 2017 02:37:54 PM BST # gpg:
Merge remote-tracking branch 'ehabkost/tags/x86-and-machine-pull-request' into staging
x86 and machine queue, 2017-05-17
# gpg: Signature made Wed 17 May 2017 02:37:54 PM BST # gpg: using RSA key 0x2807936F984DC5A6 # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6
* ehabkost/tags/x86-and-machine-pull-request: (22 commits) tests: Add [+-]feature and feature=on|off test cases s390-pcibus: No need to set user_creatable=false explicitly xen-sysdev: Remove user_creatable flag virtio-mmio: Remove user_creatable flag sysbus-ohci: Remove user_creatable flag hpet: Remove user_creatable flag generic-sdhci: Remove user_creatable flag esp: Remove user_creatable flag fw_cfg: Remove user_creatable flag unimplemented-device: Remove user_creatable flag isabus-bridge: Remove user_creatable flag allwinner-ahci: Remove user_creatable flag sysbus-ahci: Remove user_creatable flag kvmvapic: Remove user_creatable flag ioapic: Remove user_creatable flag kvmclock: Remove user_creatable flag pflash_cfi01: Remove user_creatable flag fdc: Remove user_creatable flag from sysbus-fdc & SUNW,fdtwo iommu: Remove FIXME comment about user_creatable=true xen-backend: Remove FIXME comment about user_creatable flag ...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
show more ...
|
Revision tags: ppc-for-2.10-20170511, ppc-for-2.10-20170510 |
|
#
e90f2a8c |
| 03-May-2017 |
Eduardo Habkost <ehabkost@redhat.com> |
qdev: Replace cannot_instantiate_with_device_add_yet with !user_creatable
cannot_instantiate_with_device_add_yet was introduced by commit efec3dd631d94160288392721a5f9c39e50fb2bc to replace no_user.
qdev: Replace cannot_instantiate_with_device_add_yet with !user_creatable
cannot_instantiate_with_device_add_yet was introduced by commit efec3dd631d94160288392721a5f9c39e50fb2bc to replace no_user. It was supposed to be a temporary measure.
When it was introduced, we had 54 cannot_instantiate_with_device_add_yet=true lines in the code. Today (3 years later) this number has not shrunk: we now have 57 cannot_instantiate_with_device_add_yet=true lines. I think it is safe to say it is not a temporary measure, and we won't see the flag go away soon.
Instead of a long field name that misleads people to believe it is temporary, replace it a shorter and less misleading field: user_creatable.
Except for code comments, changes were generated using the following Coccinelle patch:
@@ expression DC; @@ ( -DC->cannot_instantiate_with_device_add_yet = false; +DC->user_creatable = true; | -DC->cannot_instantiate_with_device_add_yet = true; +DC->user_creatable = false; )
@@ typedef ObjectClass; expression dc; identifier class, data; @@ static void device_class_init(ObjectClass *class, void *data) { ... dc->hotpluggable = true; +dc->user_creatable = true; ... }
@@ @@ struct DeviceClass { ... -bool cannot_instantiate_with_device_add_yet; +bool user_creatable; ... }
@@ expression DC; @@ ( -!DC->cannot_instantiate_with_device_add_yet +DC->user_creatable | -DC->cannot_instantiate_with_device_add_yet +!DC->user_creatable )
Cc: Alistair Francis <alistair.francis@xilinx.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Marcel Apfelbaum <marcel@redhat.com> Cc: Markus Armbruster <armbru@redhat.com> Cc: Peter Maydell <peter.maydell@linaro.org> Cc: Thomas Huth <thuth@redhat.com> Acked-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Marcel Apfelbaum <marcel@redhat.com> Acked-by: Marcel Apfelbaum <marcel@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Message-Id: <20170503203604.31462-2-ehabkost@redhat.com> [ehabkost: kept "TODO remove once we're there" comment] Reviewed-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
show more ...
|
Revision tags: ppc-for-2.10-20170426, ppc-for-2.10-20170424, v2.8.1.1, v2.9.0, v2.9.0-rc5, v2.9.0-rc4, v2.9.0-rc3, ppc-for-2.9-20170403, v2.8.1, ppc-for-2.9-20170329, v2.9.0-rc2, ppc-for-2.9-20170323, v2.9.0-rc1, v2.9.0-rc0, ppc-for-2.9-20170314, ppc-for-2.9-20170306, submodule-update-20170303, ppc-for-2.9-20170303, ppc-for-2.9-20170301 |
|
#
10f25e48 |
| 23-Feb-2017 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/yongbok/tags/mips-20170222' into staging
MIPS patches 2017-02-22
Changes: * Add MIPS Boston board support
# gpg: Signature made Wed 22 Feb 2017 00:08:00 GMT #
Merge remote-tracking branch 'remotes/yongbok/tags/mips-20170222' into staging
MIPS patches 2017-02-22
Changes: * Add MIPS Boston board support
# gpg: Signature made Wed 22 Feb 2017 00:08:00 GMT # gpg: using RSA key 0x2238EB86D5F797C2 # gpg: Good signature from "Yongbok Kim <yongbok.kim@imgtec.com>" # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: 8600 4CF5 3415 A5D9 4CFA 2B5C 2238 EB86 D5F7 97C2
* remotes/yongbok/tags/mips-20170222: hw/mips: MIPS Boston board support hw: xilinx-pcie: Add support for Xilinx AXI PCIe Controller loader: Support Flattened Image Trees (FIT images) dtc: Update requirement to v1.4.2 target-mips: Provide function to test if a CPU supports an ISA hw/mips_gic: Update pin state on mask changes hw/mips_gictimer: provide API for retrieving frequency hw/mips_cmgcr: allow GCR base to be moved
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
show more ...
|
Revision tags: ppc-for-2.9-20170222, isa-cleanup-20170206, ppc-for-2.9-20170202, ppc-for-2.9-20170112, master-20170112, v2.7.1, v2.8.0, v2.8.0-rc4, v2.8.0-rc3, ppc-for-2.8-20161201, v2.8.0-rc2, ppc-for-2.8-20161123, v2.8.0-rc1, isa-cleanup-20161118, qemu-kvm-1.5.3-127.el7, v2.8.0-rc0, ppc-for-2.8-20161115, qemu-kvm-1.5.3-126.el7_3.1, qemu-kvm-0.12.1.2-2.496.el6, ppc-for-2.8-20161028, qemu-kvm-0.12.1.2-2.495.el6, ppc-for-2.8-20161026, ppc-for-2.8-20161017, qemu-kvm-rhev-2.3.0-31.el7_2.23, ppc-for-2.7-20161013, qemu-kvm-1.5.3-105.el7_2.10, ppc-for-2.8-20161006, qemu-kvm-1.5.3-105.el7_2.9, v2.6.2, RHELSA-7.3_qemu-kvm-rhev, qemu-kvm-rhev-2.6.0-28.el7, RHEL-7.3_qemu-kvm-rhev, qemu-kvm-rhev-2.6.0-27.el7, ppc-for-2.8-20160923, qemu-kvm-0.12.1.2-2.494.el6, ppc-for-2.8-20160922, RHEL-7.3_qemu-kvm, qemu-kvm-1.5.3-126.el7, qemu-kvm-rhev-2.6.0-26.el7, vfio-fixes-20160915.0, qemu-kvm-1.5.3-125.el7, qemu-kvm-rhev-2.3.0-31.el7_2.22, qemu-kvm-rhev-2.6.0-25.el7, qemu-kvm-1.5.3-124.el7, qemu-kvm-rhev-2.6.0-24.el7, qemu-kvm-1.5.3-123.el7 |
|
#
62be3934 |
| 08-Sep-2016 |
Paul Burton <paul.burton@imgtec.com> |
hw: xilinx-pcie: Add support for Xilinx AXI PCIe Controller
Add support for emulating the Xilinx AXI Root Port Bridge for PCI Express as described by Xilinx' PG055 document. This is a PCIe controlle
hw: xilinx-pcie: Add support for Xilinx AXI PCIe Controller
Add support for emulating the Xilinx AXI Root Port Bridge for PCI Express as described by Xilinx' PG055 document. This is a PCIe controller that can be used with certain series of Xilinx FPGAs, and is used on the MIPS Boston board which will make use of this code.
Signed-off-by: Paul Burton <paul.burton@imgtec.com> [yongbok.kim@imgtec.com: removed returning on !level, updated IRQ connection with GPIO logic, moved xilinx_pcie_init() to boston.c replaced stw_le_p() with pci_set_word() and other cosmetic changes] Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
show more ...
|