30a8a105 | 18-Apr-2023 |
Alison Schofield <alison.schofield@intel.com> |
tools/testing/cxl: Require CONFIG_DEBUG_FS
The cxl_mem driver uses debugfs to support poison inject and clear. Add debugfs to the list of required symbols so that cxl_test can emulate those poison o
tools/testing/cxl: Require CONFIG_DEBUG_FS
The cxl_mem driver uses debugfs to support poison inject and clear. Add debugfs to the list of required symbols so that cxl_test can emulate those poison operations.
Signed-off-by: Alison Schofield <alison.schofield@intel.com> Reviewed-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/4f3aab57fbf1cc3ccde2eb887c5d90566c8d0e90.1681874357.git.alison.schofield@intel.com Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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98980d76 | 18-Apr-2023 |
Alison Schofield <alison.schofield@intel.com> |
tools/testing/cxl: Add a sysfs attr to test poison inject limits
CXL devices may report a maximum number of addresses that a device allows to be poisoned using poison injection. When cxl_test create
tools/testing/cxl: Add a sysfs attr to test poison inject limits
CXL devices may report a maximum number of addresses that a device allows to be poisoned using poison injection. When cxl_test creates mock CXL memory devices, it defaults to MOCK_INJECT_DEV_MAX==88 for all mocked memdevs.
Add a sysfs attribute, poison_inject_max to module cxl_mock_mem so that users can set a custom device injection limit. Fail, and return -EBUSY, if the mock poison list is not empty.
/sys/bus/platform/drivers/cxl_mock_mem/poison_inject_max
A simple usage model is to set the attribute before running a test in order to emulate a device's poison handling.
Signed-off-by: Alison Schofield <alison.schofield@intel.com> Reviewed-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/0f25b2862b90013545450222d2199e435c6cc11a.1681874357.git.alison.schofield@intel.com Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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8eac7ea7 | 18-Apr-2023 |
Alison Schofield <alison.schofield@intel.com> |
tools/testing/cxl: Use injected poison for get poison list
Prior to poison inject support, the mock of 'Get Poison List' returned a poison list containing a single mocked error record.
Following th
tools/testing/cxl: Use injected poison for get poison list
Prior to poison inject support, the mock of 'Get Poison List' returned a poison list containing a single mocked error record.
Following the addition of poison inject and clear support to the mock driver, use the mock_poison_list[], rather than faking an error record. Mock_poison_list[] list tracks the actual poison inject and clear requests issued by userspace.
Signed-off-by: Alison Schofield <alison.schofield@intel.com> Reviewed-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/0f4242c81821f4982b02cb1009c22783ef66b2f1.1681874357.git.alison.schofield@intel.com Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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6ec4b6d2 | 18-Apr-2023 |
Alison Schofield <alison.schofield@intel.com> |
tools/testing/cxl: Mock the Clear Poison mailbox command
Mock the clear of poison by deleting the device:address entry from the mock_poison_list[]. Behave like a real CXL device and do not fail if t
tools/testing/cxl: Mock the Clear Poison mailbox command
Mock the clear of poison by deleting the device:address entry from the mock_poison_list[]. Behave like a real CXL device and do not fail if the address is not in the poison list, but offer a dev_dbg() message.
Signed-off-by: Alison Schofield <alison.schofield@intel.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/ecf19743c6572e60971bbd078f67d520cf5bca5d.1681874357.git.alison.schofield@intel.com Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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371c1610 | 18-Apr-2023 |
Alison Schofield <alison.schofield@intel.com> |
tools/testing/cxl: Mock the Inject Poison mailbox command
Mock the injection of poison by storing the device:address entries in mock_poison_list[]. Enforce a limit of 8 poison injections per memdev
tools/testing/cxl: Mock the Inject Poison mailbox command
Mock the injection of poison by storing the device:address entries in mock_poison_list[]. Enforce a limit of 8 poison injections per memdev device and 128 total entries for the cxl_test mock driver.
Introducing the mock_poison[] list here, makes it available for use in the mock of Clear Poison, and the mock of Get Poison List.
Signed-off-by: Alison Schofield <alison.schofield@intel.com> Reviewed-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/f6b7f03541eaa8c2260d3eafadd04afe3f0d7962.1681874357.git.alison.schofield@intel.com Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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b777e9be | 14-Feb-2023 |
Dave Jiang <dave.jiang@intel.com> |
cxl/hdm: Emulate HDM decoder from DVSEC range registers
In the case where HDM decoder register block exists but is not programmed and at the same time the DVSEC range register range is active, popul
cxl/hdm: Emulate HDM decoder from DVSEC range registers
In the case where HDM decoder register block exists but is not programmed and at the same time the DVSEC range register range is active, populate the CXL decoder object 'cxl_decoder' with info from DVSEC range registers.
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/167640368454.935665.13806415120298330717.stgit@dwillia2-xfh.jf.intel.com Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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3d8f7cca | 10-Feb-2023 |
Dan Williams <dan.j.williams@intel.com> |
tools/testing/cxl: Define a fixed volatile configuration to parse
Take two endpoints attached to the first switch on the first host-bridge in the cxl_test topology and define a pre-initialized regio
tools/testing/cxl: Define a fixed volatile configuration to parse
Take two endpoints attached to the first switch on the first host-bridge in the cxl_test topology and define a pre-initialized region. This is a x2 interleave underneath a x1 CXL Window.
$ modprobe cxl_test $ # cxl list -Ru { "region":"region3", "resource":"0xf010000000", "size":"512.00 MiB (536.87 MB)", "interleave_ways":2, "interleave_granularity":4096, "decode_state":"commit" }
Tested-by: Fan Ni <fan.ni@samsung.com> Reviewed-by: Vishal Verma <vishal.l.verma@intel.com> Reviewed-by: Dave Jiang <dave.jiang@intel.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Link: https://lore.kernel.org/r/167602000547.1924368.11613151863880268868.stgit@dwillia2-xfh.jf.intel.com Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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bab2a5e6 | 17-Jan-2023 |
Ira Weiny <ira.weiny@intel.com> |
cxl/test: Simulate event log overflow
Log overflow is marked by a separate trace message.
Simulate a log with lots of messages and flag overflow until space is cleared.
Reviewed-by: Dan Williams <
cxl/test: Simulate event log overflow
Log overflow is marked by a separate trace message.
Simulate a log with lots of messages and flag overflow until space is cleared.
Reviewed-by: Dan Williams <dan.j.williams@intel.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Ira Weiny <ira.weiny@intel.com> Link: https://lore.kernel.org/r/20221216-cxl-ev-log-v7-8-2316a5c8f7d8@intel.com Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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0092f62a | 17-Jan-2023 |
Ira Weiny <ira.weiny@intel.com> |
cxl/test: Add specific events
Each type of event has different trace point outputs.
Add mock General Media Event, DRAM event, and Memory Module Event records to the mock list of events returned.
R
cxl/test: Add specific events
Each type of event has different trace point outputs.
Add mock General Media Event, DRAM event, and Memory Module Event records to the mock list of events returned.
Reviewed-by: Dan Williams <dan.j.williams@intel.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Ira Weiny <ira.weiny@intel.com> Link: https://lore.kernel.org/r/20221216-cxl-ev-log-v7-7-2316a5c8f7d8@intel.com Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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66f3cb79 | 26-Jan-2023 |
Alison Schofield <alison.schofield@intel.com> |
tools/testing/cxl: Remove cxl_test module math loading message
Commit "tools/testing/cxl: Add XOR Math support to cxl_test" added a module parameter to cxl_test for the interleave_arithmetic option.
tools/testing/cxl: Remove cxl_test module math loading message
Commit "tools/testing/cxl: Add XOR Math support to cxl_test" added a module parameter to cxl_test for the interleave_arithmetic option.
In doing so, it also added this dev_dbg() message describing which option cxl_test used during load: "[ 111.743246] (NULL device *): cxl_test loading modulo math option" That "(NULL device *)" has raised needless user concern.
Remove the dev_dbg() message and make the module_param readable via sysfs for users that need to know which math option is active.
Suggested-by: Dan Williams <dan.j.williams@intel.com> Reviewed-by: Vishal Verma <vishal.l.verma@intel.com> Link: https://lore.kernel.org/r/20230126170555.701240-1-alison.schofield@intel.com Signed-off-by: Alison Schofield <alison.schofield@intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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f45d63c1 | 19-Dec-2022 |
Luis Chamberlain <mcgrof@kernel.org> |
tools/testing/cxl: require 64-bit
size_t is limited to 32-bits and so the gen_pool_alloc() using the size of SZ_64G would map to 0, triggering a low allocation which is not expected. Force the depen
tools/testing/cxl: require 64-bit
size_t is limited to 32-bits and so the gen_pool_alloc() using the size of SZ_64G would map to 0, triggering a low allocation which is not expected. Force the dependency on 64-bit for cxl_test as that is what it was designed for.
This issue was found by build test reports when converting this driver as a proper upstream driver.
Signed-off-by: Luis Chamberlain <mcgrof@kernel.org> Link: https://lore.kernel.org/r/20221219195050.325959-1-mcgrof@kernel.org Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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8c149eb0 | 13-Dec-2022 |
Dan Williams <dan.j.williams@intel.com> |
tools/testing/cxl: Prevent cxl_test from confusing production modules
The cxl_test machinery builds modified versions of the modules in drivers/cxl/ and intercepts some of their calls to allow cxl_t
tools/testing/cxl: Prevent cxl_test from confusing production modules
The cxl_test machinery builds modified versions of the modules in drivers/cxl/ and intercepts some of their calls to allow cxl_test to inject mock CXL topologies for test.
However, if cxl_test attempts the same with production modules, fireworks ensue as Luis discovered [1]. Prevent that scenario by arranging for cxl_test to check for a "watermark" symbol in each of the modules it expects to be modified before the test can run. This turns undefined runtime behavior or crashes into a safer failure to load the cxl_test module.
Link: http://lore.kernel.org/r/20221209062919.1096779-1-mcgrof@kernel.org [1] Reported-by: Luis Chamberlain <mcgrof@kernel.org> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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878b2de6 | 05-Dec-2022 |
Dan Williams <dan.j.williams@intel.com> |
tools/testing/cxl: Require cache invalidation bypass
The typical environment where cxl_test is run, QEMU, does not support cpu_cache_invalidate_memregion(). Add the 'test' bypass symbols to the conf
tools/testing/cxl: Require cache invalidation bypass
The typical environment where cxl_test is run, QEMU, does not support cpu_cache_invalidate_memregion(). Add the 'test' bypass symbols to the configuration check.
Reported-by: Alison Schofield <alison.schofield@intel.com> Reviewed-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/167026948179.3527561.4535373655515827457.stgit@dwillia2-xfh.jf.intel.com Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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