Merge tag 'meson-clk-headers-5.2' of git://github.com/BayLibre/clk-meson into v5.2/dt64

- Adds VPU and Video Decoder clocks IDs on Meson8b
- Finally remove the wrong ABP Meson8b clock id
- Adds Vide

Merge tag 'meson-clk-headers-5.2' of git://github.com/BayLibre/clk-meson into v5.2/dt64

- Adds VPU and Video Decoder clocks IDs on Meson8b
- Finally remove the wrong ABP Meson8b clock id
- Adds Video Decoder, PCIe PLL & CPU Clock IDs on G12A
- Re-expose SAR_ADC_SEL and CTS_OSCIN on G12A AO clock controller
- Unexpose some AXG-Audio input clocks IDs

* tag 'meson-clk-headers-5.2' of git://github.com/BayLibre/clk-meson:
dt-bindings: clock: meson8b: export the video decoder clocks
dt-bindings: clock: meson8b: export the VPU clock
dt-bindings: clock: g12a-aoclk: expose CLKID_AO_CTS_OSCIN
dt-bindings: clock: meson8b: drop the "ABP" clock definition
dt-bindings: clk: g12a-clkc: add VDEC clock IDs
dt-bindings: clock: axg-audio: unexpose controller inputs
dt-bindings: clk: g12a-clkc: add PCIE PLL clock ID
clk: g12a-aoclk: re-export CLKID_AO_SAR_ADC_SEL clock id
clk: meson-g12a: add cpu clock bindings

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Merge tag 'meson-clk-5.2' of https://github.com/BayLibre/clk-meson into clk-meson

Pull Amlogic Meson clk driver updates from Neil Armstrong:

- Adds VPU and Video Decoder clocks on Meson8b
- Final

Merge tag 'meson-clk-5.2' of https://github.com/BayLibre/clk-meson into clk-meson

Pull Amlogic Meson clk driver updates from Neil Armstrong:

- Adds VPU and Video Decoder clocks on Meson8b
- Finally remove the wrong ABP Meson8b clock id
- Adds Video Decoder, PCIe PLL & CPU Clocks on G12A
- Re-expose SAR_ADC_SEL and CTS_OSCIN on G12A AO clock controller
- Un-expose some AXG-Audio input clocks IDs

* tag 'meson-clk-5.2' of https://github.com/BayLibre/clk-meson:
clk: meson: meson8b: add the video decoder clock trees
clk: meson: meson8b: add the VPU clock trees
clk: meson: meson8b: add support for the GP_PLL clock on Meson8m2
clk: meson: meson8b: use a separate clock table for Meson8m2
clk: meson-g12a: add video decoder clocks
clk: meson-g12a: add PCIE PLL clocks
clk: meson-pll: add reduced specific clk_ops for G12A PCIe PLL
clk: meson: g12a: add cpu clocks
dt-bindings: clock: meson8b: export the video decoder clocks
dt-bindings: clock: meson8b: export the VPU clock
dt-bindings: clock: g12a-aoclk: expose CLKID_AO_CTS_OSCIN
dt-bindings: clock: meson8b: drop the "ABP" clock definition
dt-bindings: clk: g12a-clkc: add VDEC clock IDs
dt-bindings: clock: axg-audio: unexpose controller inputs
dt-bindings: clk: g12a-clkc: add PCIE PLL clock ID
clk: g12a-aoclk: re-export CLKID_AO_SAR_ADC_SEL clock id
clk: meson-g12a: add cpu clock bindings

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Merge drm/drm-next into drm-misc-next

Finally have a reason for a backmerge other than "it's been a while"!

Backmerging drm-next to -misc-next to facilitate Rob Herring's work on
Panfrost.

Signed-

Merge drm/drm-next into drm-misc-next

Finally have a reason for a backmerge other than "it's been a while"!

Backmerging drm-next to -misc-next to facilitate Rob Herring's work on
Panfrost.

Signed-off-by: Sean Paul <seanpaul@chromium.org>

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Merge tag 'v5.1-rc3' of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux into fbdev-for-next

Linux 5.1-rc3

Sync with upstream (which now contains fbdev-v5.1 changes) to
prepare a base

Merge tag 'v5.1-rc3' of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux into fbdev-for-next

Linux 5.1-rc3

Sync with upstream (which now contains fbdev-v5.1 changes) to
prepare a base for fbdev-v5.2 changes.

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dt-bindings: clock: g12a-aoclk: expose CLKID_AO_CTS_OSCIN

When submitted v2 of the G12A AO-CLK IDs, the CLKID_AO_CTS_OSCIN was moved
to the internal non-exported bindings, but this clock is necessar

dt-bindings: clock: g12a-aoclk: expose CLKID_AO_CTS_OSCIN

When submitted v2 of the G12A AO-CLK IDs, the CLKID_AO_CTS_OSCIN was moved
to the internal non-exported bindings, but this clock is necessary for
the second AO-CEC-B module since it embeds the 32768Hz dual-divider
clock generator unlike the AO-CEC-A module.

Export it back to the public bindings.

Fixes: be3d960b0aeb ("dt-bindings: clk: add G12A AO Clock and Reset Bindings")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lkml.kernel.org/r/20190321092010.14382-1-narmstrong@baylibre.com

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Merge drm/drm-next into drm-intel-next-queued

This is needed to get the fourcc code merged without conflicts.

Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>

Merge tag 'v5.1-rc2' into next-general

Merge to Linux 5.1-rc2 for subsystems to work with.

clk: g12a-aoclk: re-export CLKID_AO_SAR_ADC_SEL clock id

When submitted v2 of the G12A AO-CLK IDs, the SAR_ADC_SEL ID was moved
to the internal non-exported bindings, but this clock is necessary and

clk: g12a-aoclk: re-export CLKID_AO_SAR_ADC_SEL clock id

When submitted v2 of the G12A AO-CLK IDs, the SAR_ADC_SEL ID was moved
to the internal non-exported bindings, but this clock is necessary and
mandatory for the SAR ADC bindings.

Export it back to the public bindings.

Fixes: be3d960b0aeb ("dt-bindings: clk: add G12A AO Clock and Reset Bindings")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lkml.kernel.org/r/20190304105358.4987-1-narmstrong@baylibre.com

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Merge tag 'v5.1-rc1' into spi-5.2

Linux 5.1-rc1

Merge tag 'v5.1-rc1' into regulator-5.2

Linux 5.1-rc1

Merge tag 'v5.1-rc1' into asoc-5.2

Linux 5.1-rc1

Merge tag 'v5.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux into mlx5-next

Linux 5.1-rc1

We forgot to reset the branch last merge window thus mlx5-next is outdated
and stil

Merge tag 'v5.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux into mlx5-next

Linux 5.1-rc1

We forgot to reset the branch last merge window thus mlx5-next is outdated
and still based on 5.0-rc2. This merge commit is needed to sync mlx5-next
branch with 5.1-rc1.

Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>

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Merge tag 'asoc-fix-v5.1-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus

ASoC: Fixes for v5.1

A few core fixes along with the driver specific ones, mainly fixing

Merge tag 'asoc-fix-v5.1-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus

ASoC: Fixes for v5.1

A few core fixes along with the driver specific ones, mainly fixing
small issues that only affect x86 platforms for various reasons (their
unusual machine enumeration mechanisms mainly, plus a fix for error
handling in topology).

There's some of the driver fixes that look larger than they are, like
the hdmi-codec changes which resulted in an indentation change, and most
of the other large changes are for new drivers like the STM32 changes.

show more ...

Merge remote-tracking branch 'net/master'

Merge tag 'v5.1-rc1' into asoc-5.1

Linux 5.1-rc1

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk subsystem updates from Stephen Boyd:
"We have a fairly balanced mix of clk driver updates and clk frame

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk subsystem updates from Stephen Boyd:
"We have a fairly balanced mix of clk driver updates and clk framework
updates this time around. It's the usual pile of new drivers for new
hardware out there and the normal small fixes and updates, but then we
have some core framework changes too.

In the core framework, we introduce support for a clk_get_optional()
API to get clks that may not always be populated and a way to devm
manage clkdev lookups registered by provider drivers. We also do some
refactoring to simplify the interface between clkdev and the common
clk framework so we can reuse the DT parsing and clk_get() path in
provider drivers in the future. This work will continue in the next
few cycles while we convert how providers specify clk parents.

On the driver side, the biggest part of the dirstat is the Amlogic clk
driver that got support for the G12A SoC. It dominates with almost
half the overall diff, while the second largest part of the diff is in
the i.MX clk driver that gained support for imx8mm SoCs. After that,
we have the Actions Semiconductor and Qualcomm drivers rounding out
the big part of the dirstat because they both got new hardware support
for SoCs. The rest is just various updates and non-critical fixes for
existing drivers.

Core:
- Convert a few clk bindings to JSON schema format
- Add a {devm_}clk_get_optional() API
- Add devm_clk_hw_register_clkdev() API to manage clkdev lookups
- Start rewriting clk parent registration and supporting device links
by moving around code that supports clk_get() and DT parsing of the
'clocks' property

New Drivers:
- Add Qualcomm MSM8998 RPM managed clks
- IPA clk support on Qualcomm RPMh clk controllers
- Actions Semi S500 SoC clk support
- Support for fixed rate clks populated from an MMIO register
- Add RPC (QSPI/HyperFLASH) clocks on Renesas R-Car V3H
- Add TMU (timer) clocks on Renesas RZ/G2E
- Add Amlogic G12A Always-On Clock Controller
- Add 32k clock generation for Amlogic AXG
- Add support for the Mali GPU clocks on Amlogic Meson8
- Add Amlogic G12A EE clock controller driver
- Add missing CANFD clocks on Renesas RZ/G2M and RZ/G2E
- Add i.MX8MM SoC clk driver support

Removed Drivers:
- Remove clps711x driver as the board support is gone

Updates:
- 3rd ECO fix for Mediatek MT2712 SoCs
- Updates for Qualcomm MSM8998 GCC clks
- Random static analysis fixes for clk drivers
- Support for sleeping gpios in the clk-gpio type
- Minor fixes for STM32MP1 clk driver (parents, critical flag, etc.)
- Split LCDC into two clks on the Marvell MMP2 SoC
- Various DT of_node refcount fixes
- Get rid of CLK_IS_BASIC from TI code (yay!)
- TI Autoidle clk support
- Fix Amlogic Meson8 APB clock ID name
- Claim input clocks through DT for Amlogic AXG and GXBB
- Correct the DU (display unit) parent clock on Renesas RZ/G2E
- Exynos5433 IMEM CMU crypto clk support (SlimSS)
- Fix for the PLL-MIPI on the Allwinner A23
- Fix Rockchip rk3328 PLL rate calculation
- Add SET_RATE_PARENT flag on display clk of Rockhip rk3066
- i.MX SCU clk driver clk_set_parent() and cpufreq support"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (150 commits)
dt-bindings: clock: imx8mq: Fix numbering overlaps and gaps
clk: ti: clkctrl: Fix clkdm_name regression for TI_CLK_CLKCTRL_COMPAT
clk: fixup default index for of_clk_get_by_name()
clk: Move of_clk_*() APIs into clk.c from clkdev.c
clk: Inform the core about consumer devices
clk: Introduce of_clk_get_hw_from_clkspec()
clk: core: clarify the check for runtime PM
clk: Combine __clk_get() and __clk_create_clk()
clk: imx8mq: add GPIO clocks to clock tree
clk: mediatek: correct cpu clock name for MT8173 SoC
clk: imx: Refactor entire sccg pll clk
clk: imx: scu: add cpu frequency scaling support
clk: mediatek: Mark bus and DRAM related clocks as critical
clk: mediatek: Add flags to mtk_gate
clk: mediatek: Add MUX_FLAGS macro
clk: qcom: gcc-sdm845: Define parent of PCIe PIPE clocks
clk: ingenic: Remove set but not used variable 'enable'
clk: at91: programmable: remove unneeded register read
clk: mediatek: using CLK_MUX_ROUND_CLOSEST for the clock of dpi1_sel
clk: mediatek: add MUX_GATE_FLAGS_2
...

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Merge branches 'clk-optional', 'clk-devm-clkdev-register', 'clk-allwinner', 'clk-meson' and 'clk-renesas' into clk-next

- Add a {devm_}clk_get_optional() API
- Add devm_clk_hw_register_clkdev() AP

Merge branches 'clk-optional', 'clk-devm-clkdev-register', 'clk-allwinner', 'clk-meson' and 'clk-renesas' into clk-next

- Add a {devm_}clk_get_optional() API
- Add devm_clk_hw_register_clkdev() API to manage clkdev lookups

* clk-optional:
clk: Add (devm_)clk_get_optional() functions
clk: Add comment about __of_clk_get_by_name() error values

* clk-devm-clkdev-register:
clk: clk-st: avoid clkdev lookup leak at remove
clk: clk-max77686: Clean clkdev lookup leak and use devm
clkdev: add managed clkdev lookup registration

* clk-allwinner:
clk: sunxi-ng: sun8i-a23: Enable PLL-MIPI LDOs when ungating it

* clk-meson: (22 commits)
clk: meson: meson8b: fix the naming of the APB clocks
dt-bindings: clock: meson8b: add APB clock definition
clk: meson: Add G12A AO Clock + Reset Controller
dt-bindings: clk: add G12A AO Clock and Reset Bindings
clk: meson: factorise meson64 peripheral clock controller drivers
clk: meson: g12a: add peripheral clock controller
dt-bindings: clk: meson: add g12a periph clock controller bindings
clk: meson: pll: update driver for the g12a
clk: meson: rework and clean drivers dependencies
clk: meson: axg-audio does not require syscon
clk: meson: use CONFIG_ARCH_MESON to enter meson clk directory
clk: export some clk_hw function symbols for module drivers
clk: meson: ao-clkc: claim clock controller input clocks from DT
clk: meson: axg: claim clock controller input clock from DT
clk: meson: gxbb: claim clock controller input clock from DT
clk: meson: meson8b: add the GPU clock tree
clk: meson: meson8b: use a separate clock table for Meson8
clk: meson: axg-ao: add 32k generation subtree
clk: meson: gxbb-ao: replace cec-32k with the dual divider
clk: meson: add dual divider clock driver
...

* clk-renesas:
clk: renesas: r8a774a1: Fix LAST_DT_CORE_CLK
clk: renesas: r8a774c0: Fix LAST_DT_CORE_CLK
clk: renesas: r8a774c0: Add TMU clock
clk: renesas: r8a77980: Add RPC clocks
clk: renesas: rcar-gen3: Add RPC clocks
clk: renesas: rcar-gen3: Add spinlock
clk: renesas: rcar-gen3: Factor out cpg_reg_modify()
clk: renesas: r8a774c0: Correct parent clock of DU
clk: renesas: r8a774a1: Add missing CANFD clock
clk: renesas: r8a774c0: Add missing CANFD clock

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Merge tag 'meson-clk-5.1-2' of https://github.com/BayLibre/clk-meson into clk-meson

Pull another set of Amlogic clk drivers updates from Neil Armstrong:
- Add G12A Always-On Clock Controller
- Fix

Merge tag 'meson-clk-5.1-2' of https://github.com/BayLibre/clk-meson into clk-meson

Pull another set of Amlogic clk drivers updates from Neil Armstrong:
- Add G12A Always-On Clock Controller
- Fix Meson8 APB clock ID name

* tag 'meson-clk-5.1-2' of https://github.com/BayLibre/clk-meson:
clk: meson: meson8b: fix the naming of the APB clocks
dt-bindings: clock: meson8b: add APB clock definition
clk: meson: Add G12A AO Clock + Reset Controller
dt-bindings: clk: add G12A AO Clock and Reset Bindings

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dt-bindings: clk: add G12A AO Clock and Reset Bindings

Add bindings for the Amlogic G12A AO Clock and Reset controllers.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Jerome Bru

dt-bindings: clk: add G12A AO Clock and Reset Bindings

Add bindings for the Amlogic G12A AO Clock and Reset controllers.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lkml.kernel.org/r/20190212162859.20743-2-narmstrong@baylibre.com

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