Merge tag 'phy-for-6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy

Pull phy updates from Vinod Koul:
"This tme we have again a big pile of qcom-qmp-* changes, one new
driver a

Merge tag 'phy-for-6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy

Pull phy updates from Vinod Koul:
"This tme we have again a big pile of qcom-qmp-* changes, one new
driver and bunch of new hardware support.

New hardware support:

- Allwinner H616 USB PHY and A100 DPHY support

- TI J721s2, J784s4 and J721e support

- Freescale i.MX8MP PCIe PHY support

- New driver for Renesas Ethernet SERDES supporting R-Car S4-8

- Qualcomm SM8450 PCIe1 PHY support in EP mode

- Qualcomm SC8280XP PCIe PHY support (including x4 mode)

- Fixed Qualcomm SC8280XP USB4-USB3-DP PHY DT bindings

Updates:

- A big pile of updates on qcom-qmp-* drivers following the driver
split and reorganization merged earlier

- Phy order of API calls documentation update"

* tag 'phy-for-6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (174 commits)
phy: ti: phy-j721e-wiz: add j721s2-wiz-10g module support
dt-bindings: phy-j721e-wiz: add j721s2 compatible string
phy: use devm_platform_get_and_ioremap_resource()
phy: allwinner: phy-sun6i-mipi-dphy: Add the A100 DPHY variant
phy: allwinner: phy-sun6i-mipi-dphy: Add a variant power-on hook
phy: allwinner: phy-sun6i-mipi-dphy: Set the enable bit last
phy: allwinner: phy-sun6i-mipi-dphy: Make RX support optional
dt-bindings: sun6i-a31-mipi-dphy: Add the A100 DPHY variant
dt-bindings: sun6i-a31-mipi-dphy: Add the interrupts property
phy: qcom-qmp-pcie: drop redundant clock allocation
phy: qcom-qmp-usb: drop redundant clock allocation
phy: qcom-qmp: drop unused type header
phy: qcom-qmp-usb: drop sc8280xp reference-clock source
dt-bindings: phy: qcom,sc8280xp-qmp-usb3-uni: drop reference-clock source
phy: qcom-qmp-combo: add support for updated sc8280xp binding
phy: qcom-qmp-combo: rename DP_PHY register pointer
phy: qcom-qmp-combo: rename common-register pointers
phy: qcom-qmp-combo: clean up DP clock callbacks
phy: qcom-qmp-combo: separate clock and provider registration
phy: qcom-qmp-combo: add clock registration helper
...

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phy: qcom-qmp-pcie: Fix sm8450_qmp_gen4x2_pcie_pcs_tbl[] register names

sm8450_qmp_gen4x2_pcie_pcs_tbl[] contains the init sequence for PCS
registers of QMP PHY v5.20. So use the v5.20 specific regi

phy: qcom-qmp-pcie: Fix sm8450_qmp_gen4x2_pcie_pcs_tbl[] register names

sm8450_qmp_gen4x2_pcie_pcs_tbl[] contains the init sequence for PCS
registers of QMP PHY v5.20. So use the v5.20 specific register names.
Only major change is the rename of PCS_EQ_CONFIG{2/3} registers to
PCS_EQ_CONFIG{4/5}.

Fixes: 2c91bf6bf290 ("phy: qcom-qmp: Add SM8450 PCIe1 PHY support")
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20221102081835.41892-2-manivannan.sadhasivam@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>

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