Merge drm/drm-next into drm-misc-next

Backmerging required to pull topic/phy-compliance.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>

Merge drm/drm-next into drm-intel-next-queued

Backmerging in order to pull "topic/phy-compliance".

Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>

Merge v5.7-rc1 into drm-misc-fixes

Start the new drm-misc-fixes cycle.

Signed-off-by: Maxime Ripard <maxime@cerno.tech>

Merge tag 'v5.7-rc1' into locking/kcsan, to resolve conflicts and refresh

Resolve these conflicts:

arch/x86/Kconfig
arch/x86/kernel/Makefile

Do a minor "evil merge" to move the KCSAN entry up a

Merge tag 'v5.7-rc1' into locking/kcsan, to resolve conflicts and refresh

Resolve these conflicts:

arch/x86/Kconfig
arch/x86/kernel/Makefile

Do a minor "evil merge" to move the KCSAN entry up a bit by a few lines
in the Kconfig to reduce the probability of future conflicts.

Signed-off-by: Ingo Molnar <mingo@kernel.org>

show more ...

Merge tag 'pci-v5.7-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci

Pull pci updates from Bjorn Helgaas:
"Enumeration:

- Revert sysfs "rescan" renames that broke apps (Kel

Merge tag 'pci-v5.7-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci

Pull pci updates from Bjorn Helgaas:
"Enumeration:

- Revert sysfs "rescan" renames that broke apps (Kelsey Skunberg)

- Add more 32 GT/s link speed decoding and improve the implementation
(Yicong Yang)

Resource management:

- Add support for sizing programmable host bridge apertures and fix a
related alpha Nautilus regression (Ivan Kokshaysky)

Interrupts:

- Add boot interrupt quirk mechanism for Xeon chipsets and document
boot interrupts (Sean V Kelley)

PCIe native device hotplug:

- When possible, disable in-band presence detect and use PDS
(Alexandru Gagniuc)

- Add DMI table for devices that don't use in-band presence detection
but don't advertise that correctly (Stuart Hayes)

- Fix hang when powering slots up/down via sysfs (Lukas Wunner)

- Fix an MSI interrupt race (Stuart Hayes)

Virtualization:

- Add ACS quirks for Zhaoxin devices (Raymond Pang)

Error handling:

- Add Error Disconnect Recover (EDR) support so firmware can report
devices disconnected via DPC and we can try to recover (Kuppuswamy
Sathyanarayanan)

Peer-to-peer DMA:

- Add Intel Sky Lake-E Root Ports B, C, D to the whitelist (Andrew
Maier)

ASPM:

- Reduce severity of common clock config message (Chris Packham)

- Clear the correct bits when enabling L1 substates, so we don't go
to the wrong state (Yicong Yang)

Endpoint framework:

- Replace EPF linkup ops with notifier call chain and improve locking
(Kishon Vijay Abraham I)

- Fix concurrent memory allocation in OB address region (Kishon Vijay
Abraham I)

- Move PF function number assignment to EPC core to support multiple
function creation methods (Kishon Vijay Abraham I)

- Fix issue with clearing configfs "start" entry (Kunihiko Hayashi)

- Fix issue with endpoint MSI-X ignoring BAR Indicator and Table
Offset (Kishon Vijay Abraham I)

- Add support for testing DMA transfers (Kishon Vijay Abraham I)

- Add support for testing > 10 endpoint devices (Kishon Vijay Abraham I)

- Add support for tests to clear IRQ (Kishon Vijay Abraham I)

- Add common DT schema for endpoint controllers (Kishon Vijay Abraham I)

Amlogic Meson PCIe controller driver:

- Add DT bindings for AXG PCIe PHY, shared MIPI/PCIe analog PHY (Remi
Pommarel)

- Add Amlogic AXG PCIe PHY, AXG MIPI/PCIe analog PHY drivers (Remi
Pommarel)

Cadence PCIe controller driver:

- Add Root Complex/Endpoint DT schema for Cadence PCIe (Kishon Vijay
Abraham I)

Intel VMD host bridge driver:

- Add two VMD Device IDs that require bus restriction mode (Sushma
Kalakota)

Mobiveil PCIe controller driver:

- Refactor and modularize mobiveil driver (Hou Zhiqiang)

- Add support for Mobiveil GPEX Gen4 host (Hou Zhiqiang)

Microsoft Hyper-V host bridge driver:

- Add support for Hyper-V PCI protocol version 1.3 and
PCI_BUS_RELATIONS2 (Long Li)

- Refactor to prepare for virtual PCI on non-x86 architectures (Boqun
Feng)

- Fix memory leak in hv_pci_probe()'s error path (Dexuan Cui)

NVIDIA Tegra PCIe controller driver:

- Use pci_parse_request_of_pci_ranges() (Rob Herring)

- Add support for endpoint mode and related DT updates (Vidya Sagar)

- Reduce -EPROBE_DEFER error message log level (Thierry Reding)

Qualcomm PCIe controller driver:

- Restrict class fixup to specific Qualcomm devices (Bjorn Andersson)

Synopsys DesignWare PCIe controller driver:

- Refactor core initialization code for endpoint mode (Vidya Sagar)

- Fix endpoint MSI-X to use correct table address (Kishon Vijay
Abraham I)

TI DRA7xx PCIe controller driver:

- Fix MSI IRQ handling (Vignesh Raghavendra)

TI Keystone PCIe controller driver:

- Allow AM654 endpoint to raise MSI-X interrupt (Kishon Vijay Abraham I)

Miscellaneous:

- Quirk ASMedia XHCI USB to avoid "PME# from D0" defect (Kai-Heng
Feng)

- Use ioremap(), not phys_to_virt(), for platform ROM to fix video
ROM mapping with CONFIG_HIGHMEM (Mikel Rychliski)"

* tag 'pci-v5.7-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (96 commits)
misc: pci_endpoint_test: remove duplicate macro PCI_ENDPOINT_TEST_STATUS
PCI: tegra: Print -EPROBE_DEFER error message at debug level
misc: pci_endpoint_test: Use full pci-endpoint-test name in request_irq()
misc: pci_endpoint_test: Fix to support > 10 pci-endpoint-test devices
tools: PCI: Add 'e' to clear IRQ
misc: pci_endpoint_test: Add ioctl to clear IRQ
misc: pci_endpoint_test: Avoid using module parameter to determine irqtype
PCI: keystone: Allow AM654 PCIe Endpoint to raise MSI-X interrupt
PCI: dwc: Fix dw_pcie_ep_raise_msix_irq() to get correct MSI-X table address
PCI: endpoint: Fix ->set_msix() to take BIR and offset as arguments
misc: pci_endpoint_test: Add support to get DMA option from userspace
tools: PCI: Add 'd' command line option to support DMA
misc: pci_endpoint_test: Use streaming DMA APIs for buffer allocation
PCI: endpoint: functions/pci-epf-test: Print throughput information
PCI: endpoint: functions/pci-epf-test: Add DMA support to transfer data
PCI: pciehp: Fix MSI interrupt race
PCI: pciehp: Fix indefinite wait on sysfs requests
PCI: endpoint: Fix clearing start entry in configfs
PCI: tegra: Add support for PCIe endpoint mode in Tegra194
PCI: sysfs: Revert "rescan" file renames
...

show more ...

Merge branch 'remotes/lorenzo/pci/mobiveil'

- Restructure mobiveil driver to support either Root Complex mode or
Endpoint mode (Hou Zhiqiang)

- Collect host initialization into one place (H

Merge branch 'remotes/lorenzo/pci/mobiveil'

- Restructure mobiveil driver to support either Root Complex mode or
Endpoint mode (Hou Zhiqiang)

- Collect host initialization into one place (Hou Zhiqiang)

- Collect interrupt-related code into one place (Hou Zhiqiang)

- Split mobiveil into separate files under
drivers/pci/controller/mobiveil for easier reuse (Hou Zhiqiang)

- Add callbacks for interrupt initialization and linkup checking (Hou
Zhiqiang)

- Add 8- and 16-bit CSR accessors (Hou Zhiqiang)

- Initialize host driver only if Header Type is "bridge" (Hou Zhiqiang)

- Add DT bindings for NXP Layerscape SoCs PCIe Gen4 controller (Hou
Zhiqiang)

- Add PCIe Gen4 RC driver for Layerscape SoCs (Hou Zhiqiang)

- Add pcie-mobiveil __iomem annotations (Hou Zhiqiang)

- Add PCI_MSI_IRQ_DOMAIN Kconfig dependency (Hou Zhiqiang)

* remotes/lorenzo/pci/mobiveil:
PCI: mobiveil: Fix unmet dependency warning for PCIE_MOBIVEIL_PLAT
PCI: mobiveil: Fix sparse different address space warnings
PCI: mobiveil: Add PCIe Gen4 RC driver for Layerscape SoCs
dt-bindings: PCI: Add NXP Layerscape SoCs PCIe Gen4 controller
PCI: mobiveil: Add Header Type field check
PCI: mobiveil: Add 8-bit and 16-bit CSR register accessors
PCI: mobiveil: Allow mobiveil_host_init() to be used to re-init host
PCI: mobiveil: Add callback function for link up check
PCI: mobiveil: Add callback function for interrupt initialization
PCI: mobiveil: Modularize the Mobiveil PCIe Host Bridge IP driver
PCI: mobiveil: Collect the interrupt related operations into a function
PCI: mobiveil: Move the host initialization into a function
PCI: mobiveil: Introduce a new structure mobiveil_root_port

show more ...

PCI: mobiveil: Add PCIe Gen4 RC driver for Layerscape SoCs

Add a PCI host controller driver for Layerscape SoCs integrating
the Mobiveil GPEX IP.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

PCI: mobiveil: Add PCIe Gen4 RC driver for Layerscape SoCs

Add a PCI host controller driver for Layerscape SoCs integrating
the Mobiveil GPEX IP.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
[lorenzo.pieralisi@arm.com: updated commit log]
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Reviewed-by: Andrew Murray <amurray@thegoodpenguin.co.uk>

show more ...

PCI: mobiveil: Add 8-bit and 16-bit CSR register accessors

There are some 8-bit and 16-bit registers in PCIe configuration
space, so add these accessors accordingly.

Signed-off-by: Hou Zhiqiang <Zh

PCI: mobiveil: Add 8-bit and 16-bit CSR register accessors

There are some 8-bit and 16-bit registers in PCIe configuration
space, so add these accessors accordingly.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Reviewed-by: Subrahmanya Lingappa <l.subrahmanya@mobiveil.co.in>
Reviewed-by: Andrew Murray <amurray@thegoodpenguin.co.uk>

show more ...

PCI: mobiveil: Allow mobiveil_host_init() to be used to re-init host

Allow the mobiveil_host_init() function to be used to re-init
host controller's PAB and GPEX CSR register block, since the NXP
in

PCI: mobiveil: Allow mobiveil_host_init() to be used to re-init host

Allow the mobiveil_host_init() function to be used to re-init
host controller's PAB and GPEX CSR register block, since the NXP
integrated Mobiveil IP has to reset and then re-init the PAB
and GPEX CSR registers upon hot-reset.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Subrahmanya Lingappa <l.subrahmanya@mobiveil.co.in>
Reviewed-by: Andrew Murray <amurray@thegoodpenguin.co.uk>

show more ...

PCI: mobiveil: Add callback function for link up check

Platforms integrating the Mobiveil GPEX can implement a specific
mechanism to check the link status.

Add a callback to enable platform specifi

PCI: mobiveil: Add callback function for link up check

Platforms integrating the Mobiveil GPEX can implement a specific
mechanism to check the link status.

Add a callback to enable platform specific link status functions.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
[lorenzo.pieralisi@arm.com: updated log]
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Andrew Murray <andrew.murray@arm.com>

show more ...

PCI: mobiveil: Add callback function for interrupt initialization

The Mobiveil GPEX internal MSI/INTx controller is not implemented
in all platforms in which the Mobiveil GPEX is integrated.

Allow

PCI: mobiveil: Add callback function for interrupt initialization

The Mobiveil GPEX internal MSI/INTx controller is not implemented
in all platforms in which the Mobiveil GPEX is integrated.

Allow platforms to implement their specific interrupt initialization.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Andrew Murray <amurray@thegoodpenguin.co.uk>

show more ...

PCI: mobiveil: Modularize the Mobiveil PCIe Host Bridge IP driver

Modularize the Mobiveil PCIe host driver according to the abstraction of
Root Complex and Endpoint and move it into a new directory

PCI: mobiveil: Modularize the Mobiveil PCIe Host Bridge IP driver

Modularize the Mobiveil PCIe host driver according to the abstraction of
Root Complex and Endpoint and move it into a new directory in order to
make it easier to reuse the driver functions to add new host drivers for
systems integrating the Mobiveil PCIe GPEX IP.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
[lorenzo.pieralisi@arm.com: updated commit log]
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Andrew Murray <andrew.murray@arm.com>

show more ...