Revision tags: v4.6.2, v4.4.13 |
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c853f18b |
| 07-Jun-2016 |
Mauro Carvalho Chehab <mchehab@osg.samsung.com> |
Merge tag 'v4.7-rc2' into v4l_for_linus
Linux 4.7-rc2
* tag 'v4.7-rc2': (10914 commits) Linux 4.7-rc2 devpts: Make each mount of devpts an independent filesystem. parisc: Move die_if_kernel()
Merge tag 'v4.7-rc2' into v4l_for_linus
Linux 4.7-rc2
* tag 'v4.7-rc2': (10914 commits) Linux 4.7-rc2 devpts: Make each mount of devpts an independent filesystem. parisc: Move die_if_kernel() prototype into traps.h header parisc: Fix pagefault crash in unaligned __get_user() call parisc: Fix printk time during boot parisc: Fix backtrace on PA-RISC mm, page_alloc: recalculate the preferred zoneref if the context can ignore memory policies mm, page_alloc: reset zonelist iterator after resetting fair zone allocation policy mm, oom_reaper: do not use siglock in try_oom_reaper() mm, page_alloc: prevent infinite loop in buffered_rmqueue() checkpatch: reduce git commit description style false positives mm/z3fold.c: avoid modifying HEADLESS page and minor cleanup memcg: add RCU locking around css_for_each_descendant_pre() in memcg_offline_kmem() mm: check the return value of lookup_page_ext for all call sites kdump: fix dmesg gdbmacro to work with record based printk mm: fix overflow in vm_map_ram() Btrfs: deal with duplciates during extent_map insertion in btrfs_get_extent arm64: fix alignment when RANDOMIZE_TEXT_OFFSET is enabled arm64: move {PAGE,CONT}_SHIFT into Kconfig arm64: mm: dump: log span level ...
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Revision tags: openbmc-20160606-1 |
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60c07f80 |
| 03-Jun-2016 |
Rafael J. Wysocki <rafael.j.wysocki@intel.com> |
Merge branches 'acpica-fixes', 'acpi-video' and 'acpi-processor'
* acpica-fixes: ACPICA / Hardware: Fix old register check in acpi_hw_get_access_bit_width()
* acpi-video: ACPI / Thermal / video
Merge branches 'acpica-fixes', 'acpi-video' and 'acpi-processor'
* acpica-fixes: ACPICA / Hardware: Fix old register check in acpi_hw_get_access_bit_width()
* acpi-video: ACPI / Thermal / video: fix max_level incorrect value
* acpi-processor: ACPI / processor: Avoid reserving IO regions too early
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5599617e |
| 02-Jun-2016 |
Daniel Vetter <daniel.vetter@ffwll.ch> |
Merge remote-tracking branch 'airlied/drm-next' into drm-intel-next-queued
Git got absolutely destroyed with all our cherry-picking from drm-intel-next-queued to various branches. It ended up insert
Merge remote-tracking branch 'airlied/drm-next' into drm-intel-next-queued
Git got absolutely destroyed with all our cherry-picking from drm-intel-next-queued to various branches. It ended up inserting intel_crtc_page_flip 2x even in intel_display.c.
Backmerge to get back to sanity.
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
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Revision tags: v4.6.1, v4.4.12 |
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6a2cf60b |
| 30-May-2016 |
Mauro Carvalho Chehab <mchehab@osg.samsung.com> |
Merge tag 'v4.7-rc1' into patchwork
Linux 4.7-rc1
* tag 'v4.7-rc1': (10534 commits) Linux 4.7-rc1 hash_string: Fix zero-length case for !DCACHE_WORD_ACCESS Rename other copy of hash_string to
Merge tag 'v4.7-rc1' into patchwork
Linux 4.7-rc1
* tag 'v4.7-rc1': (10534 commits) Linux 4.7-rc1 hash_string: Fix zero-length case for !DCACHE_WORD_ACCESS Rename other copy of hash_string to hashlen_string hpfs: implement the show_options method affs: fix remount failure when there are no options changed hpfs: fix remount failure when there are no options changed fs: fix binfmt_aout.c build error h8300: Add <asm/hash.h> microblaze: Add <asm/hash.h> m68k: Add <asm/hash.h> <linux/hash.h>: Add support for architecture-specific functions fs/namei.c: Improve dcache hash function Eliminate bad hash multipliers from hash_32() and hash_64() Change hash_64() return value to 32 bits <linux/sunrpc/svcauth.h>: Define hash_str() in terms of hashlen_string() fs/namei.c: Add hashlen_string() function Pull out string hash to <linux/stringhash.h> Revert "platform/chrome: chromeos_laptop: Add Leon Touch" i2c: dev: use after free in detach MIPS: Add missing FROZEN hotplug notifier transitions ...
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Revision tags: openbmc-20160521-1, v4.4.11, openbmc-20160518-1 |
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ede40902 |
| 17-May-2016 |
Linus Torvalds <torvalds@linux-foundation.org> |
Merge branch 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull irq updates from Thomas Gleixner: "This update delivers:
- Yet another interrupt chip diver (LPC3
Merge branch 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull irq updates from Thomas Gleixner: "This update delivers:
- Yet another interrupt chip diver (LPC32xx) - Core functions to handle partitioned per-cpu interrupts - Enhancements to the IPI core - Proper handling of irq type configuration - A large set of ARM GIC enhancements - The usual pile of small fixes, cleanups and enhancements"
* 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (31 commits) irqchip/bcm2836: Use a more generic memory barrier call irqchip/bcm2836: Fix compiler warning on 64-bit build irqchip/bcm2836: Drop smp_set_ops on arm64 builds irqchip/gic: Add helper functions for GIC setup and teardown irqchip/gic: Store GIC configuration parameters irqchip/gic: Pass GIC pointer to save/restore functions irqchip/gic: Return an error if GIC initialisation fails irqchip/gic: Remove static irq_chip definition for eoimode1 irqchip/gic: Don't initialise chip if mapping IO space fails irqchip/gic: WARN if setting the interrupt type for a PPI fails irqchip/gic: Don't unnecessarily write the IRQ configuration irqchip: Mask the non-type/sense bits when translating an IRQ genirq: Ensure IRQ descriptor is valid when setting-up the IRQ irqchip/gic-v3: Configure all interrupts as non-secure Group-1 irqchip/gic-v2m: Add workaround for Broadcom NS2 GICv2m erratum irqchip/irq-alpine-msi: Don't use <asm-generic/msi.h> irqchip/mbigen: Checking for IS_ERR() instead of NULL irqchip/gic-v3: Remove inexistant register definition irqchip/gicv3-its: Don't allow devices whose ID is outside range irqchip: Add LPC32xx interrupt controller driver ...
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Revision tags: v4.6, v4.4.10, openbmc-20160511-1, openbmc-20160505-1, v4.4.9, v4.4.8, v4.4.7 |
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9e2c986c |
| 11-Apr-2016 |
Marc Zyngier <marc.zyngier@arm.com> |
irqchip: Add per-cpu interrupt partitioning library
We've unfortunately started seeing a situation where percpu interrupts are partitioned in the system: one arbitrary set of CPUs has an interrupt c
irqchip: Add per-cpu interrupt partitioning library
We've unfortunately started seeing a situation where percpu interrupts are partitioned in the system: one arbitrary set of CPUs has an interrupt connected to a type of device, while another disjoint set of CPUs has the same interrupt connected to another type of device.
This makes it impossible to have a device driver requesting this interrupt using the current percpu-interrupt abstraction, as the same interrupt number is now potentially claimed by at least two drivers, and we forbid interrupt sharing on per-cpu interrupt.
A solution to this is to turn things upside down. Let's assume that our system describes all the possible partitions for a given interrupt, and give each of them a unique identifier. It is then possible to create a namespace where the affinity identifier itself is a form of interrupt number. At this point, it becomes easy to implement a set of partitions as a cascaded irqchip, each affinity identifier being the HW irq.
This allows us to keep a number of nice properties: - Each partition results in a separate percpu-interrupt (with a restrictied affinity), which keeps drivers happy. - Because the underlying interrupt is still per-cpu, the overhead of the indirection can be kept pretty minimal. - The core code can ignore most of that crap.
For that purpose, we implement a small library that deals with some of the boilerplate code, relying on platform-specific drivers to provide a description of the affinity sets and a set of callbacks.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: devicetree@vger.kernel.org Cc: Jason Cooper <jason@lakedaemon.net> Cc: Will Deacon <will.deacon@arm.com> Cc: Rob Herring <robh+dt@kernel.org> Link: http://lkml.kernel.org/r/1460365075-7316-4-git-send-email-marc.zyngier@arm.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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