Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk framework updates from Stephen Boyd:
"The core clk framework changes are small again. They're mostly mi

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk framework updates from Stephen Boyd:
"The core clk framework changes are small again. They're mostly minor
fixes that weren't causing enough problems (or any problems when we're
just clarifying things) to warrant sending outside the merge window.
The majority of changes are in drivers for various SoCs. Full details
are in the logs, but here's the summary.

Core:

- Better support for DeviceTree overlays with the addition of the
CLK_OF_DECLARE_DRIVER macro. Now we won't probe a clk driver for a
device node that matched during of_clk_init(), unless the driver
uses CLK_OF_DECLARE_DRIVER instead of CLK_OF_DECLARE. This allows
overlays to work cleanly for drivers that must probe before the
device model is ready, and also after it's ready when an overlay is
loaded.

- Clarification in the code around how clk_hw pointers are returned
from of clk providers

- Proper migration of prepare/enable counts to parents when the clk
tree is constructed

New Drivers:

- Socionext's UniPhier SoCs
- Loongson1C
- ZTE ZX296718
- Qualcomm MDM9615
- Amlogic GXBB AO clocks and resets
- Broadcom BCM53573 ILP
- Maxim MAX77620

Updates:

- Four Allwinner SoCs are migrated to the new style clk driver (A31,
A31s, A23 and A33)
- Exynos 5xxx audio and DRAM clks
- Loongson1B AC97, DMA and NAND clks
- Rockchip DDR clks and rk3399 driver tweaks
- Renesas R-Car M3-W (r8a7796) SoC SDHI interface and Watchdog timer
clks
- Renasas R-Car H3 and M3-W CMT clks and RAVB+Thermal clks for M3-W
- Amlogic GXBB MMC gate clks
- at91 sama5d4 sckc
- Removal of STiH415 and STiH416 clk support as the SoC is being
removed
- Rework of STiH4xx clk support for new style bindings
- Continuation of driver migration to clk_hw based registration APIs
- xgene PMD support
- bcm2835 critical clk markings
- ARM versatile ICST"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (199 commits)
CLK: Add Loongson1C clock support
clk: Loongson1: Make use of GENMASK
clk: Loongson1: Update clocks of Loongson1B
clk: Loongson1: Refactor Loongson1 clock
clk: change the type of clk_hw_onecell_data.num to unsigned int
clk: zx296718: register driver earlier with core_initcall
clk: mvebu: dynamically allocate resources in Armada CP110 system controller
clk: mvebu: fix setting unwanted flags in CP110 gate clock
clk: nxp: clk-lpc32xx: Unmap region obtained by of_iomap
clk: mediatek: clk-mt8173: Unmap region obtained by of_iomap
clk: sunxi-ng: Fix reset offset for the A23 and A33
clk: at91: sckc: optimize boot time
clk: at91: Add sama5d4 sckc support
clk: at91: move slow clock controller clocks to sckc.c
clk: imx6: initialize GPU clocks
clk: imx6: fix i.MX6DL clock tree to reflect reality
clk: imx53: Add clocks configuration
clk: uniphier: add clock data for UniPhier SoCs
clk: uniphier: add core support code for UniPhier clock driver
clk: bcm: Add driver for BCM53573 ILP clock
...

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Merge tag 'irqchip-4.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/core

Merge the first drop of irqchip updates for 4.9 from Marc Zyngier:

- ACPI IORT core code
-

Merge tag 'irqchip-4.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/core

Merge the first drop of irqchip updates for 4.9 from Marc Zyngier:

- ACPI IORT core code
- IORT support for the GICv3 ITS
- A few of GIC cleanups

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Merge tag 'sunxi-clk-for-4.9' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into clk-next

Pull Allwinner clock driver changes from Maxime Ripard:

Four more SoCs converted to the

Merge tag 'sunxi-clk-for-4.9' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into clk-next

Pull Allwinner clock driver changes from Maxime Ripard:

Four more SoCs converted to the new clock framework (A31, A31s, A23 and
A33).

* tag 'sunxi-clk-for-4.9' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
clk: sunxi-ng: Add hardware dependency
clk: sunxi-ng: Add A23 CCU
clk: sunxi-ng: Add A33 CCU support
clk: sunxi-ng: Add N-class clocks support
clk: sunxi-ng: mux: Add mux table macro
clk: sunxi-ng: div: Allow to set a maximum
clk: sunxi-ng: div: Add kerneldoc for the _ccu_div structure
clk: sunxi-ng: div: Add mux table macros
clk: sunxi-ng: Add A31/A31s clocks
clk: sunxi-ng: mux: Add clk notifier functions
clk: sunxi-ng: mux: support fixed pre-dividers on multiple parents
clk: sunxi-ng: mux: Add support for mux tables
clk: sunxi-ng: mux: Rename mux macro to be consistent
clk: sunxi-ng: nkm: Add mux to support multiple parents
clk: sunxi-ng: mux: Increase fixed pre-divider div size

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Merge tag 'sunxi-dt-for-4.9-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/late

Merge "Allwinner DT changes for 4.9, take 2" from Maxime Ripard:

A second set of devic

Merge tag 'sunxi-dt-for-4.9-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/late

Merge "Allwinner DT changes for 4.9, take 2" from Maxime Ripard:

A second set of device tree changes, this time switching a few SoCs to the
new sunxi-ng clock framework. We also added the support for a new SoC
(NextThing GR8 and its evaluation board), and the support for the DRM
driver in the A33.

To maintain bisectability, while avoiding some un-trivial merge
conflicts, I had to merge the clk branch that I've sent a PR to Mike
and Stephen. This branch will of course be stable.

* tag 'sunxi-dt-for-4.9-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: (53 commits)
ARM: dts: gr8: Add support for the GR8 evaluation board
ARM: dts: Add NextThing GR8 dtsi
ARM: dts: sun8i: Move A23/A33 usbphy and usb_otg nodes to common dtsi
ARM: sun8i: a23/a33: Add RGB666 pins
ARM: sun8i: a33: Add display pipeline
ARM: sun8i: Convert the A23 and A33 to the CCU
ARM: dts: sun6i: switch A31/A31s to new CCU clock bindings
clk: sunxi-ng: Add hardware dependency
clk: sunxi-ng: Add A23 CCU
clk: sunxi-ng: Add A33 CCU support
clk: sunxi-ng: Add N-class clocks support
clk: sunxi-ng: mux: Add mux table macro
clk: sunxi-ng: div: Allow to set a maximum
clk: sunxi-ng: div: Add kerneldoc for the _ccu_div structure
clk: sunxi-ng: div: Add mux table macros
devicetree: Add vendor prefix for FriendlyARM
ARM: dts: sun8i: Add dts file for the NanoPi NEO SBC
ARM: dts: sun8i-q8-common: Add support for SDIO wifi controllers
ARM: dts: sun8i: Add dts file for the Orange Pi Plus2E SBC
ARM: dts: sun8i: Orange Pi Plus dts is for the Plus and Plus 2
...

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Merge branch 'sunxi/clk-for-4.9' into sunxi/dt-for-4.9

clk: sunxi-ng: mux: Add clk notifier functions

On sunxi we support cpufreq by changing the clock rate of PLL-CPU.
It's possible the clock output of the PLL goes out of the CPU's
operational limits w

clk: sunxi-ng: mux: Add clk notifier functions

On sunxi we support cpufreq by changing the clock rate of PLL-CPU.
It's possible the clock output of the PLL goes out of the CPU's
operational limits when the PLL's multipliers / dividers are changed
and it hasn't stabilized yet. This would result in the CPU hanging.

To circumvent this, we temporarily switch the CPU mux clock to another
stable clock before the rate change, and switch it back after the PLL
stabilizes. This is done with clk notifiers registered on the PLL.

This patch adds common functions for notifiers to reparent mux clocks.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

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clk: sunxi-ng: mux: support fixed pre-dividers on multiple parents

Some clocks on the A31 have fixed pre-dividers on multiple parents.
Add support for them.

Signed-off-by: Chen-Yu Tsai <wens@csie.o

clk: sunxi-ng: mux: support fixed pre-dividers on multiple parents

Some clocks on the A31 have fixed pre-dividers on multiple parents.
Add support for them.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

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clk: sunxi-ng: mux: Add support for mux tables

Some clock muxes have holes, i.e. invalid or unconnected inputs,
between parent mux values.

Add support for specifying a mux table to map clock parent

clk: sunxi-ng: mux: Add support for mux tables

Some clock muxes have holes, i.e. invalid or unconnected inputs,
between parent mux values.

Add support for specifying a mux table to map clock parents to
mux values.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

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Merge remote-tracking branch 'airlied/drm-next' into drm-intel-next-queued

Backmerge because too many conflicts, and also we need to get at the
latest struct fence patches from Gustavo. Requested by

Merge remote-tracking branch 'airlied/drm-next' into drm-intel-next-queued

Backmerge because too many conflicts, and also we need to get at the
latest struct fence patches from Gustavo. Requested by Chris Wilson.

Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>

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Merge branch 'linus' into locking/urgent, to pick up fixes

Signed-off-by: Ingo Molnar <mingo@kernel.org>

clk: sunxi-ng: mux: Increase fixed pre-divider div size

Some clocks have a predivider value that is larger than what u8 can
store. One such example is the OUT clk found on A20/A31, which has
a /750

clk: sunxi-ng: mux: Increase fixed pre-divider div size

Some clocks have a predivider value that is larger than what u8 can
store. One such example is the OUT clk found on A20/A31, which has
a /750 pre-divider on one of the osc24M parents.

Increase the size of the div field to u16.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

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Merge tag 'v4.8-rc1' into patchwork

Linux 4.8-rc1

* tag 'v4.8-rc1': (6093 commits)
Linux 4.8-rc1
block: rename bio bi_rw to bi_opf
target: iblock_execute_sync_cache() should use bio_set_op_at

Merge tag 'v4.8-rc1' into patchwork

Linux 4.8-rc1

* tag 'v4.8-rc1': (6093 commits)
Linux 4.8-rc1
block: rename bio bi_rw to bi_opf
target: iblock_execute_sync_cache() should use bio_set_op_attrs()
mm: make __swap_writepage() use bio_set_op_attrs()
block/mm: make bdev_ops->rw_page() take a bool for read/write
fs: return EPERM on immutable inode
ramoops: use persistent_ram_free() instead of kfree() for freeing prz
ramoops: use DT reserved-memory bindings
NTB: ntb_hw_intel: use local variable pdev
NTB: ntb_hw_intel: show BAR size in debugfs info
ntb_test: Add a selftest script for the NTB subsystem
ntb_perf: clear link_is_up flag when the link goes down.
ntb_pingpong: Add a debugfs file to get the ping count
ntb_tool: Add link status and files to debugfs
ntb_tool: Postpone memory window initialization for the user
ntb_perf: Wait for link before running test
ntb_perf: Return results by reading the run file
ntb_perf: Improve thread handling to increase robustness
ntb_perf: Schedule based on time not on performance
ntb_transport: Check the number of spads the hardware supports
...

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Merge tag 'clk-for-linus-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Michael Turquette:
"The bulk of the changes are updates and fixes to existing clk prov

Merge tag 'clk-for-linus-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Michael Turquette:
"The bulk of the changes are updates and fixes to existing clk provider
drivers, along with a pretty standard number of new drivers. The core
recieved a small number of updates as well.

Core changes of note:
- removed CLK_IS_ROOT flag

New clk provider drivers:
- Renesas r8a7796 clock pulse generator / module standby and
software reset
- Allwinner sun8i H3 clock controller unit
- AmLogic meson8b clock controller (rewritten)
- AmLogic gxbb clock controller
- support for some new ICs was added by simple changes to static
data tables for chips sharing the same family

Driver updates of note:
- the Allwinner sunxi clock driver infrastucture was rewritten to
comform to the state of the art at drivers/clk/sunxi-ng. The old
implementation is still supported for backwards compatibility with
the DT ABI"

* tag 'clk-for-linus-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (162 commits)
clk: Makefile: re-sort and clean up
Revert "clk: gxbb: expose CLKID_MMC_PCLK"
clk: samsung: Allow modular build of the Audio Subsystem CLKCON driver
clk: samsung: make clk-s5pv210-audss explicitly non-modular
clk: exynos5433: remove CLK_IGNORE_UNUSED flag from SPI clocks
clk: oxnas: Add hardware dependencies
clk: imx7d: do not set parent of ethernet time/ref clocks
ARM: dt: sun8i: switch the H3 to the new CCU driver
clk: sunxi-ng: h3: Fix Kconfig symbol typo
clk: sunxi-ng: h3: Fix audio clock divider offset
clk: sunxi-ng: Add H3 clocks
clk: sunxi-ng: Add N-K-M-P factor clock
clk: sunxi-ng: Add N-K-M Factor clock
clk: sunxi-ng: Add N-M-factor clock support
clk: sunxi-ng: Add N-K-factor clock support
clk: sunxi-ng: Add M-P factor clock support
clk: sunxi-ng: Add divider
clk: sunxi-ng: Add phase clock support
clk: sunxi-ng: Add mux clock support
clk: sunxi-ng: Add gate clock support
...

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Merge branch 'clk-sunxi-ng' into clk-next

clk: sunxi-ng: Add mux clock support

Some clocks in the Allwinner SoCs clocks unit are just muxes.

However, those muxes might also be found in some other complicated clocks
that would benefit from

clk: sunxi-ng: Add mux clock support

Some clocks in the Allwinner SoCs clocks unit are just muxes.

However, those muxes might also be found in some other complicated clocks
that would benefit from the code in there to deal with "advanced" features,
like pre-dividers.

Introduce a set of helpers to reduce the code duplication in such cases.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/20160629190535.11855-6-maxime.ripard@free-electrons.com

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