Merge drm/drm-fixes into drm-misc-fixes

Backmerging for v6.0-rc1.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>

Merge part of branch 'for-next.instantiate' into for-next

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
"The clk core gains a new set of APIs that allow drivers to both
acquire c

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
"The clk core gains a new set of APIs that allow drivers to both
acquire clks and prepare and enable them at the same time. This also
comes with devm support so that drivers can make a single call to get
and prepare and enable the clk and have that all undone when their
driver is removed.

Many folks have requested this feature over the years, but we've had
disagreements about how to implement it and if it was worthwhile to
encourage drivers to use such an API.

Now it's here, so let's see how it goes.

I hope that by introducing this API we can identify drivers that would
benefit from further consolidation of clk API usage, possibly by
moving such logic to the bus layer and out of drivers altogether.

Outside of that major API update, we have the usual collection of
driver updates. A few new SoCs are supported, mostly Qualcomm and
Renesas this time around. Then we have the long tail of non-critical
fixes and minor feature additions to various clk drivers.

And finally more clk provider migration to struct clk_parent_data,
reducing boot times in the process.

Summary:

Core:

- devm helpers for clk_get() + clk_prepare() and clk_enable()

New Drivers:

- Support for the camera clock controller in Qualcomm SM8450 and the
display and gpu clock controllers in Qualcomm SM8350

- Add support for the Renesas RZ/Five SoC

Updates:

- Various fixes, new clocks and USB GDSCs are introduced for Qualcomm
IPQ8074

- Fixes to Qualcomm MSM8939 for issues introduced by inheriting the
MSM8916 GCC driver

- Support for a new type of voteable GDSCs used by Qualcomm SC8280XP
PCIe GDSCs

- Qualcomm SC8280XP pipe clocks transitioned to the new phy-mux
implementation

- Qualcomm MSM8996 GCC, RPM clock driver and some clocks in MSM8994
GCC are migrated to use clk_parent_data

- Corrected the topology for Titan (camera) GDSCs on Qualcomm SDM845
and SM8250

- Qualcomm MSM8916 gains more possible frequencies for its GP clocks.

- The GCC and tsens handling on Qualcomm MSM8960 is reworked to mimic
the design in IPQ8074 to allow the GCC driver to probe earlier.

- The regulator based mmcx supply for Qualcomm dispcc and videocc is
dropped, as the only upstream target that adapted this interface
was transitioned several kernel versions ago

- Qualcomm GDSCs found to be enabled at boot will now reflect in the
enable count of the supply, as was done with the regulator supplies
previously

- Correct adc1, nic_media and edma1's parents for NXP i.MX93

- rdiv, mfd values, the return rate in recalc_rate and add more
frequencies in the table for fracn-gppll on i.MX

- Remove Allwinner workaround logic/compatible in fixed factor code

- MediaTek clk driver cleanups

- Add reset support to more MediaTek clk drivers

- deduplicate Allwinner ccu_clks arrays

- Allwinner H6 GPU DFS support

- Adjust Allwinner Kconfig to limit choice

- Fix initconst confusion on Renesas R-Car Gen4

- Add GPT/POEG (PWM) clocks and resets on Renesas RZ/G2L

- Add PFC and WDT clocks and resets on Renesas RZ/V2M

- Add thermal, SDHI, Z (CPU core), PCIe, and HSCIF (serial) clocks on
Renesas R-Car S4-8"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (124 commits)
clk: fixed-factor: Introduce *clk_hw_register_fixed_factor_parent_hw()
clk: mux: Introduce devm_clk_hw_register_mux_parent_hws()
clk: divider: Introduce devm_clk_hw_register_divider_parent_hw()
clk: qcom: gcc-msm8994: use parent_hws for gpll0/4
clk: qcom: clk-rpm: convert to parent_data API
dt-bindings: clock: fix wrong clock documentation for qcom,rpmcc
clk: qcom: gcc-msm8939: Add missing USB HS system clock frequencies
clk: qcom: gcc-msm8939: Add missing MDSS MDP clock frequencies
clk: qcom: gcc-msm8939: Add missing CAMSS CPP clock frequencies
clk: qcom: gcc-msm8939: Fix venus0_vcodec0_clk frequency definitions
clk: qcom: gcc-msm8939: Add missing CAMSS CCI bus clock
clk: qcom: gcc-msm8939: Fix weird field spacing in ftbl_gcc_camss_cci_clk
clk: qcom: gdsc: Bump parent usage count when GDSC is found enabled
clk: qcom: Drop mmcx gdsc supply for dispcc and videocc
clk: qcom: fix build error initializer element is not constant
clk: sprd: Add dt-bindings include file for UMS512
dt-bindings: clk: sprd: Add bindings for ums512 clock controller
clk: sunxi-ng: sun50i: h6: Modify GPU clock configuration to support DFS
dt-bindings: clock: qcom,gcc-msm8996: add more GCC clock sources
clk: qcom: add support for SM8350 DISPCC
...

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Merge drm/drm-next into drm-intel-next

Sync up. In special to get the drm-intel-gt-next stuff.

Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

Merge branches 'clk-renesas', 'clk-spreadtrum', 'clk-imx' and 'clk-qcom' into clk-next

* clk-renesas: (22 commits)
clk: renesas: rcar-gen4: Fix initconst confusion for cpg_pll_config
clk: renesa

Merge branches 'clk-renesas', 'clk-spreadtrum', 'clk-imx' and 'clk-qcom' into clk-next

* clk-renesas: (22 commits)
clk: renesas: rcar-gen4: Fix initconst confusion for cpg_pll_config
clk: renesas: r9a07g043: Add support for RZ/Five SoC
dt-bindings: clock: r9a07g043-cpg: Add Renesas RZ/Five CPG Clock and Reset Definitions
clk: renesas: r8a779f0: Add HSCIF clocks
clk: renesas: r8a779f0: Add PCIe clocks
clk: renesas: r8a779f0: Add Z0 and Z1 clock support
dt-bindings: clock: renesas,rzg2l: Simplify header file references
clk: renesas: rza1: Remove struct rz_cpg
clk: renesas: r8a7779: Remove struct r8a7779_cpg
clk: renesas: r8a7778: Remove struct r8a7778_cpg
clk: renesas: sh73a0: Remove sh73a0_cpg.reg
clk: renesas: r8a7740: Remove r8a7740_cpg.reg
clk: renesas: r8a73a4: Remove r8a73a4_cpg.reg
clk: renesas: r8a779f0: Add SDHI0 clock
clk: renesas: r8a779f0: Add thermal clock
clk: renesas: rzg2l: Fix reset status function
clk: renesas: r9a06g032: Fix UART clkgrp bitsel
clk: renesas: r9a06g032: Drop some unused fields
clk: renesas: r9a09g011: Add WDT clock and reset entries
clk: renesas: r9a09g011: Add PFC clock and reset entries
...

* clk-spreadtrum:
clk: sprd: Add dt-bindings include file for UMS512
dt-bindings: clk: sprd: Add bindings for ums512 clock controller

* clk-imx:
clk: imx: clk-fracn-gppll: Add more freq config for video pll
clk: imx: clk-fracn-gppll: correct rdiv
clk: imx: clk-fracn-gppll: Return rate in rate table properly in ->recalc_rate()
clk: imx: clk-fracn-gppll: fix mfd value
clk: imx93: Correct the edma1's parent clock
clk: imx93: correct nic_media parent
clk: imx93: use adc_root as the parent clock of adc1

* clk-qcom: (62 commits)
clk: qcom: gcc-msm8994: use parent_hws for gpll0/4
clk: qcom: clk-rpm: convert to parent_data API
dt-bindings: clock: fix wrong clock documentation for qcom,rpmcc
clk: qcom: gcc-msm8939: Add missing USB HS system clock frequencies
clk: qcom: gcc-msm8939: Add missing MDSS MDP clock frequencies
clk: qcom: gcc-msm8939: Add missing CAMSS CPP clock frequencies
clk: qcom: gcc-msm8939: Fix venus0_vcodec0_clk frequency definitions
clk: qcom: gcc-msm8939: Add missing CAMSS CCI bus clock
clk: qcom: gcc-msm8939: Fix weird field spacing in ftbl_gcc_camss_cci_clk
clk: qcom: gdsc: Bump parent usage count when GDSC is found enabled
clk: qcom: Drop mmcx gdsc supply for dispcc and videocc
clk: qcom: fix build error initializer element is not constant
dt-bindings: clock: qcom,gcc-msm8996: add more GCC clock sources
clk: qcom: add support for SM8350 DISPCC
clk: qcom: add support for SM8350 GPUCC
clk: qcom: add camera clock controller driver for SM8450 SoC
clk: qcom: clk-alpha-pll: add Rivian EVO PLL configuration interfaces
clk: qcom: clk-alpha-pll: add Lucid EVO PLL configuration interfaces
clk: qcom: clk-alpha-pll: limit exported symbols to GPL licensed code
clk: qcom: clk-alpha-pll: fix clk_trion_pll_configure description
...

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Merge branch 'next' into for-linus

Prepare input updates for 5.20 (or 6.0) merge window.

Merge drm/drm-next into drm-misc-next-fixes

Backmerging from drm/drm-next for the final fixes that will go
into v5.20.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>

Merge tag 'v5.19-rc5' into next

Merge with mainline to bring up the latest definition from MFD subsystem
needed for Mediatek keypad driver.

Merge tag 'asoc-fix-v5.19-rc3' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus

ASoC: Fixes for v5.19

A collection of fixes for v5.19, quite large but nothing major -

Merge tag 'asoc-fix-v5.19-rc3' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus

ASoC: Fixes for v5.19

A collection of fixes for v5.19, quite large but nothing major - a good
chunk of it is more stuff that was identified by mixer-test regarding
event generation.

show more ...

Merge tag 'renesas-clk-for-v5.20-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-renesas

Pull Renesas clk driver updates from Geert Uytterhoeven:

- Add GPT/PO

Merge tag 'renesas-clk-for-v5.20-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-renesas

Pull Renesas clk driver updates from Geert Uytterhoeven:

- Add GPT/POEG (PWM) clocks and resets on RZ/G2L
- Add PFC and WDT clocks and resets on RZ/V2M
- Add thermal, SDHI, Z (CPU core), PCIe, and HSCIF (serial) clocks on
R-Car S4-8
- Miscellaneous fixes and improvements

* tag 'renesas-clk-for-v5.20-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
clk: renesas: r8a779f0: Add HSCIF clocks
clk: renesas: r8a779f0: Add PCIe clocks
clk: renesas: r8a779f0: Add Z0 and Z1 clock support
dt-bindings: clock: renesas,rzg2l: Simplify header file references
clk: renesas: rza1: Remove struct rz_cpg
clk: renesas: r8a7779: Remove struct r8a7779_cpg
clk: renesas: r8a7778: Remove struct r8a7778_cpg
clk: renesas: sh73a0: Remove sh73a0_cpg.reg
clk: renesas: r8a7740: Remove r8a7740_cpg.reg
clk: renesas: r8a73a4: Remove r8a73a4_cpg.reg
clk: renesas: r8a779f0: Add SDHI0 clock
clk: renesas: r8a779f0: Add thermal clock
clk: renesas: rzg2l: Fix reset status function
clk: renesas: r9a06g032: Fix UART clkgrp bitsel
clk: renesas: r9a06g032: Drop some unused fields
clk: renesas: r9a09g011: Add WDT clock and reset entries
clk: renesas: r9a09g011: Add PFC clock and reset entries
clk: renesas: r9a07g044: Add POEG clock and reset entries
clk: renesas: r9a07g044: Add GPT clock and reset entry

show more ...

Merge drm/drm-next into drm-misc-next

Backmerging to get new regmap APIs of v5.19-rc1.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>

Merge branch 'topic/ctl-enhancements' into for-next

Pull ALSA control enhancement patches.
One is the faster lookup of control elements, and another is to
introduce the input data validation.

Signe

Merge branch 'topic/ctl-enhancements' into for-next

Pull ALSA control enhancement patches.
One is the faster lookup of control elements, and another is to
introduce the input data validation.

Signed-off-by: Takashi Iwai <tiwai@suse.de>

show more ...

Merge tag 'kvm-riscv-fixes-5.19-1' of https://github.com/kvm-riscv/linux into HEAD

KVM/riscv fixes for 5.19, take #1

- Typo fix in arch/riscv/kvm/vmid.c

- Remove broken reference pattern from MAIN

Merge tag 'kvm-riscv-fixes-5.19-1' of https://github.com/kvm-riscv/linux into HEAD

KVM/riscv fixes for 5.19, take #1

- Typo fix in arch/riscv/kvm/vmid.c

- Remove broken reference pattern from MAINTAINERS entry

show more ...

Merge v5.19-rc1 into drm-misc-fixes

Let's kick-off the start of the 5.19 fix cycle

Signed-off-by: Maxime Ripard <maxime@cerno.tech>

Merge tag 'v5.19-rc1' into asoc-5.19

Linux 5.19-rc1

clk: renesas: r9a09g011: Add WDT clock and reset entries

Add WDT0 clock and reset entries to CPG driver.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Link: https://lore.kernel.org/r/202

clk: renesas: r9a09g011: Add WDT clock and reset entries

Add WDT0 clock and reset entries to CPG driver.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Link: https://lore.kernel.org/r/20220518150105.48167-1-phil.edworthy@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

show more ...

clk: renesas: r9a09g011: Add PFC clock and reset entries

Add PFC clock/reset entries to CPG driver.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.ma

clk: renesas: r9a09g011: Add PFC clock and reset entries

Add PFC clock/reset entries to CPG driver.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220518135208.39885-1-phil.edworthy@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

show more ...

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
"Mainly driver updates this time around.

There's a single patch to the co

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
"Mainly driver updates this time around.

There's a single patch to the core clk framework that simplifies a
runtime PM call. Otherwise the majority of the diff falls to a few SoC
drivers: Qualcomm, STM32 and MediaTek. Those SoCs gain some new
hardware support and what comes along with that is quite a few lines
of data and some clk_ops code.

Beyond the new hardware support we have the usual pile of driver
updates that add missing clks on already supported SoCs or fix up
problems like bad clk tree descriptions. It's nice to see that more
drivers are moving to clk_hw based APIs too.

New Drivers:
- Add STM32MP13 RCC driver (Reset Clock Controller)
- MediaTek MT8186 SoC clk support
- Airoha EN7523 SoC system clocks
- Clock driver for exynosautov9 SoC
- Renesas R-Car V4H and RZ/V2M SoCs
- Renesas RZ/G2UL SoC
- LPASS clk driver for Qualcomm sc7280 SoC
- GCC clk driver for Qualcomm SC8280XP SoC

Updates:
- SDCC uses floor clk ops on Qualcomm MSM8976
- Add modem reset and fix RPM clks on Qualcomm MSM8976
- Add the two missing CLKOUT clocks for U8500/DB8500 SoC
- Mark some clks critical on Ingenic X1000
- Convert ux500 to clk_hw
- Move MediaTek driver to clk_hw provider APIs
- Use i2c driver probe_new to avoid id scans
- Convert a number of Rockchip dt bindings to YAML
- Mark hclk_vo critical on Rockchip rk3568
- Use pm_runtime_resume_and_get to fix pm_runtime_get_sync() usage
- Various cleanups like memory allocation error checks and plugged
leaks
- Allwinner H6 RTC clock support
- Allwinner H616 32 kHz clock support
- Add the Universal Flash Storage clock on Renesas R-Car S4-8
- Add I2C, SSIF-2 (sound), USB, CANFD, OSTM (timer), WDT, SPI Multi
I/O Bus, RSPI, TSU (thermal), and ADC clocks and resets on Renesas
RZ/G2UL
- Add display clock support on Renesas RZ/G2L
- Add RPC (QSPI/HyperFlash) clocks on Renesas R-Car E3 and D3
- Add 27 MHz phy PLL ref clock on i.MX
- Add mcore_booted module parameter to tell kernel M core has already
booted for i.MX
- Remove snvs clock on i.MX because it was for secure world only
- Add dt bindings for i.MX8MN GPT
- Add DISP2 pixel clock for i.MX8MP
- Add clkout1/2 for i.MX8MP
- Fix parent clock of ubs_root_clk for i.MX8MP
- Implement better RCG parking on Qualcomm SoCs using the shared RCG
clk ops
- Kerneldoc fixes
- Switch Tegra BPMP to determine_rate clk op
- Add a pointer to dt schema for generic clock bindings"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (168 commits)
Revert "clk: qcom: regmap-mux: add pipe clk implementation"
Revert "clk: qcom: gcc-sc7280: use new clk_regmap_mux_safe_ops for PCIe pipe clocks"
Revert "clk: qcom: gcc-sm8450: use new clk_regmap_mux_safe_ops for PCIe pipe clocks"
clk: bcm: rpi: Use correct order for the parameters of devm_kcalloc()
clk: stm32mp13: add safe mux management
clk: stm32mp13: add multi mux function
clk: stm32mp13: add all STM32MP13 kernel clocks
clk: stm32mp13: add all STM32MP13 peripheral clocks
clk: stm32mp13: manage secured clocks
clk: stm32mp13: add composite clock
clk: stm32mp13: add stm32 divider clock
clk: stm32mp13: add stm32_gate management
clk: stm32mp13: add stm32_mux clock management
clk: stm32: Introduce STM32MP13 RCC drivers (Reset Clock Controller)
dt-bindings: rcc: stm32: add new compatible for STM32MP13 SoC
clk: ti: clkctrl: replace usage of found with dedicated list iterator variable
clk: ti: composite: Prefer kcalloc over open coded arithmetic
dt-bindings: clock: exynosautov9: correct count of NR_CLK
clk: mediatek: mt8173: Switch to clk_hw provider APIs
clk: mediatek: Switch to clk_hw provider APIs
...

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Merge branches 'clk-ti', 'clk-cleanup', 'clk-airoha', 'clk-i2c-simple' and 'clk-renesas' into clk-next

- Airoha EN7523 SoC system clocks
- Use i2c driver probe_new to avoid id scans

* clk-ti:
c

Merge branches 'clk-ti', 'clk-cleanup', 'clk-airoha', 'clk-i2c-simple' and 'clk-renesas' into clk-next

- Airoha EN7523 SoC system clocks
- Use i2c driver probe_new to avoid id scans

* clk-ti:
clk: ti: clkctrl: replace usage of found with dedicated list iterator variable
clk: ti: composite: Prefer kcalloc over open coded arithmetic
clk: keystone: syscon-clk: Add support for AM62 epwm-tbclk
dt-bindings: clock: ehrpwm: Add AM62 specific compatible

* clk-cleanup:
clk: bcm: rpi: Use correct order for the parameters of devm_kcalloc()
clk: fixed-rate: Remove redundant if statement
clk: mux: remove redundant initialization of variable width
clk: using pm_runtime_resume_and_get instead of pm_runtime_get_sync
clk: actions: remove redundant assignment after a mask operation

* clk-airoha:
clk: en7523: fix wrong pointer check in en7523_clk_probe()
clk: en7523: Add clock driver for Airoha EN7523 SoC
dt-bindings: Add en7523-scu device tree binding documentation

* clk-i2c-simple:
clk: renesas-pcie: use simple i2c probe function
clk: si570: use i2c_match_id and simple i2c probe
clk: si544: use i2c_match_id and simple i2c probe
clk: si5351: use i2c_match_id and simple i2c probe
clk: si5341: use simple i2c probe function
clk: si514: use simple i2c probe function
clk: max9485: use simple i2c probe function
clk: cs2000-cp: use simple i2c probe function
clk: cdce925: use i2c_match_id and simple i2c probe
clk: cdce706: use simple i2c probe function

* clk-renesas: (48 commits)
clk: renesas: r9a09g011: Add eth clock and reset entries
clk: renesas: Add RZ/V2M support using the rzg2l driver
clk: renesas: rzg2l: Add support for RZ/V2M reset monitor reg
clk: renesas: rzg2l: Make use of CLK_MON registers optional
clk: renesas: rzg2l: Set HIWORD mask for all mux and dividers
clk: renesas: rzg2l: Add read only versions of the clk macros
clk: renesas: rzg2l: Move the DEF_MUX array size calc into the macro
dt-bindings: clock: renesas,rzg2l: Document RZ/V2M SoC
clk: renesas: r9a07g044: Fix OSTM1 module clock name
clk: renesas: r9a07g043: Add clock and reset entries for ADC
clk: renesas: r9a07g043: Add TSU clock and reset entry
clk: renesas: r9a07g043: Add RSPI clock and reset entries
clk: renesas: r9a07g043: Add clock and reset entries for SPI Multi I/O Bus Controller
clk: renesas: r9a07g044: Add DSI clock and reset entries
clk: renesas: r9a07g044: Add LCDC clock and reset entries
clk: renesas: r9a07g044: Add M4 Clock support
clk: renesas: r9a07g044: Add M3 Clock support
clk: renesas: r9a07g044: Add {M2, M2_DIV2} Clocks support
clk: renesas: r9a07g044: Add M1 clock support
clk: renesas: rzg2l: Add DSI divider clk support
...

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Merge tag 'renesas-clk-for-v5.19-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-renesas

Pull Renesas clk driver updates from Geert Uytterhoeven:

- Add suppor

Merge tag 'renesas-clk-for-v5.19-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-renesas

Pull Renesas clk driver updates from Geert Uytterhoeven:

- Add support for the R-Car V4H and RZ/V2M SoCs
- Add the Universal Flash Storage clock on R-Car S4-8
- Add I2C, SSIF-2 (sound), USB, CANFD, OSTM (timer), WDT, SPI Multi
I/O Bus, RSPI, TSU (thermal), and ADC clocks and resets on RZ/G2UL
- Add display clock support on RZ/G2L
- Miscellaneous fixes and improvements

* tag 'renesas-clk-for-v5.19-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers: (36 commits)
clk: renesas: r9a09g011: Add eth clock and reset entries
clk: renesas: Add RZ/V2M support using the rzg2l driver
clk: renesas: rzg2l: Add support for RZ/V2M reset monitor reg
clk: renesas: rzg2l: Make use of CLK_MON registers optional
clk: renesas: rzg2l: Set HIWORD mask for all mux and dividers
clk: renesas: rzg2l: Add read only versions of the clk macros
clk: renesas: rzg2l: Move the DEF_MUX array size calc into the macro
dt-bindings: clock: renesas,rzg2l: Document RZ/V2M SoC
clk: renesas: r9a07g044: Fix OSTM1 module clock name
clk: renesas: r9a07g043: Add clock and reset entries for ADC
clk: renesas: r9a07g043: Add TSU clock and reset entry
clk: renesas: r9a07g043: Add RSPI clock and reset entries
clk: renesas: r9a07g043: Add clock and reset entries for SPI Multi I/O Bus Controller
clk: renesas: r9a07g044: Add DSI clock and reset entries
clk: renesas: r9a07g044: Add LCDC clock and reset entries
clk: renesas: r9a07g044: Add M4 Clock support
clk: renesas: r9a07g044: Add M3 Clock support
clk: renesas: r9a07g044: Add {M2, M2_DIV2} Clocks support
clk: renesas: r9a07g044: Add M1 clock support
clk: renesas: rzg2l: Add DSI divider clk support
...

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clk: renesas: r9a09g011: Add eth clock and reset entries

Add ethernet clock/reset entries to CPG driver.

Note that the AXI and CHI clocks are both enabled and disabled using
the same register bit.

clk: renesas: r9a09g011: Add eth clock and reset entries

Add ethernet clock/reset entries to CPG driver.

Note that the AXI and CHI clocks are both enabled and disabled using
the same register bit.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220504145454.71287-2-phil.edworthy@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

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clk: renesas: Add RZ/V2M support using the rzg2l driver

The Renesas RZ/V2M SoC is very similar to RZ/G2L, though it doesn't have
any CLK_MON registers.

Signed-off-by: Phil Edworthy <phil.edworthy@r

clk: renesas: Add RZ/V2M support using the rzg2l driver

The Renesas RZ/V2M SoC is very similar to RZ/G2L, though it doesn't have
any CLK_MON registers.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220503115557.53370-11-phil.edworthy@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

show more ...