Merge drm/drm-next into drm-misc-next

We need 6.0-rc1 to merge the backlight rework PR.

Signed-off-by: Maxime Ripard <maxime@cerno.tech>

Merge branch 'am5748-fix' into fixes

Merge branch 'linus' into x86/mm, to refresh the branch

This branch is ~14k commits behind upstream, and has an old merge base
from early into the merge window, refresh it to v6.0-rc3+fixes before
q

Merge branch 'linus' into x86/mm, to refresh the branch

This branch is ~14k commits behind upstream, and has an old merge base
from early into the merge window, refresh it to v6.0-rc3+fixes before
queueing up new commits.

Signed-off-by: Ingo Molnar <mingo@kernel.org>

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Merge branch 'sched/warnings' into sched/core, to pick up WARN_ON_ONCE() conversion commit

Merge in the BUG_ON() => WARN_ON_ONCE() conversion commit.

Signed-off-by: Ingo Molnar <mingo@kernel.org>

Merge drm/drm-next into drm-intel-next

Sync drm-intel-next with v6.0-rc as well as recent drm-intel-gt-next.

Since drm-next does not have commit f0c70d41e4e8 ("drm/i915/guc: remove
runtime info pri

Merge drm/drm-next into drm-intel-next

Sync drm-intel-next with v6.0-rc as well as recent drm-intel-gt-next.

Since drm-next does not have commit f0c70d41e4e8 ("drm/i915/guc: remove
runtime info printing from time stamp logging") yet, only
drm-intel-gt-next, will need to do that as part of the merge here to
build.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>

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Merge branch 'i2c/make_remove_callback_void-immutable' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux into next

Sync up with the latest I2C code base to get updated prototype of I2C
bus

Merge branch 'i2c/make_remove_callback_void-immutable' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux into next

Sync up with the latest I2C code base to get updated prototype of I2C
bus remove() method.

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Merge drm/drm-fixes into drm-misc-fixes

Backmerging for v6.0-rc1.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>

Merge part of branch 'for-next.instantiate' into for-next

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
"The clk core gains a new set of APIs that allow drivers to both
acquire c

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
"The clk core gains a new set of APIs that allow drivers to both
acquire clks and prepare and enable them at the same time. This also
comes with devm support so that drivers can make a single call to get
and prepare and enable the clk and have that all undone when their
driver is removed.

Many folks have requested this feature over the years, but we've had
disagreements about how to implement it and if it was worthwhile to
encourage drivers to use such an API.

Now it's here, so let's see how it goes.

I hope that by introducing this API we can identify drivers that would
benefit from further consolidation of clk API usage, possibly by
moving such logic to the bus layer and out of drivers altogether.

Outside of that major API update, we have the usual collection of
driver updates. A few new SoCs are supported, mostly Qualcomm and
Renesas this time around. Then we have the long tail of non-critical
fixes and minor feature additions to various clk drivers.

And finally more clk provider migration to struct clk_parent_data,
reducing boot times in the process.

Summary:

Core:

- devm helpers for clk_get() + clk_prepare() and clk_enable()

New Drivers:

- Support for the camera clock controller in Qualcomm SM8450 and the
display and gpu clock controllers in Qualcomm SM8350

- Add support for the Renesas RZ/Five SoC

Updates:

- Various fixes, new clocks and USB GDSCs are introduced for Qualcomm
IPQ8074

- Fixes to Qualcomm MSM8939 for issues introduced by inheriting the
MSM8916 GCC driver

- Support for a new type of voteable GDSCs used by Qualcomm SC8280XP
PCIe GDSCs

- Qualcomm SC8280XP pipe clocks transitioned to the new phy-mux
implementation

- Qualcomm MSM8996 GCC, RPM clock driver and some clocks in MSM8994
GCC are migrated to use clk_parent_data

- Corrected the topology for Titan (camera) GDSCs on Qualcomm SDM845
and SM8250

- Qualcomm MSM8916 gains more possible frequencies for its GP clocks.

- The GCC and tsens handling on Qualcomm MSM8960 is reworked to mimic
the design in IPQ8074 to allow the GCC driver to probe earlier.

- The regulator based mmcx supply for Qualcomm dispcc and videocc is
dropped, as the only upstream target that adapted this interface
was transitioned several kernel versions ago

- Qualcomm GDSCs found to be enabled at boot will now reflect in the
enable count of the supply, as was done with the regulator supplies
previously

- Correct adc1, nic_media and edma1's parents for NXP i.MX93

- rdiv, mfd values, the return rate in recalc_rate and add more
frequencies in the table for fracn-gppll on i.MX

- Remove Allwinner workaround logic/compatible in fixed factor code

- MediaTek clk driver cleanups

- Add reset support to more MediaTek clk drivers

- deduplicate Allwinner ccu_clks arrays

- Allwinner H6 GPU DFS support

- Adjust Allwinner Kconfig to limit choice

- Fix initconst confusion on Renesas R-Car Gen4

- Add GPT/POEG (PWM) clocks and resets on Renesas RZ/G2L

- Add PFC and WDT clocks and resets on Renesas RZ/V2M

- Add thermal, SDHI, Z (CPU core), PCIe, and HSCIF (serial) clocks on
Renesas R-Car S4-8"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (124 commits)
clk: fixed-factor: Introduce *clk_hw_register_fixed_factor_parent_hw()
clk: mux: Introduce devm_clk_hw_register_mux_parent_hws()
clk: divider: Introduce devm_clk_hw_register_divider_parent_hw()
clk: qcom: gcc-msm8994: use parent_hws for gpll0/4
clk: qcom: clk-rpm: convert to parent_data API
dt-bindings: clock: fix wrong clock documentation for qcom,rpmcc
clk: qcom: gcc-msm8939: Add missing USB HS system clock frequencies
clk: qcom: gcc-msm8939: Add missing MDSS MDP clock frequencies
clk: qcom: gcc-msm8939: Add missing CAMSS CPP clock frequencies
clk: qcom: gcc-msm8939: Fix venus0_vcodec0_clk frequency definitions
clk: qcom: gcc-msm8939: Add missing CAMSS CCI bus clock
clk: qcom: gcc-msm8939: Fix weird field spacing in ftbl_gcc_camss_cci_clk
clk: qcom: gdsc: Bump parent usage count when GDSC is found enabled
clk: qcom: Drop mmcx gdsc supply for dispcc and videocc
clk: qcom: fix build error initializer element is not constant
clk: sprd: Add dt-bindings include file for UMS512
dt-bindings: clk: sprd: Add bindings for ums512 clock controller
clk: sunxi-ng: sun50i: h6: Modify GPU clock configuration to support DFS
dt-bindings: clock: qcom,gcc-msm8996: add more GCC clock sources
clk: qcom: add support for SM8350 DISPCC
...

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Merge drm/drm-next into drm-intel-next

Sync up. In special to get the drm-intel-gt-next stuff.

Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

Merge branches 'clk-basic', 'clk-mtk', 'clk-devm-enable' and 'clk-ti-dt' into clk-next

- Remove allwinner workaround logic/compatible in fixed factor code
- MediaTek clk driver cleanups
- Add res

Merge branches 'clk-basic', 'clk-mtk', 'clk-devm-enable' and 'clk-ti-dt' into clk-next

- Remove allwinner workaround logic/compatible in fixed factor code
- MediaTek clk driver cleanups
- Add reset support to more MediaTek clk drivers
- devm helpers for clk_get() + clk_prepare() and clk_enable()

* clk-basic:
clk: fixed-factor: Introduce *clk_hw_register_fixed_factor_parent_hw()
clk: mux: Introduce devm_clk_hw_register_mux_parent_hws()
clk: divider: Introduce devm_clk_hw_register_divider_parent_hw()
dt-bindings: clock: fixed-factor: Drop Allwinner A10 compatible
clk: fixed: Remove Allwinner A10 special-case logic

* clk-mtk:
clk: mediatek: reset: Add infra_ao reset support for MT8186
dt-bindings: arm: mediatek: Add #reset-cells property for MT8186
dt-bindings: reset: mediatek: Add infra_ao reset index for MT8186
clk: mediatek: reset: Add infra_ao reset support for MT8192/MT8195
dt-bindings: reset: mediatek: Add infra_ao reset index for MT8192/MT8195
dt-bindings: arm: mediatek: Add #reset-cells property for MT8192/MT8195
clk: mediatek: reset: Add reset support for simple probe
clk: mediatek: reset: Add new register reset function with device
clk: mediatek: reset: Change return type for clock reset register function
clk: mediatek: reset: Support inuput argument index mode
clk: mediatek: reset: Support nonsequence base offsets of reset registers
clk: mediatek: reset: Revise structure to control reset register
clk: mediatek: reset: Merge and revise reset register function
clk: mediatek: reset: Extract common drivers to update function
clk: mediatek: reset: Refine and reorder functions in reset.c
clk: mediatek: reset: Fix written reset bit offset
clk: mediatek: reset: Add reset.h
clk: mediatek: Delete MT8192 msdc gate
dt-bindings: ARM: Mediatek: Remove msdc binding of MT8192 clock

* clk-devm-enable:
clk: Remove never used devm_clk_*unregister()
clk: Fix pointer casting to prevent oops in devm_clk_release()
clk: meson: axg-audio: Don't duplicate devm_clk_get_enabled()
clk: Provide new devm_clk helpers for prepared and enabled clocks
clk: generalize devm_clk_get() a bit
clk: Improve documentation for devm_clk_get() and its optional variant

* clk-ti-dt:
clk: ti: Stop using legacy clkctrl names for omap4 and 5

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Merge branch 'next' into for-linus

Prepare input updates for 5.20 (or 6.0) merge window.

Merge drm/drm-next into drm-misc-next-fixes

Backmerging from drm/drm-next for the final fixes that will go
into v5.20.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>

Merge tag 'v5.19-rc5' into next

Merge with mainline to bring up the latest definition from MFD subsystem
needed for Mediatek keypad driver.

Merge tag 'asoc-fix-v5.19-rc3' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus

ASoC: Fixes for v5.19

A collection of fixes for v5.19, quite large but nothing major -

Merge tag 'asoc-fix-v5.19-rc3' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus

ASoC: Fixes for v5.19

A collection of fixes for v5.19, quite large but nothing major - a good
chunk of it is more stuff that was identified by mixer-test regarding
event generation.

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Merge drm/drm-next into drm-misc-next

Backmerging to get new regmap APIs of v5.19-rc1.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>

clk: mediatek: reset: Add new register reset function with device

Using device to register reset controller is a better implementation in
current drivers. Howerver, some clock drviers of MediaTek on

clk: mediatek: reset: Add new register reset function with device

Using device to register reset controller is a better implementation in
current drivers. Howerver, some clock drviers of MediaTek only provide
device_node.

Therefore, we still remain the register reset function with device_node
and add a new function with device to register reset controller.

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Tested-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Link: https://lore.kernel.org/r/20220523093346.28493-11-rex-bc.chen@mediatek.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

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clk: mediatek: reset: Support nonsequence base offsets of reset registers

The bank offsets are not serial for all reset registers.
For example, there are five infra reset banks for MT8192: 0x120, 0x

clk: mediatek: reset: Support nonsequence base offsets of reset registers

The bank offsets are not serial for all reset registers.
For example, there are five infra reset banks for MT8192: 0x120, 0x130,
0x140, 0x150 and 0x730.

To support this,
- Change reg_ofs to rst_bank_ofs which is a pointer to base offsets of
the reset register.
- Add a new define RST_NR_PER_BANK to define reset number for each
reset bank.

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Tested-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Link: https://lore.kernel.org/r/20220523093346.28493-8-rex-bc.chen@mediatek.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

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clk: mediatek: reset: Revise structure to control reset register

To declare the reset data easier, we add a strucure to do this instead
of using many input variables to mtk_register_reset_controller

clk: mediatek: reset: Revise structure to control reset register

To declare the reset data easier, we add a strucure to do this instead
of using many input variables to mtk_register_reset_controller().

- Add mtk_clk_rst_desc to define the reset description when registering
the reset controller.
- Rename "mtk_reset" to "mtk_clk_rst_data". We use it to store data of
reset controller.
- Document mtk_clk_rst_desc and mtk_clk_rst_data.
- Modify the documentation of mtk_register_reset_controller.
- Extract container_of in update functions to to_mtk_clk_rst_data().

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Tested-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Link: https://lore.kernel.org/r/20220523093346.28493-7-rex-bc.chen@mediatek.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

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clk: mediatek: reset: Merge and revise reset register function

There are two versions for clock reset register control for MediaTek
SoCs. The old hardware is one bit per reset control, and does not

clk: mediatek: reset: Merge and revise reset register function

There are two versions for clock reset register control for MediaTek
SoCs. The old hardware is one bit per reset control, and does not
have separate registers for bit set, clear and read-back operations.
This matches the scheme supported by the simple reset driver.

However, because we need to use different data structure from
reset_simple_data, we can not use the operation of simple reset
driver.
For this reason, we keep the original functions and name this version
as "MTK_RST_SIMPLE".

In this patch:
- Add a version enumeration to separate different reset hardware.
- Merge the reset register function of simple and set_clr into one
function "mtk_register_reset_controller".
- Rename input variable "num_regs" to "rst_bank_nr" to avoid
confusion. This variable is used to define the quantity of reset bank.
- Document mtk_reset_version and mtk_register_reset_controller.

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Tested-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Link: https://lore.kernel.org/r/20220523093346.28493-6-rex-bc.chen@mediatek.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

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Merge branch 'topic/ctl-enhancements' into for-next

Pull ALSA control enhancement patches.
One is the faster lookup of control elements, and another is to
introduce the input data validation.

Signe

Merge branch 'topic/ctl-enhancements' into for-next

Pull ALSA control enhancement patches.
One is the faster lookup of control elements, and another is to
introduce the input data validation.

Signed-off-by: Takashi Iwai <tiwai@suse.de>

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Merge tag 'kvm-riscv-fixes-5.19-1' of https://github.com/kvm-riscv/linux into HEAD

KVM/riscv fixes for 5.19, take #1

- Typo fix in arch/riscv/kvm/vmid.c

- Remove broken reference pattern from MAIN

Merge tag 'kvm-riscv-fixes-5.19-1' of https://github.com/kvm-riscv/linux into HEAD

KVM/riscv fixes for 5.19, take #1

- Typo fix in arch/riscv/kvm/vmid.c

- Remove broken reference pattern from MAINTAINERS entry

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Merge v5.19-rc1 into drm-misc-fixes

Let's kick-off the start of the 5.19 fix cycle

Signed-off-by: Maxime Ripard <maxime@cerno.tech>

Merge tag 'v5.19-rc1' into asoc-5.19

Linux 5.19-rc1

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
"Mainly driver updates this time around.

There's a single patch to the co

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
"Mainly driver updates this time around.

There's a single patch to the core clk framework that simplifies a
runtime PM call. Otherwise the majority of the diff falls to a few SoC
drivers: Qualcomm, STM32 and MediaTek. Those SoCs gain some new
hardware support and what comes along with that is quite a few lines
of data and some clk_ops code.

Beyond the new hardware support we have the usual pile of driver
updates that add missing clks on already supported SoCs or fix up
problems like bad clk tree descriptions. It's nice to see that more
drivers are moving to clk_hw based APIs too.

New Drivers:
- Add STM32MP13 RCC driver (Reset Clock Controller)
- MediaTek MT8186 SoC clk support
- Airoha EN7523 SoC system clocks
- Clock driver for exynosautov9 SoC
- Renesas R-Car V4H and RZ/V2M SoCs
- Renesas RZ/G2UL SoC
- LPASS clk driver for Qualcomm sc7280 SoC
- GCC clk driver for Qualcomm SC8280XP SoC

Updates:
- SDCC uses floor clk ops on Qualcomm MSM8976
- Add modem reset and fix RPM clks on Qualcomm MSM8976
- Add the two missing CLKOUT clocks for U8500/DB8500 SoC
- Mark some clks critical on Ingenic X1000
- Convert ux500 to clk_hw
- Move MediaTek driver to clk_hw provider APIs
- Use i2c driver probe_new to avoid id scans
- Convert a number of Rockchip dt bindings to YAML
- Mark hclk_vo critical on Rockchip rk3568
- Use pm_runtime_resume_and_get to fix pm_runtime_get_sync() usage
- Various cleanups like memory allocation error checks and plugged
leaks
- Allwinner H6 RTC clock support
- Allwinner H616 32 kHz clock support
- Add the Universal Flash Storage clock on Renesas R-Car S4-8
- Add I2C, SSIF-2 (sound), USB, CANFD, OSTM (timer), WDT, SPI Multi
I/O Bus, RSPI, TSU (thermal), and ADC clocks and resets on Renesas
RZ/G2UL
- Add display clock support on Renesas RZ/G2L
- Add RPC (QSPI/HyperFlash) clocks on Renesas R-Car E3 and D3
- Add 27 MHz phy PLL ref clock on i.MX
- Add mcore_booted module parameter to tell kernel M core has already
booted for i.MX
- Remove snvs clock on i.MX because it was for secure world only
- Add dt bindings for i.MX8MN GPT
- Add DISP2 pixel clock for i.MX8MP
- Add clkout1/2 for i.MX8MP
- Fix parent clock of ubs_root_clk for i.MX8MP
- Implement better RCG parking on Qualcomm SoCs using the shared RCG
clk ops
- Kerneldoc fixes
- Switch Tegra BPMP to determine_rate clk op
- Add a pointer to dt schema for generic clock bindings"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (168 commits)
Revert "clk: qcom: regmap-mux: add pipe clk implementation"
Revert "clk: qcom: gcc-sc7280: use new clk_regmap_mux_safe_ops for PCIe pipe clocks"
Revert "clk: qcom: gcc-sm8450: use new clk_regmap_mux_safe_ops for PCIe pipe clocks"
clk: bcm: rpi: Use correct order for the parameters of devm_kcalloc()
clk: stm32mp13: add safe mux management
clk: stm32mp13: add multi mux function
clk: stm32mp13: add all STM32MP13 kernel clocks
clk: stm32mp13: add all STM32MP13 peripheral clocks
clk: stm32mp13: manage secured clocks
clk: stm32mp13: add composite clock
clk: stm32mp13: add stm32 divider clock
clk: stm32mp13: add stm32_gate management
clk: stm32mp13: add stm32_mux clock management
clk: stm32: Introduce STM32MP13 RCC drivers (Reset Clock Controller)
dt-bindings: rcc: stm32: add new compatible for STM32MP13 SoC
clk: ti: clkctrl: replace usage of found with dedicated list iterator variable
clk: ti: composite: Prefer kcalloc over open coded arithmetic
dt-bindings: clock: exynosautov9: correct count of NR_CLK
clk: mediatek: mt8173: Switch to clk_hw provider APIs
clk: mediatek: Switch to clk_hw provider APIs
...

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