fdtdec.h (ee1e3c2f23bcf7a46ad91484ec2dd40653703b61) fdtdec.h (88364387c60dc72549ccf7f2d595cbf847ab4e17)
1/*
2 * Copyright (c) 2011 The Chromium OS Authors.
3 * See file CREDITS for list of people who contributed to this
4 * project.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of

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79 COMPAT_NVIDIA_TEGRA20_SLINK, /* Tegra 2 SPI SLINK controller */
80 COMPAT_NVIDIA_TEGRA114_SPI, /* Tegra 114 SPI controller */
81 COMPAT_SMSC_LAN9215, /* SMSC 10/100 Ethernet LAN9215 */
82 COMPAT_SAMSUNG_EXYNOS5_SROMC, /* Exynos5 SROMC */
83 COMPAT_SAMSUNG_S3C2440_I2C, /* Exynos I2C Controller */
84 COMPAT_SAMSUNG_EXYNOS5_SOUND, /* Exynos Sound */
85 COMPAT_WOLFSON_WM8994_CODEC, /* Wolfson WM8994 Sound Codec */
86 COMPAT_SAMSUNG_EXYNOS_SPI, /* Exynos SPI */
1/*
2 * Copyright (c) 2011 The Chromium OS Authors.
3 * See file CREDITS for list of people who contributed to this
4 * project.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of

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79 COMPAT_NVIDIA_TEGRA20_SLINK, /* Tegra 2 SPI SLINK controller */
80 COMPAT_NVIDIA_TEGRA114_SPI, /* Tegra 114 SPI controller */
81 COMPAT_SMSC_LAN9215, /* SMSC 10/100 Ethernet LAN9215 */
82 COMPAT_SAMSUNG_EXYNOS5_SROMC, /* Exynos5 SROMC */
83 COMPAT_SAMSUNG_S3C2440_I2C, /* Exynos I2C Controller */
84 COMPAT_SAMSUNG_EXYNOS5_SOUND, /* Exynos Sound */
85 COMPAT_WOLFSON_WM8994_CODEC, /* Wolfson WM8994 Sound Codec */
86 COMPAT_SAMSUNG_EXYNOS_SPI, /* Exynos SPI */
87 COMPAT_GOOGLE_CROS_EC, /* Google CROS_EC Protocol */
87 COMPAT_SAMSUNG_EXYNOS_EHCI, /* Exynos EHCI controller */
88 COMPAT_SAMSUNG_EXYNOS_USB_PHY, /* Exynos phy controller for usb2.0 */
89 COMPAT_SAMSUNG_EXYNOS_TMU, /* Exynos TMU */
90 COMPAT_SAMSUNG_EXYNOS_FIMD, /* Exynos Display controller */
91 COMPAT_SAMSUNG_EXYNOS5_DP, /* Exynos Display port controller */
92 COMPAT_SAMSUNG_EXYNOS5_DWMMC, /* Exynos5 DWMMC controller */
88 COMPAT_SAMSUNG_EXYNOS_EHCI, /* Exynos EHCI controller */
89 COMPAT_SAMSUNG_EXYNOS_USB_PHY, /* Exynos phy controller for usb2.0 */
90 COMPAT_SAMSUNG_EXYNOS_TMU, /* Exynos TMU */
91 COMPAT_SAMSUNG_EXYNOS_FIMD, /* Exynos Display controller */
92 COMPAT_SAMSUNG_EXYNOS5_DP, /* Exynos Display port controller */
93 COMPAT_SAMSUNG_EXYNOS5_DWMMC, /* Exynos5 DWMMC controller */
93 COMPAT_SAMSUNG_EXYNOS_SERIAL, /* Exynos UART */
94 COMPAT_MAXIM_MAX77686_PMIC, /* MAX77686 PMIC */
95 COMPAT_GENERIC_SPI_FLASH, /* Generic SPI Flash chip */
96 COMPAT_MAXIM_98095_CODEC, /* MAX98095 Codec */
97 COMPAT_INFINEON_SLB9635_TPM, /* Infineon SLB9635 TPM */
94 COMPAT_MAXIM_MAX77686_PMIC, /* MAX77686 PMIC */
95 COMPAT_GENERIC_SPI_FLASH, /* Generic SPI Flash chip */
96 COMPAT_MAXIM_98095_CODEC, /* MAX98095 Codec */
97 COMPAT_INFINEON_SLB9635_TPM, /* Infineon SLB9635 TPM */
98 COMPAT_INFINEON_SLB9645_TPM, /* Infineon SLB9645 TPM */
98
99 COMPAT_COUNT,
100};
101
102/* GPIOs are numbered from 0 */
103enum {
104 FDT_GPIO_NONE = -1U, /* an invalid GPIO used to end our list */
105

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100 COMPAT_COUNT,
101};
102
103/* GPIOs are numbered from 0 */
104enum {
105 FDT_GPIO_NONE = -1U, /* an invalid GPIO used to end our list */
106

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