sh7763rdp.h (becbbc7b2a1be44d38779c80ce94fb20e5e13f12) sh7763rdp.h (5a1aceb0689e2f731491838970884a673ef7e7d3)
1/*
2 * Configuation settings for the Renesas SH7763RDP board
3 *
4 * Copyright (C) 2008 Renesas Solutions Corp.
5 * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.

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98#define CFG_FLASH_WRITE_TOUT (3 * 1000)
99/* Timeout for Flash set sector lock bit operations (in ms) */
100#define CFG_FLASH_LOCK_TOUT (3 * 1000)
101/* Timeout for Flash clear lock bit operations (in ms) */
102#define CFG_FLASH_UNLOCK_TOUT (3 * 1000)
103/* Use hardware flash sectors protection instead of U-Boot software protection */
104#undef CFG_FLASH_PROTECTION
105#undef CFG_DIRECT_FLASH_TFTP
1/*
2 * Configuation settings for the Renesas SH7763RDP board
3 *
4 * Copyright (C) 2008 Renesas Solutions Corp.
5 * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.

--- 89 unchanged lines hidden (view full) ---

98#define CFG_FLASH_WRITE_TOUT (3 * 1000)
99/* Timeout for Flash set sector lock bit operations (in ms) */
100#define CFG_FLASH_LOCK_TOUT (3 * 1000)
101/* Timeout for Flash clear lock bit operations (in ms) */
102#define CFG_FLASH_UNLOCK_TOUT (3 * 1000)
103/* Use hardware flash sectors protection instead of U-Boot software protection */
104#undef CFG_FLASH_PROTECTION
105#undef CFG_DIRECT_FLASH_TFTP
106#define CFG_ENV_IS_IN_FLASH
106#define CONFIG_ENV_IS_IN_FLASH
107#define CFG_ENV_SECT_SIZE (128 * 1024)
108#define CFG_ENV_SIZE (CFG_ENV_SECT_SIZE)
109#define CFG_ENV_ADDR (CFG_FLASH_BASE + (1 * CFG_ENV_SECT_SIZE))
110/* Offset of env Flash sector relative to CFG_FLASH_BASE */
111#define CFG_ENV_OFFSET (CFG_ENV_ADDR - CFG_FLASH_BASE)
112#define CFG_ENV_SIZE_REDUND (CFG_ENV_SECT_SIZE)
113#define CFG_ENV_ADDR_REDUND (CFG_FLASH_BASE + (2 * CFG_ENV_SECT_SIZE))
114
115/* Clock */
116#define CONFIG_SYS_CLK_FREQ 66666666
117#define TMU_CLK_DIVIDER (4) /* 4 (default), 16, 64, 256 or 1024 */
118#define CFG_HZ (CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER)
119
120/* Ether */
121#define CONFIG_SH_ETHER 1
122#define CONFIG_SH_ETHER_USE_PORT (1)
123#define CONFIG_SH_ETHER_PHY_ADDR (0x01)
124
125#endif /* __SH7763RDP_H */
107#define CFG_ENV_SECT_SIZE (128 * 1024)
108#define CFG_ENV_SIZE (CFG_ENV_SECT_SIZE)
109#define CFG_ENV_ADDR (CFG_FLASH_BASE + (1 * CFG_ENV_SECT_SIZE))
110/* Offset of env Flash sector relative to CFG_FLASH_BASE */
111#define CFG_ENV_OFFSET (CFG_ENV_ADDR - CFG_FLASH_BASE)
112#define CFG_ENV_SIZE_REDUND (CFG_ENV_SECT_SIZE)
113#define CFG_ENV_ADDR_REDUND (CFG_FLASH_BASE + (2 * CFG_ENV_SECT_SIZE))
114
115/* Clock */
116#define CONFIG_SYS_CLK_FREQ 66666666
117#define TMU_CLK_DIVIDER (4) /* 4 (default), 16, 64, 256 or 1024 */
118#define CFG_HZ (CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER)
119
120/* Ether */
121#define CONFIG_SH_ETHER 1
122#define CONFIG_SH_ETHER_USE_PORT (1)
123#define CONFIG_SH_ETHER_PHY_ADDR (0x01)
124
125#endif /* __SH7763RDP_H */