| rsk7203.h (de5b094def5d80c4355c0326cfb54b9289f7d609) | rsk7203.h (5a1aceb0689e2f731491838970884a673ef7e7d3) |
|---|---|
| 1/* 2 * Configuation settings for the Renesas Technology RSK 7203 3 * 4 * Copyright (C) 2008 Nobuhiro Iwamatsu 5 * Copyright (C) 2008 Renesas Solutions Corp. 6 * 7 * See file CREDITS for list of people who contributed to this 8 * project. --- 78 unchanged lines hidden (view full) --- 87#define CFG_FLASH_CFI_WIDTH FLASH_CFI_16BIT 88#undef CFG_FLASH_QUIET_TEST 89#define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ 90#define CFG_FLASH_BASE RSK7203_FLASH_BASE_1 91#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE } 92#define CFG_MAX_FLASH_SECT 64 93#define CFG_MAX_FLASH_BANKS 1 94 | 1/* 2 * Configuation settings for the Renesas Technology RSK 7203 3 * 4 * Copyright (C) 2008 Nobuhiro Iwamatsu 5 * Copyright (C) 2008 Renesas Solutions Corp. 6 * 7 * See file CREDITS for list of people who contributed to this 8 * project. --- 78 unchanged lines hidden (view full) --- 87#define CFG_FLASH_CFI_WIDTH FLASH_CFI_16BIT 88#undef CFG_FLASH_QUIET_TEST 89#define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ 90#define CFG_FLASH_BASE RSK7203_FLASH_BASE_1 91#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE } 92#define CFG_MAX_FLASH_SECT 64 93#define CFG_MAX_FLASH_BANKS 1 94 |
| 95#define CFG_ENV_IS_IN_FLASH | 95#define CONFIG_ENV_IS_IN_FLASH |
| 96#define CFG_ENV_SECT_SIZE (64 * 1024) 97#define CFG_ENV_SIZE CFG_ENV_SECT_SIZE 98#define CFG_ENV_ADDR (CFG_MONITOR_BASE + CFG_MONITOR_LEN) 99#define CFG_FLASH_ERASE_TOUT 12000 100#define CFG_FLASH_WRITE_TOUT 500 101 102/* Board Clock */ 103#define CONFIG_SYS_CLK_FREQ 33333333 104#define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */ 105#define CFG_HZ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER) 106 107#endif /* __RSK7203_H */ | 96#define CFG_ENV_SECT_SIZE (64 * 1024) 97#define CFG_ENV_SIZE CFG_ENV_SECT_SIZE 98#define CFG_ENV_ADDR (CFG_MONITOR_BASE + CFG_MONITOR_LEN) 99#define CFG_FLASH_ERASE_TOUT 12000 100#define CFG_FLASH_WRITE_TOUT 500 101 102/* Board Clock */ 103#define CONFIG_SYS_CLK_FREQ 33333333 104#define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */ 105#define CFG_HZ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER) 106 107#endif /* __RSK7203_H */ |