porter.h (278b90ce786f73faf29aa522d5d101e1da006378) porter.h (a5dfabea19f961826509118513f833cea25797bb)
1/*
2 * include/configs/porter.h
3 * This file is Porter board configuration.
4 *
5 * Copyright (C) 2015 Renesas Electronics Corporation
6 * Copyright (C) 2015 Cogent Embedded, Inc.
7 *
8 * SPDX-License-Identifier: GPL-2.0

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29#define RCAR_GEN2_SDRAM_BASE 0x40000000
30#define RCAR_GEN2_SDRAM_SIZE (2048u * 1024 * 1024)
31#define RCAR_GEN2_UBOOT_SDRAM_SIZE (1024u * 1024 * 1024)
32
33/* SCIF */
34
35/* FLASH */
36#define CONFIG_SPI
1/*
2 * include/configs/porter.h
3 * This file is Porter board configuration.
4 *
5 * Copyright (C) 2015 Renesas Electronics Corporation
6 * Copyright (C) 2015 Cogent Embedded, Inc.
7 *
8 * SPDX-License-Identifier: GPL-2.0

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29#define RCAR_GEN2_SDRAM_BASE 0x40000000
30#define RCAR_GEN2_SDRAM_SIZE (2048u * 1024 * 1024)
31#define RCAR_GEN2_UBOOT_SDRAM_SIZE (1024u * 1024 * 1024)
32
33/* SCIF */
34
35/* FLASH */
36#define CONFIG_SPI
37#define CONFIG_SH_QSPI
38#define CONFIG_SPI_FLASH_QUAD
39
40/* SH Ether */
41#define CONFIG_SH_ETHER_USE_PORT 0
42#define CONFIG_SH_ETHER_PHY_ADDR 0x1
43#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
44#define CONFIG_SH_ETHER_CACHE_WRITEBACK
45#define CONFIG_SH_ETHER_CACHE_INVALIDATE

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37#define CONFIG_SPI_FLASH_QUAD
38
39/* SH Ether */
40#define CONFIG_SH_ETHER_USE_PORT 0
41#define CONFIG_SH_ETHER_PHY_ADDR 0x1
42#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
43#define CONFIG_SH_ETHER_CACHE_WRITEBACK
44#define CONFIG_SH_ETHER_CACHE_INVALIDATE

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