da850evm.h (973fcc8daec0055b5bc14dae6aa9e44c0e9d17f9) da850evm.h (cb19c29398cb84e72236ab6bae3763028fce5d44)
1/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
4 *
5 * Based on davinci_dvevm.h. Original Copyrights follow:
6 *
7 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
8 */

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18#define CONFIG_USE_SPIFLASH
19#endif
20
21/*
22* Disable DM_* for SPL build and can be re-enabled after adding
23* DM support in SPL
24*/
25#ifdef CONFIG_SPL_BUILD
1/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
4 *
5 * Based on davinci_dvevm.h. Original Copyrights follow:
6 *
7 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
8 */

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18#define CONFIG_USE_SPIFLASH
19#endif
20
21/*
22* Disable DM_* for SPL build and can be re-enabled after adding
23* DM support in SPL
24*/
25#ifdef CONFIG_SPL_BUILD
26#undef CONFIG_DM_SPI
27#undef CONFIG_DM_SPI_FLASH
28#undef CONFIG_DM_I2C
29#undef CONFIG_DM_I2C_COMPAT
30#endif
31/*
32 * SoC Configuration
33 */
34#define CONFIG_SYS_EXCEPTION_VECTORS_HIGH
35#define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID)

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113#define CONFIG_SYS_DA850_DDR2_PBBPR 0x30
114
115/*
116 * Serial Driver info
117 */
118
119#if !CONFIG_IS_ENABLED(DM_SERIAL)
120#define CONFIG_SYS_NS16550_SERIAL
26#undef CONFIG_DM_I2C
27#undef CONFIG_DM_I2C_COMPAT
28#endif
29/*
30 * SoC Configuration
31 */
32#define CONFIG_SYS_EXCEPTION_VECTORS_HIGH
33#define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID)

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111#define CONFIG_SYS_DA850_DDR2_PBBPR 0x30
112
113/*
114 * Serial Driver info
115 */
116
117#if !CONFIG_IS_ENABLED(DM_SERIAL)
118#define CONFIG_SYS_NS16550_SERIAL
121#define CONFIG_SYS_NS16550_REG_SIZE -4 /* NS16550 register size */
122#define CONFIG_SYS_NS16550_COM1 DAVINCI_UART2_BASE /* Base address of UART2 */
123#endif
124#define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID)
125
126#define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI1_CLKID)
127#ifdef CONFIG_SPL_BUILD
128#define CONFIG_SYS_SPI_BASE DAVINCI_SPI1_BASE
129#define CONFIG_SF_DEFAULT_SPEED 30000000

--- 173 unchanged lines hidden --- 		119#define CONFIG_SYS_NS16550_COM1 DAVINCI_UART2_BASE /* Base address of UART2 */
120#endif
121#define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID)
122
123#define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI1_CLKID)
124#ifdef CONFIG_SPL_BUILD
125#define CONFIG_SYS_SPI_BASE DAVINCI_SPI1_BASE
126#define CONFIG_SF_DEFAULT_SPEED 30000000

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