| C29XPCIE.h (17998eff9021b7b579c0387e934d8c52603fe247) | C29XPCIE.h (9307cbaba99936847a24c9d154eaa709ffff3a26) |
|---|---|
| 1/* 2 * Copyright 2013 Freescale Semiconductor, Inc. 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7/* 8 * C29XPCIE board configuration file --- 324 unchanged lines hidden (view full) --- 333#define CONFIG_SYS_INIT_RAM_LOCK 334#define CONFIG_SYS_INIT_RAM_ADDR 0xffd00000 335#define CONFIG_SYS_INIT_RAM_END 0x00004000 336 337#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END \ 338 - GENERATED_GBL_DATA_SIZE) 339#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET 340 | 1/* 2 * Copyright 2013 Freescale Semiconductor, Inc. 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7/* 8 * C29XPCIE board configuration file --- 324 unchanged lines hidden (view full) --- 333#define CONFIG_SYS_INIT_RAM_LOCK 334#define CONFIG_SYS_INIT_RAM_ADDR 0xffd00000 335#define CONFIG_SYS_INIT_RAM_END 0x00004000 336 337#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END \ 338 - GENERATED_GBL_DATA_SIZE) 339#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET 340 |
| 341#define CONFIG_SYS_MONITOR_LEN (512 * 1024) | 341#define CONFIG_SYS_MONITOR_LEN (768 * 1024) |
| 342#define CONFIG_SYS_MALLOC_LEN (2 * 1024 * 1024) 343 344/* 345 * Config the L2 Cache as L2 SRAM 346 */ 347#if defined(CONFIG_SPL_BUILD) 348#if defined(CONFIG_SDCARD) || defined(CONFIG_SPIFLASH) 349#define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 --- 228 unchanged lines hidden --- | 342#define CONFIG_SYS_MALLOC_LEN (2 * 1024 * 1024) 343 344/* 345 * Config the L2 Cache as L2 SRAM 346 */ 347#if defined(CONFIG_SPL_BUILD) 348#if defined(CONFIG_SDCARD) || defined(CONFIG_SPIFLASH) 349#define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 --- 228 unchanged lines hidden --- |