ns87308.c (becbbc7b2a1be44d38779c80ce94fb20e5e13f12) ns87308.c (6d0f6bcf337c5261c08fabe12982178c2c489d76)
1/*
2 * (C) Copyright 2000
3 * Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or

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22 */
23
24#include <config.h>
25
26#include <ns87308.h>
27
28void initialise_ns87308 (void)
29{
1/*
2 * (C) Copyright 2000
3 * Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or

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22 */
23
24#include <config.h>
25
26#include <ns87308.h>
27
28void initialise_ns87308 (void)
29{
30#ifdef CFG_NS87308_PS2MOD
30#ifdef CONFIG_SYS_NS87308_PS2MOD
31 unsigned char data;
32
33 /*
34 * Switch floppy drive to PS/2 mode.
35 */
36 read_pnp_config(SUPOERIO_CONF1, &data);
37 data &= 0xFB;
38 write_pnp_config(SUPOERIO_CONF1, data);
39#endif
40
31 unsigned char data;
32
33 /*
34 * Switch floppy drive to PS/2 mode.
35 */
36 read_pnp_config(SUPOERIO_CONF1, &data);
37 data &= 0xFB;
38 write_pnp_config(SUPOERIO_CONF1, data);
39#endif
40
41#if (CFG_NS87308_DEVS & CFG_NS87308_KBC1)
42 PNP_SET_DEVICE_BASE(LDEV_KBC1, CFG_NS87308_KBC1_BASE);
41#if (CONFIG_SYS_NS87308_DEVS & CONFIG_SYS_NS87308_KBC1)
42 PNP_SET_DEVICE_BASE(LDEV_KBC1, CONFIG_SYS_NS87308_KBC1_BASE);
43 write_pnp_config(LUN_CONFIG_REG, 0);
44 write_pnp_config(CBASE_HIGH, 0x00);
45 write_pnp_config(CBASE_LOW, 0x64);
46#endif
47
43 write_pnp_config(LUN_CONFIG_REG, 0);
44 write_pnp_config(CBASE_HIGH, 0x00);
45 write_pnp_config(CBASE_LOW, 0x64);
46#endif
47
48#if (CFG_NS87308_DEVS & CFG_NS87308_MOUSE)
48#if (CONFIG_SYS_NS87308_DEVS & CONFIG_SYS_NS87308_MOUSE)
49 PNP_ACTIVATE_DEVICE(LDEV_MOUSE);
50#endif
51
49 PNP_ACTIVATE_DEVICE(LDEV_MOUSE);
50#endif
51
52#if (CFG_NS87308_DEVS & CFG_NS87308_RTC_APC)
53 PNP_SET_DEVICE_BASE(LDEV_RTC_APC, CFG_NS87308_RTC_BASE);
52#if (CONFIG_SYS_NS87308_DEVS & CONFIG_SYS_NS87308_RTC_APC)
53 PNP_SET_DEVICE_BASE(LDEV_RTC_APC, CONFIG_SYS_NS87308_RTC_BASE);
54#endif
55
54#endif
55
56#if (CFG_NS87308_DEVS & CFG_NS87308_FDC)
57 PNP_SET_DEVICE_BASE(LDEV_FDC, CFG_NS87308_FDC_BASE);
56#if (CONFIG_SYS_NS87308_DEVS & CONFIG_SYS_NS87308_FDC)
57 PNP_SET_DEVICE_BASE(LDEV_FDC, CONFIG_SYS_NS87308_FDC_BASE);
58 write_pnp_config(LUN_CONFIG_REG, 0x40);
59#endif
60
58 write_pnp_config(LUN_CONFIG_REG, 0x40);
59#endif
60
61#if (CFG_NS87308_DEVS & CFG_NS87308_RARP)
62 PNP_SET_DEVICE_BASE(LDEV_PARP, CFG_NS87308_LPT_BASE);
61#if (CONFIG_SYS_NS87308_DEVS & CONFIG_SYS_NS87308_RARP)
62 PNP_SET_DEVICE_BASE(LDEV_PARP, CONFIG_SYS_NS87308_LPT_BASE);
63#endif
64
63#endif
64
65#if (CFG_NS87308_DEVS & CFG_NS87308_UART1)
66 PNP_SET_DEVICE_BASE(LDEV_UART1, CFG_NS87308_UART1_BASE);
65#if (CONFIG_SYS_NS87308_DEVS & CONFIG_SYS_NS87308_UART1)
66 PNP_SET_DEVICE_BASE(LDEV_UART1, CONFIG_SYS_NS87308_UART1_BASE);
67#endif
68
67#endif
68
69#if (CFG_NS87308_DEVS & CFG_NS87308_UART2)
70 PNP_SET_DEVICE_BASE(LDEV_UART2, CFG_NS87308_UART2_BASE);
69#if (CONFIG_SYS_NS87308_DEVS & CONFIG_SYS_NS87308_UART2)
70 PNP_SET_DEVICE_BASE(LDEV_UART2, CONFIG_SYS_NS87308_UART2_BASE);
71#endif
72
71#endif
72
73#if (CFG_NS87308_DEVS & CFG_NS87308_GPIO)
74 PNP_SET_DEVICE_BASE(LDEV_GPIO, CFG_NS87308_GPIO_BASE);
73#if (CONFIG_SYS_NS87308_DEVS & CONFIG_SYS_NS87308_GPIO)
74 PNP_SET_DEVICE_BASE(LDEV_GPIO, CONFIG_SYS_NS87308_GPIO_BASE);
75#endif
76
75#endif
76
77#if (CFG_NS87308_DEVS & CFG_NS87308_POWRMAN)
78#ifndef CFG_NS87308_PWMAN_BASE
77#if (CONFIG_SYS_NS87308_DEVS & CONFIG_SYS_NS87308_POWRMAN)
78#ifndef CONFIG_SYS_NS87308_PWMAN_BASE
79 PNP_ACTIVATE_DEVICE(LDEV_POWRMAN);
80#else
79 PNP_ACTIVATE_DEVICE(LDEV_POWRMAN);
80#else
81 PNP_SET_DEVICE_BASE(LDEV_POWRMAN, CFG_NS87308_PWMAN_BASE);
81 PNP_SET_DEVICE_BASE(LDEV_POWRMAN, CONFIG_SYS_NS87308_PWMAN_BASE);
82
83 /*
84 * Enable all units
85 */
82
83 /*
84 * Enable all units
85 */
86 write_pm_reg(CFG_NS87308_PWMAN_BASE, PWM_FER1, 0x7d);
87 write_pm_reg(CFG_NS87308_PWMAN_BASE, PWM_FER2, 0x87);
86 write_pm_reg(CONFIG_SYS_NS87308_PWMAN_BASE, PWM_FER1, 0x7d);
87 write_pm_reg(CONFIG_SYS_NS87308_PWMAN_BASE, PWM_FER2, 0x87);
88
88
89#ifdef CFG_NS87308_PMC1
90 write_pm_reg(CFG_NS87308_PWMAN_BASE, PWM_PMC1, CFG_NS87308_PMC1);
89#ifdef CONFIG_SYS_NS87308_PMC1
90 write_pm_reg(CONFIG_SYS_NS87308_PWMAN_BASE, PWM_PMC1, CONFIG_SYS_NS87308_PMC1);
91#endif
92
91#endif
92
93#ifdef CFG_NS87308_PMC2
94 write_pm_reg(CFG_NS87308_PWMAN_BASE, PWM_PMC2, CFG_NS87308_PMC2);
93#ifdef CONFIG_SYS_NS87308_PMC2
94 write_pm_reg(CONFIG_SYS_NS87308_PWMAN_BASE, PWM_PMC2, CONFIG_SYS_NS87308_PMC2);
95#endif
96
95#endif
96
97#ifdef CFG_NS87308_PMC3
98 write_pm_reg(CFG_NS87308_PWMAN_BASE, PWM_PMC3, CFG_NS87308_PMC3);
97#ifdef CONFIG_SYS_NS87308_PMC3
98 write_pm_reg(CONFIG_SYS_NS87308_PWMAN_BASE, PWM_PMC3, CONFIG_SYS_NS87308_PMC3);
99#endif
100#endif
101#endif
102
99#endif
100#endif
101#endif
102
103#ifdef CFG_NS87308_CS0_BASE
104 PNP_PGCS_CSLINE_BASE(0, CFG_NS87308_CS0_BASE);
105 PNP_PGCS_CSLINE_CONF(0, CFG_NS87308_CS0_CONF);
103#ifdef CONFIG_SYS_NS87308_CS0_BASE
104 PNP_PGCS_CSLINE_BASE(0, CONFIG_SYS_NS87308_CS0_BASE);
105 PNP_PGCS_CSLINE_CONF(0, CONFIG_SYS_NS87308_CS0_CONF);
106#endif
107
106#endif
107
108#ifdef CFG_NS87308_CS1_BASE
109 PNP_PGCS_CSLINE_BASE(1, CFG_NS87308_CS1_BASE);
110 PNP_PGCS_CSLINE_CONF(1, CFG_NS87308_CS1_CONF);
108#ifdef CONFIG_SYS_NS87308_CS1_BASE
109 PNP_PGCS_CSLINE_BASE(1, CONFIG_SYS_NS87308_CS1_BASE);
110 PNP_PGCS_CSLINE_CONF(1, CONFIG_SYS_NS87308_CS1_CONF);
111#endif
112
111#endif
112
113#ifdef CFG_NS87308_CS2_BASE
114 PNP_PGCS_CSLINE_BASE(2, CFG_NS87308_CS2_BASE);
115 PNP_PGCS_CSLINE_CONF(2, CFG_NS87308_CS2_CONF);
113#ifdef CONFIG_SYS_NS87308_CS2_BASE
114 PNP_PGCS_CSLINE_BASE(2, CONFIG_SYS_NS87308_CS2_BASE);
115 PNP_PGCS_CSLINE_CONF(2, CONFIG_SYS_NS87308_CS2_CONF);
116#endif
117}
116#endif
117}