Makefile (8f65ebb467acb3b4e31a3eea6e34e12abe2ca99b) | Makefile (550e691b49d8bc629d140be2137afac9313cdf07) |
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1# SPDX-License-Identifier: GPL-2.0+ 2# 3# Copyright (c) 2015 Google, Inc 4# Wolfgang Denk, DENX Software Engineering, wd@denx.de. 5# 6 7obj-$(CONFIG_$(SPL_TPL_)CLK) += clk-uclass.o 8obj-$(CONFIG_$(SPL_TPL_)CLK) += clk_fixed_rate.o 9obj-$(CONFIG_$(SPL_TPL_)CLK) += clk_fixed_factor.o 10 11obj-y += imx/ 12obj-y += tegra/ | 1# SPDX-License-Identifier: GPL-2.0+ 2# 3# Copyright (c) 2015 Google, Inc 4# Wolfgang Denk, DENX Software Engineering, wd@denx.de. 5# 6 7obj-$(CONFIG_$(SPL_TPL_)CLK) += clk-uclass.o 8obj-$(CONFIG_$(SPL_TPL_)CLK) += clk_fixed_rate.o 9obj-$(CONFIG_$(SPL_TPL_)CLK) += clk_fixed_factor.o 10 11obj-y += imx/ 12obj-y += tegra/ |
13obj-$(CONFIG_ARCH_ASPEED) += clk_aspeed.o | 13obj-$(CONFIG_ARCH_ASPEED) += aspeed/ |
14obj-$(CONFIG_ARCH_MEDIATEK) += mediatek/ 15obj-$(CONFIG_ARCH_MESON) += clk_meson.o clk_meson_axg.o 16obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/ 17obj-$(CONFIG_ARCH_SOCFPGA) += altera/ 18obj-$(CONFIG_CLK_AT91) += at91/ 19obj-$(CONFIG_CLK_MVEBU) += mvebu/ 20obj-$(CONFIG_CLK_BCM6345) += clk_bcm6345.o 21obj-$(CONFIG_CLK_BOSTON) += clk_boston.o --- 19 unchanged lines hidden --- | 14obj-$(CONFIG_ARCH_MEDIATEK) += mediatek/ 15obj-$(CONFIG_ARCH_MESON) += clk_meson.o clk_meson_axg.o 16obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/ 17obj-$(CONFIG_ARCH_SOCFPGA) += altera/ 18obj-$(CONFIG_CLK_AT91) += at91/ 19obj-$(CONFIG_CLK_MVEBU) += mvebu/ 20obj-$(CONFIG_CLK_BCM6345) += clk_bcm6345.o 21obj-$(CONFIG_CLK_BOSTON) += clk_boston.o --- 19 unchanged lines hidden --- |