ddr.c (52c411805c090999f015df8bdf8016fb684746d0) ddr.c (088454cde245b4d431ce0181be8b3cbceea059d6)
1/*
2 * Based on corenet_ds ddr code
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#include <common.h>
8#include <i2c.h>

--- 154 unchanged lines hidden (view full) ---

163
164 /* Enable ZQ calibration */
165 popts->zq_en = 1;
166
167 /* DHC_EN =1, ODT = 60 Ohm */
168 popts->ddr_cdr1 = DDR_CDR1_DHC_EN;
169}
170
1/*
2 * Based on corenet_ds ddr code
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#include <common.h>
8#include <i2c.h>

--- 154 unchanged lines hidden (view full) ---

163
164 /* Enable ZQ calibration */
165 popts->zq_en = 1;
166
167 /* DHC_EN =1, ODT = 60 Ohm */
168 popts->ddr_cdr1 = DDR_CDR1_DHC_EN;
169}
170
171phys_size_t initdram(void)
171int initdram(void)
172{
173 phys_size_t dram_size;
174
175 puts("Initializing....");
176
177 if (!fsl_use_spd())
178 panic("Cyrus only supports using SPD for DRAM\n");
179
180 puts("using SPD\n");
181 dram_size = fsl_ddr_sdram();
182
183 dram_size = setup_ddr_tlbs(dram_size / 0x100000);
184 dram_size *= 0x100000;
185
186 debug(" DDR: ");
172{
173 phys_size_t dram_size;
174
175 puts("Initializing....");
176
177 if (!fsl_use_spd())
178 panic("Cyrus only supports using SPD for DRAM\n");
179
180 puts("using SPD\n");
181 dram_size = fsl_ddr_sdram();
182
183 dram_size = setup_ddr_tlbs(dram_size / 0x100000);
184 dram_size *= 0x100000;
185
186 debug(" DDR: ");
187 return dram_size;
187 gd->ram_size = dram_size;
188
189 return 0;
188}
190}