mx6slevk.c (af38bf6b38eab53343afda2ad124682b27d82e64) mx6slevk.c (16edd347f0e4e0c77c9a667855e3293b58bb3fda)
1/*
2 * Copyright (C) 2013 Freescale Semiconductor, Inc.
3 *
4 * Author: Fabio Estevam <fabio.estevam@freescale.com>
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8

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45#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \
46 PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
47
48#define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
49 PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
50 PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
51 PAD_CTL_ODE | PAD_CTL_SRE_FAST)
52
1/*
2 * Copyright (C) 2013 Freescale Semiconductor, Inc.
3 *
4 * Author: Fabio Estevam <fabio.estevam@freescale.com>
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8

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45#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \
46 PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
47
48#define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
49 PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
50 PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
51 PAD_CTL_ODE | PAD_CTL_SRE_FAST)
52
53#define OTGID_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
54 PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW |\
55 PAD_CTL_DSE_80ohm | PAD_CTL_HYS | \
56 PAD_CTL_SRE_FAST)
57
53#define ETH_PHY_RESET IMX_GPIO_NR(4, 21)
54
55int dram_init(void)
56{
57 gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
58
59 return 0;
60}

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280
281#ifdef CONFIG_USB_EHCI_MX6
282#define USB_OTHERREGS_OFFSET 0x800
283#define UCTRL_PWR_POL (1 << 9)
284
285static iomux_v3_cfg_t const usb_otg_pads[] = {
286 /* OTG1 */
287 MX6_PAD_KEY_COL4__USB_USBOTG1_PWR | MUX_PAD_CTRL(NO_PAD_CTRL),
58#define ETH_PHY_RESET IMX_GPIO_NR(4, 21)
59
60int dram_init(void)
61{
62 gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
63
64 return 0;
65}

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285
286#ifdef CONFIG_USB_EHCI_MX6
287#define USB_OTHERREGS_OFFSET 0x800
288#define UCTRL_PWR_POL (1 << 9)
289
290static iomux_v3_cfg_t const usb_otg_pads[] = {
291 /* OTG1 */
292 MX6_PAD_KEY_COL4__USB_USBOTG1_PWR | MUX_PAD_CTRL(NO_PAD_CTRL),
288 MX6_PAD_EPDC_PWRCOM__ANATOP_USBOTG1_ID | MUX_PAD_CTRL(NO_PAD_CTRL),
293 MX6_PAD_EPDC_PWRCOM__ANATOP_USBOTG1_ID | MUX_PAD_CTRL(OTGID_PAD_CTRL),
289 /* OTG2 */
290 MX6_PAD_KEY_COL5__USB_USBOTG2_PWR | MUX_PAD_CTRL(NO_PAD_CTRL)
291};
292
293static void setup_usb(void)
294{
295 imx_iomux_v3_setup_multiple_pads(usb_otg_pads,
296 ARRAY_SIZE(usb_otg_pads));

--- 62 unchanged lines hidden --- 		294 /* OTG2 */
295 MX6_PAD_KEY_COL5__USB_USBOTG2_PWR | MUX_PAD_CTRL(NO_PAD_CTRL)
296};
297
298static void setup_usb(void)
299{
300 imx_iomux_v3_setup_multiple_pads(usb_otg_pads,
301 ARRAY_SIZE(usb_otg_pads));

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