mx6slevk.c (625509ab0edbb7d943ad9028de3c21ca48aa58be) mx6slevk.c (3b9c1a5dc09e5ee773f5a4fe9280e568b64b7779)
1/*
2 * Copyright (C) 2013 Freescale Semiconductor, Inc.
3 *
4 * Author: Fabio Estevam <fabio.estevam@freescale.com>
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8

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15#include <asm/imx-common/iomux-v3.h>
16#include <asm/imx-common/spi.h>
17#include <asm/io.h>
18#include <linux/sizes.h>
19#include <common.h>
20#include <fsl_esdhc.h>
21#include <mmc.h>
22#include <netdev.h>
1/*
2 * Copyright (C) 2013 Freescale Semiconductor, Inc.
3 *
4 * Author: Fabio Estevam <fabio.estevam@freescale.com>
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8

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15#include <asm/imx-common/iomux-v3.h>
16#include <asm/imx-common/spi.h>
17#include <asm/io.h>
18#include <linux/sizes.h>
19#include <common.h>
20#include <fsl_esdhc.h>
21#include <mmc.h>
22#include <netdev.h>
23#include <usb.h>
24#include <usb/ehci-fsl.h>
23
24DECLARE_GLOBAL_DATA_PTR;
25
26#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
27 PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
28 PAD_CTL_SRE_FAST | PAD_CTL_HYS)
29
30#define USDHC_PAD_CTRL (PAD_CTL_PUS_22K_UP | \

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238 ret = enable_fec_anatop_clock(ENET_50MHz);
239 if (ret)
240 return ret;
241
242 return 0;
243}
244#endif
245
25
26DECLARE_GLOBAL_DATA_PTR;
27
28#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
29 PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
30 PAD_CTL_SRE_FAST | PAD_CTL_HYS)
31
32#define USDHC_PAD_CTRL (PAD_CTL_PUS_22K_UP | \

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240 ret = enable_fec_anatop_clock(ENET_50MHz);
241 if (ret)
242 return ret;
243
244 return 0;
245}
246#endif
247
248#ifdef CONFIG_USB_EHCI_MX6
249#define USB_OTHERREGS_OFFSET 0x800
250#define UCTRL_PWR_POL (1 << 9)
246
251
252static iomux_v3_cfg_t const usb_otg_pads[] = {
253 /* OTG1 */
254 MX6_PAD_KEY_COL4__USB_USBOTG1_PWR | MUX_PAD_CTRL(NO_PAD_CTRL),
255 MX6_PAD_EPDC_PWRCOM__ANATOP_USBOTG1_ID | MUX_PAD_CTRL(NO_PAD_CTRL),
256 /* OTG2 */
257 MX6_PAD_KEY_COL5__USB_USBOTG2_PWR | MUX_PAD_CTRL(NO_PAD_CTRL)
258};
259
260static void setup_usb(void)
261{
262 imx_iomux_v3_setup_multiple_pads(usb_otg_pads,
263 ARRAY_SIZE(usb_otg_pads));
264}
265
266int board_usb_phy_mode(int port)
267{
268 if (port == 1)
269 return USB_INIT_HOST;
270 else
271 return usb_phy_mode(port);
272}
273
274int board_ehci_hcd_init(int port)
275{
276 u32 *usbnc_usb_ctrl;
277
278 if (port > 1)
279 return -EINVAL;
280
281 usbnc_usb_ctrl = (u32 *)(USB_BASE_ADDR + USB_OTHERREGS_OFFSET +
282 port * 4);
283
284 /* Set Power polarity */
285 setbits_le32(usbnc_usb_ctrl, UCTRL_PWR_POL);
286
287 return 0;
288}
289#endif
290
247int board_early_init_f(void)
248{
249 setup_iomux_uart();
250#ifdef CONFIG_MXC_SPI
251 setup_spi();
252#endif
253 return 0;
254}
255
256int board_init(void)
257{
258 /* address of boot parameters */
259 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
260
261#ifdef CONFIG_FEC_MXC
262 setup_fec();
263#endif
291int board_early_init_f(void)
292{
293 setup_iomux_uart();
294#ifdef CONFIG_MXC_SPI
295 setup_spi();
296#endif
297 return 0;
298}
299
300int board_init(void)
301{
302 /* address of boot parameters */
303 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
304
305#ifdef CONFIG_FEC_MXC
306 setup_fec();
307#endif
308
309#ifdef CONFIG_USB_EHCI_MX6
310 setup_usb();
311#endif
312
264 return 0;
265}
266
267u32 get_board_rev(void)
268{
269 return get_cpu_rev();
270}
271
272int checkboard(void)
273{
274 puts("Board: MX6SLEVK\n");
275
276 return 0;
277}
313 return 0;
314}
315
316u32 get_board_rev(void)
317{
318 return get_cpu_rev();
319}
320
321int checkboard(void)
322{
323 puts("Board: MX6SLEVK\n");
324
325 return 0;
326}